Category Archives: Metrology

By Art Paredes, SEMI

Nearly 5,000 visitors and exhibitor personnel assembled in Penang last month for SEMICON Southeast Asia 2016, the largest trade show for the electronics manufacturing supply chain in the region. This year’s event featured over 80 speakers and 200 companies participating, with exhibiting companies from countries spanning the globe.

In its second year in Penang, SEMICON Southeast Asia serves as the primary platform for semiconductor equipment and materials manufacturing, assembly, test & packaging services, electronic manufacturing services (EMS), smart manufacturing technologies, and industrial IoT applications.

“With more programs and speakers this year – and the increased number of exhibiting companies, we are extremely pleased with the continued growth of SEMICON Southeast Asia,” stated Kai Fai Ng, president of SEMI Southeast Asia. Mr. Ng also stated: “the support and leadership of our Regional Advisory Board, chaired by Mr. KC Ang, senior vice president and GM of GLOBALFOUNDRIES – and the Southeast Asia Technical Committees, chaired by Mr. Nelson Wong, VP of the Ball Bonder Business Unit at Kulicke & Soffa, was greatly appreciated – and a key reason for our success.”

In addition to the sold-out exhibition hall, SEMICON Southeast Asia presented more than 90 targeted sessions and panel discussions. Key programs included the Market Trends Briefing, Supply Chain in High Tech Industry Forum, Advanced Packaging Forum, Technology Innovation Forum, Product & System Testing Forum, Sustainable Manufacturing Forum, Electrical Fault Isolation Tutorial, LED Technology Forum, and the IC Failure Analysis & Yield Productivity Forum.

Each program featured excellent speakers from the extended electronics supply chain, including KL Bock, VP of Manufacturing at SanDisk; John Galang, SEA regional director, Global Manufacturing Operations at Cisco Systems; Yohei “Fred” Sato, director ATS Marketing at TEL; Mr. CS Tan, Group VP & GM at ST Microelectronics; Ms. Fariba Abhari, director of Marketing IoT/MEMS Business Group at Lam Research; Dr. Poh Leng Eu, head of Package Innovation at NXP; Dr. Shang Yang, senior R&D Applications engineer at Advantest; Mr. Arvind Sundarrajan, head of Asia Product Development Centre at Applied Materials and; Mr. Dennis Wee, Product Engineering manager at Broadcom, to name a few.

Sold out exhibition hall

SEMICON Southeast Asia’s exhibition grew an additional 12 percent over 2015. The show floor featured many leading equipment and materials manufacturers, assembly, test & packaging providers, electronic manufacturing service (EMS) providers, and numerous suppliers from the electronics supply chain. A sample of exhibiting companies included: Advantest, DAS, DISCO, Faeth, GE Sensing & Inspection, Hermes-Epiteck, Hitachi Power Solutions, Hiwin, Lam Research, SCREEN, Surplus Global, Tokyo Electron, ULVAC, UST Technology, Yaskawa, and ZMC Technologies, to name a few. Key pavilions from Singapore, Silicon Saxony and the Malaysia Investment & Development Agency (MIDA) were also present on the show floor.

Over 200 industry leaders gathered on the summit of Penang Hill (also known as Bukit Bendera) for the annual SEMICON Southeast Asia networking event, hosted by InvestPenang. Lush gardens, live music, cooler temperatures, and fantastic views of Georgetown and mainland Penang provided the ideal backdrop for an entertaining and memorable evening.

“SEMICON Southeast Asia plays a vital role for the local economy and the continued growth of the electrical & electronics industry in Penang and throughout Malaysia,” stated Ms. Lee Lian Loo, GM of InvestPenang. “We are pleased to partner with SEMI for this outstanding trade show.”

Southeast Asia Remains a Key Market

Southeast Asia continues to play a vital role in the global IC industry and accounts for more than 27 percent of the world’s assembly, packaging and test production – and is the single largest market for packaging materials and equipment.

Dan Tracy, senior director, Industry Research & Statistics at SEMI, speaking at the Market Trends Briefing, provided a summary of year-to-date trends and a comprehensive market outlook for the global semiconductor equipment and materials market. Tracy emphasized the importance and relevance of the Southeast Asia market and the expected continuing growth in the materials and equipment sectors. According to the SEMI Materials Market Data Subscription (April 2016), Southeast Asia will account for approximately 24 percent of the total semiconductor packaging materials markets and about 14 percent of the regional fab materials market.

For more information regarding SEMICON Southeast Asia, please visit www.semiconsea.org or contact Ms. Shannen Koh at [email protected]. For additional information on SEMI’s global expositions, please visit www.semiexpos.org or contact Mr. Art Paredes @ [email protected].

Worldwide semiconductor capital spending is projected to decline 2 percent in 2016, to $62.8 billion, according to Gartner, Inc. (see Table 1). This is up from the estimated 4.7 percent decline in Gartner’s previous quarterly forecast.

“While the first quarter 2016 forecast has improved from a projected decline of 4.7 percent in the previous quarter’s forecast, the 2 percent decline in the market for 2016 is still bleak,” said David Christensen, senior research analyst at Gartner. “Excess inventory and weak demand for PCs, tablets, and mobile products continue to plague the semiconductor industry, resulting in a slow growth rate that began in late 2015 and is continuing into 2016.”

Table 1

Worldwide Semiconductor Capital Spending and Equipment Spending Forecast, 2015-2018 (Millions of Dollars)

2015

2016

2017

2018

Semiconductor Capital Spending ($M)

64,062.9

62,795.3

65,528.5

70,009.5

Growth (%)

-0.8

-2.0

4.4

6.8

Wafer-Level Manufacturing Equipment ($M)

33,248.1

32,642.0

34,897.6

37,641.1

Growth (%)

-1.1

-1.8

6.9

7.9

Wafer Fab Equipment ($M)

31,485.4

30,841.9

32,930.3

35,443.4

Growth (%)

-1.3

-2.0

6.8

7.6

Wafer-Level Packaging and Assembly Equipment ($M)

1,762.7

1,800.2

1,967.3

2,197.7

Growth (%)

4.1

2.1

9.3

11.7

Source: Gartner (May 2016)

“The slowdown in the devices market has driven semiconductor producers to be conservative with their capital spending plans,” said Mr. Christensen. “This year, leading semiconductor manufacturers are responding to anticipated weak demand from semiconductors and preparing for new growth in leading-edge technologies in 2017.”

In addition, the aggressive pursuit of semiconductor manufacturing capability by the Chinese government is an issue that cannot be ignored by the semiconductor manufacturing industry. In the last year, there has been consolidation and merger and acquisition (M&A) activity with specific offers from various Chinese-based entities, indicating the aggressiveness of the Chinese. This will dramatically affect the competitive landscape of global semiconductor manufacturing in the next few years, as China is now a major market for semiconductor usage and manufacturing.

Looking forward, the market is expected to return to growth in 2017. Increased demand for 10 nanometer (nm) and 3D NAND process development in memory and logic/foundry will drive overall spending to grow 4.4 percent in 2017.

This research is produced by Gartner’s Semiconductor Manufacturing program. This research program, which is part of the overall semiconductor research group, provides a comprehensive view of the entire semiconductor industry, from manufacturing to device and application market trends. Additional analysis on the outlook for the semiconductor market can be found at “Forecast Analysis: Capital Spending and Semiconductor Manufacturing Equipment, Worldwide, 1Q16.”

The Global Semiconductor Alliance (GSA) is pleased to announce the appointment of Dr. Leo Li as the chairman of the GSA Board of Directors for 2016 and 2017.  Dr. Li serves as chairman, chief executive officer of Spreadtrum Communications, leading the Company’s mission to achieve industry leadership through continuous innovation and service.

The GSA Board chairman is a coveted position throughout the industry reserved for the most innovative leaders who represent the semiconductor industry’s most active global regions. Dr. Li will be the first chairman to serve from mainland China.  As a global Alliance, this is a key step for GSA to ensure the commitment to all important regions of the ecosystem.  It is vital to GSA that Chinese companies are being serviced and global members have access to all of the opportunities in China.

Dr. Li has served as a regional member of the GSA Board of Directors, representing the Asia-Pacific region since 2012. He has also served as a member of GSA’s Asia-Pacific Leadership Council since 2011.  The Asia-Pacific Leadership Council serves as advisors to the GSA Board on global and regional issues.

“I am honored that the GSA Board of Directors has appointed me as their Chairman,” commented Dr. Li. “The industry is constantly evolving and GSA has been instrumental in solving a variety of challenges and promoting collaboration between its member companies and partners. I am looking forward to serving as the Chairman to help advance GSA’s commitment to support globalization and continue to be the most prominent advocate to expand cooperation and innovation in our dynamic global semiconductor industry.”

Dr. Li has more than 30 years experience in wireless communications industry, joining Spreadtrum Communications in May 2008. From 2005 to 2007, he served as the chief executive officer of Magicomm Technology Inc., a cell phone product development company. From 2002 to 2005, he was senior business development director at Broadcom and was responsible for a line of GSM/GPRS/EDGE/WCDMA baseband business. From 1998 to 2002, Dr. Li was appointed as general manager of Mobile Phone Product and Vice President of Mobilink Telecom, a GSM baseband start-up company that was sold to Broadcom in 2002. Prior to 1998, he held various senior engineering and program management positions at Rockwell Semiconductors and Ericsson. Dr. Li holds 10 patents in wireless communication systems, RF IC system and circuit designs, and RFID applications.

Dr. Li received a BS degree from the University of Science and Technology of China in Hefei, China; a MS degree from the Institute of Electronics, Chinese Academy of Sciences in Beijing, China; a Ph.D. degree in Electrical Engineering from the University of Maryland in College ParkMaryland, USA; and an MBA degree from the National University in La Jolla, California, USA.

“It is a great honor to have Dr. Li serve as the Chairman of the GSA Board of Directors,” said Jodi Shelton, president of the GSA.  “Dr. Li is one of the most influential leaders in the semiconductor industry in China and his involvement will be critical to our future success. GSA will greatly benefit from his global perspective and technical expertise, enabling GSA to expand its collaboration between China and the worldwide semiconductor industry.”

Steve Mollenkopf, the Chairman of the GSA Board of Directors from 2014 to present, will continue to serve as a regional leadership director for the Board.

Atomic force microscopy is essential for obtaining three-dimensional information of crystal defects.

ARDAVAN ZANDIATASHBARA, PATRICK A. TAYLORB, BYONG KIMA, YOUNG-KOOK YOOA, KEIBOCK LEEA, AHJIN JOC, JU SUK LEEC, SANG-JOON CHOC, and SANG-IL PARKC

a) Park Systems Inc., Santa Clara, CA, USA b) SunEdison Semiconductor, St Peters, MO c) Park Systems Corp., Suwon, Korea

As integrated devices continue to shrink, incoming bare silicon wafer defectivity requirements become more and more stringent. The inspection of bare silicon wafers for surface defects is predominantly accomplished by measuring the difference in laser light scattering (LLS) between the clean surface and a surface defect, where the intensity of the scattered signal is compared to the LLS of a standard latex sphere. The actual surface defectivity can originate from added particles, topological defects, and crystal imperfections. To be able to reduce the number of defects one must know the source of the defect. LLS inspection can only give defectivity counts and a relative size. Therefore, one must rely on defect review techniques such as SEM and AFM to determine the nature and origin of the defects.

SEM provides two-dimensional aerial images of the defects which lacks the information about depth or height of the defects. On the other hand, AFM can provide three- dimensional topography images of the defects with the highest vertical resolution among all techniques[1]. The shortcomings of conventional AFM systems were low throughput, limited tip life, and arduous efforts for locating the DOI on the 300 mm wafers. To address the limitations of conventional of AFM systems for defect review, ADR AFM has been introduced for 300 mm wafers recently[2].

We used ADR AFM in this study for studying the defects found by LLS inspection tool.
In this study we focus on very small crystal imperfec- tions which are not easily observed by LLS without some means to make them larger. We have used a decorative etching technique to highlight crystal imperfections to be studied by LLS, SEM, and AFM. The defect analysis can only be accomplished with accurate and reproducible defect coordinate transfer between analysis tools. Here we show how we have successfully and reliably found and characterized the decorated defects by ADR AFM.

ADR AFM procedure

The process in ADR AFM is depicted in FIGURE 1. During this process, the defects of interest are located accurately and imaged non-destructively. Two factors are essential in order to achieve these objectives. First proper linkage between ADR AFM and LLS inspection tool is required to minimize the positioning errors and locate the defects accurately. The linkage for blank wafers is achieved by sample coordinate alignment. Generally there are no alignment markers or fiducials available on blank wafers to be used for alignment. Therefore ADR AFM uses specialized vision to perform the sample alignment properly. Another important factor in AFM defect review is non-contact mode imaging which is required for non-destructive imaging of the samples while preserving AFM tip life such that the tip can last throughout the process for multiple defects.

FIGURE 1. The schematic shows ADR AFM process for this study. After completing coordinate mapping, ADR AFM will automatically perform survey scan, zoom-in scan, processing, analysis, and classification for each defect.

FIGURE 1. The schematic shows ADR AFM process for this study. After completing coordinate mapping, ADR AFM will automatically perform survey scan, zoom-in scan, processing, analysis, and classification for each defect.

Coordinate alignment

Sample coordinate alignment is needed for proper linkage between the stage coordinates of ADR AFM andLLS inspection tool. In the case of blank wafers, no fiducial or alignment marker exists on the sample to be used for sample alignment. To overcome this challenge, a coarse alignment followed by a fine alignment is performed. In the coarse alignment, three randomly selected peripheral and the notch or an angular reference are selected to correct for translational and rotational errors. This is followed by a fine alignment to eliminate positioning errors due to non-affinity between the stage coordi- nates of ADR AFM and LLS inspection tool. A few large defects with known inspection coordinates are used for performing fine alignment. Since the defects are hardly visible in a standard AFM optical image, an enhanced vision is used to locate the defects in the optics of the ADR AFM and utilize the defects as aligner markers. Upon the sample alignment, ADR AFM is able to locate additional defects accurately. More details on coordinate alignment can be found in ref [2].

Enhanced vision

Enhanced vision is utilized during fine coordinate alignment to locate the defects in the optical vision of ADR AFM. The technique is developed based on well- known differential frame averaging of the optical frames collected from the sample surface at two accurately separated locations. The sample can be moved accurately since ADR AFM uses a separated Z and XY scanners configuration. This architecture was initially developed to eliminate the crosstalk between the XY and Z scanners (which has been a common artifact in tube scanner based AFM systems)[2]. In this setup, sample is moved by XY scanner while tip is following the sample topography by Z scanner. In enhanced vision, the optical frames of the sample are collected at two precisely separated locations, and then the final frame is generated from the difference between the collected frames. The resulting frame possesses an enhanced contrast of surface details which are not easily observable in the standard vision of ADR AFM. A comparison between the frames collected by standard vision versus enhanced vision is depicted in FIGURE 2.

Screen Shot 2016-05-09 at 3.24.37 PM

Non-contact mode imaging

Non-contact mode is the standard imaging mode in ADR AFM. It is essential to maintain tip sharpness during the defect review process from the first to the last defect that is located and imaged. In addition to keeping tip costs low, well-maintained tip sharpness ensures consistent image quality and accuracy between the images of all defects during the process. It therefore enables the automated system to uninterruptedly locate and image the defects with a high throughput. In order to perform non-contact mode imaging, the AFM cantilever is oscillated at its resonance frequency. The oscillating cantilever is brought close enough to the sample that the oscillation amplitude reduces to a pre-defined set point due to the van der Waals tip sample interaction. ADR AFM maintains the oscillation amplitude to avoid tip contacting the sample. As the tip  scans the sample surface, the oscillation amplitude is maintained by moving the cantilever up and down with the Z scanner to maintain its tip sample interaction in attractive regime. More details on non-contact mode imaging can be found in reference[4]. Although ADR AFM’s functionality is based on non-contact mode imaging, it is capable of performing in other dynamic or contact imaging modes if needed.

Automatic defect search and imaging

The significant improvements in throughput of defect review are obtained by ADR AFM due to its fully automated process. Once defect coordinates from LLS inspection tool are entered into ADR AFM, coordinate alignment is performed, the defect is located and imaging starts for the list of selected defects. The process of locating and imaging the defects is fully automated. The automation includes locating the defect, tip-sample engagement, non-contact mode parameter optimization, survey scan, optimizing the scan size, final scan, processing, and defect classification. Defects can be classified into two groups of bumps and pits. Defects are typically located within ±10 μm of their LLS coordinates.

Sample preparation

Bare 300mm diameter CZ silicon wafers were treated with a gaseous acid in a reducing atmosphere at a temperature and for a sufficient duration to grow the crystal imperfections [3]. The size and shape of the decorated defects depends on the nature of the original defect as shown in FIGURE 3. Once decorated, the defect size is capable of being detected as LLS event. The LLS inspection tool locates and sizes the LLS events, providing the coordinates to be used by the SEM and AFM.

Screen Shot 2016-05-09 at 3.24.46 PM

Results

A wafer containing surface decorated defects was inspected by a LLS tool and 34 defects were selected to be reviewed by ADR AFM. The coordinates of the defects were entered to ADR AFM, coordinate alignment performed, and the defects were located and imaged by ADR AFM. The first 21 defects had been imaged by SEM before being studied by ADR AFM. However, SEM images only provide aerial two-dimensional view of defects without sufficient infor- mation on the defects depth and out of plane dimensions. The remaining 13 defects were not found by SEM despite the signal collected by the LLS tool. The summarized results of decorated defect study with ADR AFM and comparison with SEM results aredemonstrated in FIGURE 4. ADR AFM was able to find all the 34 defects including those that had not been found by SEM.

Screen Shot 2016-05-09 at 3.24.52 PM

The defects selected to be reviewed by ADR AFM belong to eight types according to their LLS signal. The tentative classification by the LLS tool is based on the defect’s light scattering which is dependent on morphology, depth, and presenece of a central defect. As the decorative etching process proceeds, crystal imperfections are exposed and etch at a different rate than the perfect crystal surface. Defects exposed at the initial stages of the etch are deeper and more developed than defects exposed late in the etching proccess. Defects with an inverted pyramid shape are generally deeper and posses higher LLS signal. They are classified as “Facet”. Defects with curved shape formed during the late stages of etching are shallower. These defects are classified as “Shallow”. Some defects are exposed at an intermediate point in the decorative etch and have some degree of faceted walls with curved bottom. This category is classfied as “Both”. Defects which have only started to be decorated have a very weak LLS signal and are classified as “Too shallow”. The defects are also categorized whether or not they have the center defect, hence, a total of eight defect types were identified. The defect classification is tabulated in FIGURE 5.

Screen Shot 2016-05-09 at 3.25.02 PM

As we go from left to right side of the table in figure 5, the LLS signal become weaker. This was attributed to the depth of defects and the sharpness of the defect’s edges. AFM images confirmed the depth difference between different classes of defects. Since the AFM images contain Z heights, we were able to use a banded color scale to depict the surface topography of the defects more accurately in 2D view.

Discussion

FIGURE 6 depicts a comparison between the data collected with SEM vs. AFM for the same defect. Primary SEM image provides an aerial 2D view of the defect. However, the shallow depth of the defect reaches the limitations of SEM, hence, poor contrast in the image. As indicated in Fig. 5, shallower defects were not found by SEM. A secondary electron image helps identify the center defect. Identification of center defect by secondary electron is possible only if the defect was found in primary SEM image.

Screen Shot 2016-05-09 at 3.25.07 PM

On the other hand, AFM image not only provides an aerial view of the defect, it also contains the height/depth values for each pixel. Therefore, more information can be obtained about the true topology of the defect by using a 3D repre- sentation of the AFM image or using a contoured color scale. Contoured color scales can also help understanding the topology of the defect in aerial view as shown in figure 5. As indicated before, AFM has the highest vertical resolution among all imaging techniques [1], hence, better contrast of AFM images in aerial view.

All of the 34 defects were found by ADR AFM including the 13 defects that were not found by SEM. FIGURE 7 depicts the AFM images a defect that was not found by SEM. The defect depth is below 4 nm and contains a center defect. This example indicates once again the limitation of SEM resolution in out of plane direction.

Screen Shot 2016-05-09 at 3.25.15 PM

It was indicated above that ADR AFM is a non-destructive imaging technique. It utilizes non-contact mode imaging for survey scan and final imaging scan. However, SEM beam can still modify the sample surface. FIGURE 8 indicates the sample contamination as a result of electron beam “burning” the surface during SEM imaging. These SEM burn-mark sizes are related to the SEM magnification. Figure 8 shows that several SEM magnifications were used in analyzing this defect.

Screen Shot 2016-05-09 at 3.25.30 PM

Summary

We have demonstrated the power of the ADR AFM to provide quality 3D information for defect review on bare silicon wafers. Crystal defects on surface of a 300 mm wafer are highlighted using a decorative etching technique. The surface defects are located by LLS inspection. Select defects of various classes are studies by SEM and ADR AFM. While shallow defects are not found by SEM, ADR AFM successfully found all the defects and provided high resolution three-dimensional topographical information of the defects. With the automated ADR AFM this type of analysis is simple and yet powerful.

References

1. G. T. Smith, Industrial Metrology: Surfaces and Roundness.: Springer, 2002.
2. Ardavan Zandiatashbar et al., “High-throughput automatic defect review for 300mm blank wafers with atomic force microscope,” in Proc. SPIE 9424, Metrology, Inspection, and Process Control for Microlithography XXIX, 2015, p. 94241X.
3. J. Libert and L. Fei, Method to Delineate Crystal Related Defects.: PCT Publication, WO2013055368(A1).
4. Ardavan Zandiatashbar, “Sub-angstrom roughness repeat- ability with tip-to-tip correlation,” NanoScientific, no. Winter, pp. 14-16, 2014.

The authors are with Park Systems Inc. (Santa Clara, CA and Suwon, Korea) and SunEdision Semiconductor in St Peters, MO. The lead author is Ardavan Zandiatashbara: [email protected]; phone 1 408 986-1110.

The Semiconductor Industry Association (SIA) this week announced worldwide sales of semiconductors reached $26.1 billion for the month of March 2016, a slight increase of 0.3 percent compared to the previous month’s total of $26.0 billion. Sales from the first quarter of 2016 were $78.3 billion, down 5.5 percent compared to the previous quarter and 5.8 lower than the first quarter of 2015. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Global semiconductor sales increased in March for the first time in five months, but soft demand, market cyclicality, and macroeconomic conditions continue to impede more robust growth,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Q1 sales lagged behind last quarter across nearly all regional markets, with the Americas showing the sharpest decline.”

Regionally, month-to-month sales increased in Japan (4.8 percent), Asia Pacific/All Other (2.3 percent), and Europe (0.1 percent), but fell in China (-1.1 percent) and the Americas (-2.8 percent). Compared to the same month last year, sales in March increased in Japan (1.8 percent) and China (1.3 percent), but decreased in Asia Pacific/All Other (-6.4 percent), Europe (-9.8 percent), and the Americas (-15.8 percent).

“Eighty-three percent of U.S. semiconductor industry sales are into markets outside the U.S., so access to overseas markets is imperative to the long-term strength of our industry,” Neuffer said. “The Trans-Pacific Partnership (TPP) is a landmark trade agreement that would tear down myriad barriers to trade with countries in the Asia-Pacific. The TPP is good for the semiconductor industry, the tech sector, the American economy, and the global economy. Congress should approve it.”

March 2016

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

5.03

4.89

-2.8%

Europe

2.66

2.67

0.1%

Japan

2.47

2.59

4.8%

China

8.02

7.93

-1.1%

Asia Pacific/All Other

7.83

8.01

2.3%

Total

26.02

26.09

0.3%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

5.81

4.89

-15.8%

Europe

2.96

2.67

-9.8%

Japan

2.55

2.59

1.8%

China

7.83

7.93

1.3%

Asia Pacific/All Other

8.57

8.01

-6.4%

Total

27.70

26.09

-5.8%

Three-Month-Moving Average Sales

Market

Oct/Nov/Dec

Jan/Feb/Mar

% Change

Americas

5.75

4.89

-15.0%

Europe

2.77

2.67

-3.6%

Japan

2.57

2.59

0.8%

China

8.45

7.93

-6.1%

Asia Pacific/All Other

8.08

8.01

-0.8%

Total

27.62

26.09

-5.5%

Year-to-year percent change in world semiconductor revenues over the past 20 years.

Year-to-year percent change in world semiconductor revenues over the past 20 years.

The Semiconductor Industry Association (SIA) today released a new report highlighting the evolution, complexity, and pivotal importance of the global semiconductor value chain. The report, drafted by Nathan Associates and titled, “Beyond Borders: How an Interconnected Industry Promotes Innovation and Growth,” emphasizes the global value chain’s tremendous benefits to technological advancement, semiconductor companies, affiliated industries, participating countries, and the global economy. The report also warns of the risks of attempting to reproduce the entire value chain within a single country.

“Much like the intricate circuitry of chips themselves, the global semiconductor value chain is a complex, interdependent network that is highly efficient, productive, and constantly evolving,” said John Neuffer, president and CEO, Semiconductor Industry Association. “This interlocking ecosystem drives growth and innovation and strengthens participating countries by increasing employment and export opportunities.”

The “Beyond Borders” report examines how the semiconductor value chain weaves together researchers, designers, manufacturers, assemblers, and suppliers from all over the world to create the building blocks of modern electronics. The system is driven in part by the extreme complexity and competitive nature of the industry itself. Nonstop, competition-driven demand for more and better capabilities, features, reliability, miniaturization, and speed at reduced cost requires a heavy investment in research and development, design, and efficient, low-cost manufacturing, testing, assembling and packaging, and distribution.

These same pressures also affect a vast array of supporting activities, such as the production of semiconductor manufacturing equipment, development of design software and other semiconductor intellectual property, and provision of raw materials. The pressures have compelled semiconductor companies to develop business models that look beyond national borders to achieve efficiencies to compete in the marketplace. Moving forward, this trend is likely to continue and intensify as the demand for innovation becomes even greater, according to the report.

“The semiconductor industry is relentlessly focused on the future, on exploring and advancing new technological frontiers such as brain-inspired computing, the Internet of Things, energy-efficient sensing, automated devices, robotics, and artificial intelligence,” Neuffer said. “A globally interdependent system that links together the strengths and capabilities of each participant will help the semiconductor industry unlock new technologies that will shape the future of the digital economy.”

IC Insights’ April Update to the 2016 McClean Report, to be released later this week, includes IC Insights’ final 2015 top 50 company rankings for total semiconductor and IC sales as well as rankings of the leading suppliers of DRAM, flash memory, MPUs, IC foundry services, etc.

Figure 1 ranks the top 13 IC foundries (pure-play and IDM) by foundry sales in 2015.

Apple TSMC sales

TSMC, by far, was the leader with $26.4 billion in sales last year.  In fact, TSMC’s 2015 sales were over 5x that of second-ranked GlobalFoundries (even with the addition of IBM’s chip business in the second half of 2015) and almost 12x the sales of the fifth-ranked China-based foundry SMIC.  As shown, there are only two IDM foundries in the ranking—Samsung and Fujitsu—after IBM and Magnachip fell from the list in 2015.  Despite losing a significant amount of Apple’s business, Samsung easily remained the largest IDM foundry last year, with more than 3x the sales of Fujitsu, the second-largest IDM foundry.

Illustrating the dramatic effect of exchange rate fluctuations on the IC sales numbers, TSMC’s 2015 growth rate was about half (6%) of what it was in its local currency (11%).  Thus, while the company met its stated goal of 10% or better growth in 2015 in NT dollars (840.5 billion), its growth rate in U.S. dollars was only 6%.

Driving home just how important Apple’s foundry business is, TSMC’s foundry sales increased by $1,464 million last year while its sales to Apple jumped by $1,990 million, representing more than 100% of TSMC’s total foundry sales increase in 2015.  As a result, without Apple, TSMC’s foundry sales would have declined by 2% last year, eight points less than the 6% increase it logged when including Apple.

Second ranked GlobalFoundries took over IBM’s IC business in early July of 2015.  It should be noted that besides $515 million in IDM foundry sales IBM made in 2014, the company also had about $1.0 billion of internal transfer IC revenue that year.  As a result, GlobalFoundries’ quarterly sales in 4Q15 were about $1.4 billion, an annual run-rate of $5.6 billion, about 12% greater than the company’s 2015 sales of $5.0 billion. However, without the addition of IBM’s sales in the second half of last year, GlobalFoundries’ sales would have declined by 2% in 2015.

Sales from the top 13 foundries’ shown in Figure 1 were $46.7 billion and represented 93% of the $50.3 billion in total foundry sales in 2015.  This share was two points higher than the 91% share the top 13 represented two years earlier in 2013.  With the barriers to entry (e.g., fab costs, access to leading edge technology, etc.) into the foundry business being so high and rising, IC Insights expects this “top 13” marketshare figure to continue to slowly rise in the future.

North America-based manufacturers of semiconductor equipment posted $1.38 billion in orders worldwide in March 2016 (three-month average basis) and a book-to-bill ratio of 1.15, according to the March Equipment Market Data Subscription (EMDS) Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.15 means that $115 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in March 2016 was $1.38 billion. The bookings figure is 9.4 percent higher than the final February 2016 level of $1.26 billion, and is 0.9 percent lower than the March 2015 order level of $1.39 billion.

The three-month average of worldwide billings in March 2016 was $1.20 billion. The billings figure is 0.5 percent lower than the final February 2016 level of $1.20 billion, and is 5.3 percent lower than the March 2015 billings level of $1.27 billion.

“Order activity remains steady and is on par with both the previous quarter and one year ago,” said Denny McGuirk, president and CEO of SEMI. “3D NAND and advanced logic are the key drivers for investments.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill

October 2015

$1,358.6

$1,325.6

0.98

November 2015

$1,288.3

$1,236.6

0.96

December 2015

$1,349.9

$1,343.5

1.00

January 2016

$1,221.2

$1,310.9

1.07

February 2016 (final)

$1,204.4

$1,262.0

1.05

March 2016 (prelim)

$1,198.5

$1,380.5

1.15

Source: SEMI (www.semi.org), April 2016

Park Systems announced today the appointments of Charlie Park as Senior Vice President of Global Sales, and Jong-Pil Park as Vice President of Production.

“The addition of these highly talented executives is a continuation of Park’s strategic business focus on global expansion,” states Dr. Sang-il Park, Park Systems Founder and CEO. “The new appointments establish the groundwork for an integrated world-wide targeted sales operation and will jointly aggressively increase our production capabilities to meet anticipated product demands.”

Charlie Park’s role as Senior Vice President of Global Sales will focus on further establishing Park Systems trademarked global Atomic Force Microscope (AFM) brand. He brings over three decades of global sales and marketing experience at leading companies including Samsung Electronics where during his tenure as Senior VP he expanded global operations, leading the sales & marketing divisions in both the Korean and European Headquarters. He has had numerous global assignments in the UK, Germany and the Netherlands and will use his successful global sales experience to implement Park’s long-term strategy for growth and innovation leadership in Atomic Force Microscopes.

Jong-Pil Park, PhD-ME, newly appointed Vice President of the Production Division will expand the highly successful production capabilities of Park AFM with quality-driven state-of-the-art systems and leading-edge performance capabilities. His successful 30 year career as an engineering-based expert in production and quality management include operations vice president at Motorola Korea, production VP at Doosan Infracore Co and at Huneed Technologies Company, and a senior engineer at Defense Technology & Quality. His leadership skills combined with technical knowledge of automated atomic force microscope equipment will expand Park Systems world-renowned production systems to meet the AFM needs for an expanding world market.

The Electronic System Design (ESD) Alliance (formerly the EDA Consortium) and Semico Research today announced that they have entered into a joint marketing agreement (JMA) to work together on several business initiatives in support of the semiconductor design ecosystem.

The JMA will enable the ESD Alliance and Semico, a semiconductor marketing and consulting research company noted for its coverage of the intellectual property (IP) market, to promote their common business goals. Semico will assist the ESD Alliance in broadening its reach into the IP community, a large part of the semiconductor design ecosystem, by promoting it at Semico events, on its website and through promotional emails.

Additionally, Semico will provide a discount to ESD Alliance members for purchase of individual research reports, offer enterprise-wide access to its IPI Monthly Report and extend admission discounts to Semico conference events.

In exchange, Semico has become an associate member of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem. The ESD Alliance will post availability of new Semico research reports and provide a link to its website for Semico blogs and articles.

“Semico is connected to and understands the needs of IP community,” says Bob Smith, the ESD Alliance’s executive director. “Our new mission is focused on representing the design ecosystem and IP is a key component. We will rely on its Semico’s expertise as we expand our presence and showcase our benefits to IP vendors and suppliers.”

“The ESD Alliance recognizes that the IP community is an important element of the semiconductor design ecosystem and one that will benefit from its newly expanded charter and ongoing initiatives,” notes Jim Feldham, president of Semico. “We look forward to working with the the ESD Alliance to raise the visibility of the importance of the IP market.”

For more information on other aspects of the ESD Alliance and Semico partnership, visit: www.esd-alliance.org or www.semico.com.