Category Archives: Metrology

SEMI reports that the worldwide semiconductor photomask market was $3.2 billion in 2014 and is forecasted to reach $3.4 billion in 2016. After increasing 1 percent in 2013, the photomask market increased 3 percent in 2014. The mask market is expected to grow 4 and 3 percent in 2015 and 2016, respectively. Key drivers in this market continue to be advanced technology feature sizes (less than 45 nm) and increased manufacturing in Asia-Pacific. Taiwan remains the largest photomask regional market for the fifth year in a row and is expected to be the largest market for the duration of the forecast.

Revenues of $3.2 billion place photomasks at 13 percent of the total wafer fabrication materials market, behind silicon and semiconductor gases. By comparison, photomasks represented 18 percent of the total wafer fabrication materials market in 2003. Another trend highlighted in the report is the increasing importance of captive mask shops. Captive mask shops, aided by intense capital expenditures in 2011 and 2012 and a weakening Yen in 2013 and 2014, gained market share at merchant suppliers’ expense, with captive mask suppliers accounting for 53 percent of the total photomask market last year, up from 49 percent in 2013. Captive mask shops represented 31 percent of the photomask market in 2003.

A recent published SEMI report, “2014 Photomask Characterization Summary,” provides details on the 2014 Photomask Market for seven regions of world including North America, Japan, Europe, Taiwan, Korea, China, and Rest of World. The report also includes data for each of these regions from 2003 to 2016 and summarizes lithography developments over the past year.

BY JOE CESTARI, Total Facility Solutions, Plano, Texas

When the commercial semiconductor manufacturing industry decides to move to the next wafer size of 450mm, it will be time to re-consider equipment and facilities strategies. Arguably, there is reason to implement new strategies for any new fab to be built regardless of the substrate size. In the case of 450mm, if we merely scale up today’s 300mm layouts and operating modes, the costs of construction would more than double. Our models show that up to 25 percent of the cost of new fab construction could be saved through modular design and point-of-use (POU) facilities, and an additional 5-10 percent could be saved by designing for “lean” manufacturing.

In addition to cost-savings, these approaches will likely be needed to meet the requirements for much greater flexibility in fab process capabilities. New materials will be processed to form new devices, and changes in needed process-flows and OEM tools will have to be accommodated by facilities. In fact, tighter physical and data integration between OEM tools and the fab may result in substantially reduced time to first silicon, ongoing operating costs and overall site footprint.

POU utilities with controls close to the process chambers, rather than in the sub-fab, have been modeled as providing a 25-30 percent savings on instrumentation and control systems throughout the fab. Also, with OEM process chamber specifications for vacuum-control and fluid-purity levels expected to increase, POU utilities provide a flexible way to meet future requirements.

Reduction of fluid purity specifications on central supply systems in harmony with increases in localized purification systems for OEM tools can also help control costs, improve flexibility, and enhance operating reliability. There are two main reasons why our future fabs will need much greater flexibility and intelligence in facilities: high-mix production, and 1-12 wafer lots.

High-mix production

Though microprocessors and memory chips will continue to increase in value and manufacturing volumes, major portions of future demand for ICs will be SoCs for mobile applications. The recently announced “ITRS 2.0”—the next roadmap for the semicon- ductor fab industry after the “2013” edition published early in 2014—will be based on applications solutions and less on simple shrinks of technology. Quoting Gartner Dataquest”s assessment:

“System-on-chip (SoC) is the most important trend to hit the semiconductor industry since the invention of microprocessors. SoC is the key technology driving smaller, faster, cheaper electronic systems, and is highly valued by users of semiconductors as they strive to add value to their products.”

1-12 Wafer Lots

The 24-wafer lot may remain the most cost-effective batch size for low-mix fabs, but for high-mix lines 12-wafer lots are now anticipated even for 300mm wafers. For 450mm wafers, the industry needs to re-consider “the wafer is the batch” as a manufacturing strategy. The 2013 ITRS chapter on Factory mentions in Table 5 that by the year 2019 “Single Wafer Lot Manufacturing System as an option” will likely be needed by some fabs. Perhaps a 1-5 wafer carrier and interface would be a way for an Automated Material Handling System (AMHS) to link discrete OEM tools as an evolution of current 300mm FOUP designs.

However, a true single-wafer fab line would be the realization of a revolution started over twenty years ago when the MMST Program was a $100M+ 5-year R&D effort funded by DARPA, the U.S. Air Force, and Texas Instruments, which developed a 0.35μm double-level-metal CMOS fab technology (with a three-day cycle time). In the last decade BlueShift Technologies was started and stopped to provide such revolutionary technology for vacuum-robot-lines to connect single-wafer chambers all with a common physical interface.

Lean manufacturing approaches should work well with high-mix product fabs, in addition to providing more efficient consumption of consumables in general. In specific, when lean manufacturing is combined with small batch sizes—minimally the single wafer—there is tremendous improvement in cycle-time.

Supplier Hub answers the needs of a changing semiconductor industry. 

BY LUC VAN DEN HOVE, imec, Leuven, Belgium

Supplier HubOur semiconductor industry is a cyclical business, with regular ups and downs. But we have always successfully rebounded, with new technologies that have brought on the next generation of electronic products. Now however, the industry stands at an inflection point. Some of the challenges to introduce next generation technologies are larger than ever before. Overcoming this point will require, in our opinion, a tighter collaboration than ever. To accommodate that collaboration, we have set up a new Supplier Hub, a neutral platform where researchers, IC producers, and suppliers work on solutions for technical challenges. This collaboration will allow the industry to overcome the inflection point and to move on to the next cycle of success, driven by the many exciting application domains that appear on the horizon.

Call for a new collaboration model

The formulas for the industry’s success have changed. Device structures are pushing the limits of physics, making it challenging to continue progressing according to Moore’s Law. Intricate manufacturing requirements make process control ever more difficult. Also chip design is more complex than ever before, requiring more scrutiny, analysis and testing before manufacturing can even begin. And the cost of manufacturing equipment and setting up a fab has risen exponentially, shutting out many smaller companies and forcing equipment and material suppliers to merge.

In that context, more and more innovation is coming from the supplier community, both from equipment and material suppliers. But as processes are approaching some fundamental limits, such as material limits, chemical, physical limits, it is also for suppliers becoming more difficult to operate and develop next-generation process steps in an isolated way. An earlier and stronger interaction among suppliers is needed.

All this makes a central and neutral platform more important than ever. That insight and the requests we got from partners set imec on the path to organizing a supplier hub. A hub that is structured as a neutral, open innovation R&D platform, a platform for which we make a substantial part of our 300mm cleanroom floor space available, even extending our facilities. It is a platform where suppliers and manufacturers collaborate side-to- side with the researchers developing next-generation technology nodes.

Organizing the supplier hub is a logical evolution in the way we have always set up collaborations with and between companies that are involved in semiconductor manufacturing. Collaborations that have proven very successful in the previous decade and that have resulted in a number of key innovations.

Supplier Hub off to a promising start

Today, both in logic and in memory, we are developing solutions to enable 7nm and 5nm technology nodes. These will involve new materials, new transistor architectures, and ever shrinking dimensions of structures and layers. At imec, the bulk of scaling efforts like these used to be done in collaborative programs involving IDMs and foundries, but also the fabless and fablite companies. All of these programs were strongly supported by our partnerships with the supplier community.

But today, to work out the various innovations in process steps needed for future nodes, we simply need this stronger and more strategic engagement from the supplier community, involving experimenting on the latest tools, even if they are still under development. And vice-versa, the tool and material suppliers can no longer only develop tools based on specs documents. To fabricate their products successfully and on time, they need to develop and test in a real process flow, and be involved in the development of new device concepts, to be able to fabricate tools and design process steps that match the requirements of the new devices.

A case in point: it is no longer possible now to develop and asses the latest generation of advanced litho without matching materials and etch processes. And reversely, the other tool suppliers need the result of the latest litho developments. So today, all process steps have to be optimized concurrently with other process steps, integrating material innovations at the same time. And this is absolutely necessary for success.

So that’s where the Supplier Hub enters.

In 2013, imec announced an extended collaboration with ASML, involving the set up an advanced patterning center, which will grow to 100 engineers. In 2014, the new center was started as the cornerstone of the supplier hub. Mid 2014, Lam Research agreed to partake in the hub. And since then a growing number of suppliers has been joining, among them the big names in the industry. Some of more recent collaborations that we announced e.g. were Hitachi (CD-SEM metrology equipment) and SCREEN Semiconductor Solutions (cleaning and surface preparation tools).

End of 2014, ASML started installing its latest EUV-tool, the NXE:3300. In the meantime, we have initiated building a new cleanroom next to our existing 300mm infrastructure. The extra floor space will be needed to accommodate all the additional equipment that will come in in the frame of the tighter collaboration among suppliers. Finally, during our October 2014 Internal Partner Conference, we organized a first Supplier Collaboration Forum where the suppliers discussed and evaluated their projects with all partners, representing a large share of the semiconductor community.

We have also been expanding the supplier hub concept through a deeper involvement of material suppliers. These will prove a cornerstone of the hub, as many advances we need for scaling to the next nodes will be based on material innovations.

Enabling the Internet-Of-Everything

I hold great optimism for the industry. The last years, the success of mobile devices has fueled the demand for semiconductor-based products. These mobile applications will continue to stimulate data consumption, going from 4G to 5G as consumers clamor for greater data availability, immediacy, and access. Beyond the traditional computing and communications applications loom new markets, collectively called the ‘Internet of Everything.’

In addition, nanoelectronics will enable disruptive innovations in healthcare to monitor, measure, analyze, predict and prevent illnesses. Wearable devices have already proven themselves in encouraging healthier lifestyles. The industry’s challenge is now to ensure that the data delivered via personal devices meet medical quality standards. In that frame, our R&D efforts will continue to focus on ultra-low-power multi-sensor platforms.

While there are many facets to the inflection point puzzle, the answers of the industry begin to take shape. The cost of finding new solutions will keep on rising. Individual companies carry ever larger risks if their choices prove wrong. But through closer collabo- ration, companies can share that risk while developing solutions, exploring and creating new technologies, shorten times to market, and be ready to bring a new generation of products to a waiting world. The industry may indeed stand at an inflection point, but the future is bright. Innovation cannot be stifled. And collaboration remains the consensus of an industry focused on the next new thing. Today, IC does not just stand for Integrated Circuit, it indeed calls for Innovation and Collaboration.

North America-based manufacturers of semiconductor equipment posted $1.31 billion in orders worldwide in February 2015 (three-month average basis) and a book-to-bill ratio of 1.02, according to the February EMDS Book-to-Bill Report published today by SEMI.   A book-to-bill of 1.02 means that $102 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in February 2015 was $1.31 billion. The bookings figure is 1.3 percent lower than the final January 2015 level of $1.33 billion, and is 1.0 percent higher than the February 2014 order level of $1.30 billion.

The three-month average of worldwide billings in February 2015 was $1.28 billion. The billings figure is 0.2 percent lower than the final January 2015 level of $1.28 billion, and is 0.9 percent lower than the February 2014 billings level of $1.29 billion.

“Year-to-date bookings and billings for North American semiconductor equipment are higher than last year for the same time period,” said SEMI president and CEO Denny McGuirk. “The year is off to a good start, with growth in bookings from the back-end sector.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
September 2014 

$1,256.5

$1,186.2

0.94
October 2014 

$1,184.2

$1,102.3

0.93
November 2014 

$1,189.4

$1,216.8

1.02
December 2014 

$1,395.9

$1,381.5

0.99
January 2015 (final)

$1,279.1

$1,325.6

1.04
February 2015 (prelim)

$1,277.1

$1,308.1

1.02

Source: SEMI, March 2015

The Global Semiconductor Alliance (GSA) announced the appointment of two key executives as well as the results of its 2015 Board of Directors’ election. GSA’s board is comprised of industry executives who are representative of the global regions in which GSA holds active memberships.

Scott McGregor, president, chief executive officer and member of the board of directors of Broadcom Corporation, has been appointed vice chairman of the GSA Board of Directors for 2015. Dr. Lisa Su, president and chief executive officer of AMD, has been appointed as a semiconductor director.

“We are honored to welcome Scott and Lisa to the GSA Board of Directors,” said Jodi Shelton, co-founder and president of GSA. “GSA will greatly benefit from their leadership and unique insight to further guide GSA’s growth and mission to support a collaborative ecosystem.”

Mr. McGregor is responsible for guiding the vision and direction for Broadcom’s corporate strategy. Since joining the company in 2005, Broadcom has expanded from $2.40 billion in revenue to $8.43 billion in 2014 revenue. Mr. McGregor joined Broadcom from Philips Semiconductors (now NXP Semiconductors) where he served as president and chief executive officer from 2001 to 2004. Prior to Philips, he held a variety of senior positions at Santa Cruz Operation Inc. (SCO), Digital Equipment Corporation (now part of HP), Microsoft and Xerox Corporation’s Palo Alto Research Center (PARC). Mr. McGregor received a B.A. in Psychology and a M.S. in Computer Science and Computer Engineering from Stanford University. He serves on the board of Ingram Micro and also is Chairman of the Board of Broadcom Foundation. In 2013 Mr. McGregor received UCLA’s IS Executive Leadership Award.

Dr. Su is AMD’s president and chief executive officer and also serves on the company’s board of directors. Previously, she was chief operating officer responsible for integrating AMD’s business units, sales, global operations and infrastructure enablement teams into a single market-facing organization responsible for all aspects of product strategy and execution. Dr. Su joined AMD in January 2012 as senior vice president and general manager. Prior to joining AMD, Dr. Su served in senior positions at Freescale Semiconductor, Inc., IBM and Texas Instruments. Dr. Su has bachelor’s, master’s and doctorate degrees in electrical engineering from the Massachusetts Institute of Technology (MIT). She has published more than 40 technical articles and was named a Fellow of the Institute of Electronics and Electrical Engineers (IEEE) in 2009. Dr. Su also serves on the board of Analog Devices, Inc.

The GSA election allows for the majority of the GSA Directors to be selected each year by the voting members. The election process has just been completed and the top four candidates include incumbent Neil Kim, executive vice president, operations and central engineering of Broadcom Corporation; Peter Gammel, chief technology officer of Skyworks Solutions, Inc.; Dr. Sam Heidari, chief executive officer of Quantenna Communications, Inc.; and Andrew Pease, president and chief executive officer of QuickLogic Corporation. In light of the appointment of Mr. McGregor, Mr. Kim has stepped aside from his re-elected director position but will continue to have an important and ongoing role with the GSA board. Mr. Kim has been a valued board member since 2009 and has made significant contributions to GSA’s role and mission during his tenure and will continue to do so in the future.

Mr. Gammel is chief technology officer for Skyworks Solutions, Inc. He joined the company in 2011 as part of Skyworks’ acquisition of SiGe Semiconductor. At SiGe, he served as chief technology officer and vice president of engineering. Prior to this, he was vice president of engineering at Renaissance Wireless and chief technology officer at AdvanceNanotech and for Agere Systems’ Analog Products Business. He was also a distinguished member of technical staff at Alcatel-Lucent Bell Labs.

Dr. Heidari, chief executive officer of Quantenna, is a connectivity and communication technologist seeking perfect solutions that enhance our everyday lives. He joined Quantenna in 2009 as vice president of R&D and led the innovation effort in latest Wi-Fi technology. He was appointed as CEO in 2011, and under his leadership, the company has been raising the bar on users’ experience by delivering the most advanced Wi-Fi hardware and software solutions and enabling applications previously not possible. Prior to Quantenna, he was chief technology officer and vice president of Engineering at Ikanos Communications. He served as president and chief executive office at Doradus Technologies which was acquired by Ikanos in 2006. Dr. Heidari is Chairman of the Board of Directors for SiTune Corporation and also serves on the advisory board for the Department of Electrical Engineering at the University of Southern California. He is a senior member of IEEE and holds 36 U.S. patents. He was named a winner of the 2014 CEO/Executive of the Year by the Golden Bridge Awards.

Mr. Pease is president and chief executive officer and serves on the board of directors of QuickLogic Corporation. He joined QuickLogic in 2006 as vice president of worldwide sales and was promoted to the position of president in 2009 and president and chief executive officer in 2011. Pease is an experienced semiconductor professional. Prior to joining QuickLogic he was senior vice president of worldwide sales of Broadcom Corporation from July 2003 to June 2006 and vice president of sales at Syntricity, Inc. from March 2000 to July 2003. Prior to 2000, Pease held senior sales positions at Vantis Corporation, Integrated Systems Inc., Advanced Micro Devices and DataTrak. Pease is a graduate of the United States Naval Academy and served as a naval officer prior to establishing his career in the semiconductor industry.

“We welcome our new and returning 2015 Board of Directors to the Alliance as they demonstrate commitment and service to GSA and more importantly, support for the entire industry whose success is reliant upon its partners,” said Steve Mollenkopf, GSA chairman of the board and chief executive officer, Qualcomm Incorporated. “We are grateful to have such dynamic and innovative leaders whose expertise of the industry will contribute to GSA’s continued growth.”

In its 20 years, the GSA has consistently broadened its global representation that consists of a membership base spanning large multinational corporations to start-up companies in their initial funding phase. Geographically, the GSA represents every major region within the semiconductor industry. The Alliance has strategically expanded its international presence in the EMEA and APAC regions through appointed regional board members, regional partnerships and global market intelligence initiatives.

The recent acquisition of Freescale Semiconductor by NXP Semiconductors would catapult the merged entity into the world’s eighth-largest chipmaker, positioning the newly minted giant for an even more formidable presence in key industrial sectors, according to IHS, a global source of critical information and insight.

Prior to the merger, NXP ranked 15th in revenue and Freescale 18th. With combined revenue last year of approximately $10 billion, the resulting new company would have surpassed Broadcom. Only Intel, Samsung Electronics, Qualcomm, SK Hynix, Micron Technology, Texas Instruments and Toshiba would have been bigger, as shown in the table below.

Global Top 10 Semiconductor Makers’ Revenue Share

2014 Company  Revenue Share
Rank
1 Intel 14.14%
2 Samsung Electronics 10.77%
3 Qualcomm 5.46%
4 SK Hynix 4.56%
5 Micron Technology 4.56%
6 Texas Instruments 3.46%
7 Toshiba 2.90%
8 NXP-Freescale (Merged) 2.83%
9 Broadcom 2.38%
10 STMicroelectronics 2.10%

 

“The merged company’s strength will be especially apparent in automotive-specific analog applications,” said Dale Ford, vice president and chief analyst at IHS. “Automotive products clearly will be the biggest convergence resulting from a merged product portfolio of the Dutch-based NXP and its smaller U.S. rival.”

The amalgamated NXP-Freescale would place the company in second place in the area of microcontroller units (MCUs), which are integrated circuits for embedded and automatically controlled applications, including automotive engine-control systems.  The merged company could also affect the digital signal processing (DSP) market, where Texas Instruments reigns supreme. DSPs are an important component in the audio and video handling of digital signals used in myriad applications, including mobile-phone speech transmission, computer graphics and MP3 compression.

“While both NXP and Freescale boast diverse portfolios with complementary products, the high-performance lines of the two chipmakers have very different target solutions,” said Tom Hackenberg, senior analyst for MCUs and microprocessors at IHS.

Freescale has been a key strategic provider of high-reliability automotive, telecomm infrastructure and industrial solutions, including both application-specific and general-purpose products that go after high-performance applications. NXP’s broad portfolio, by comparison, has strategically targeted precision analog and low-power portable-device applications, most of which are directed at portable wireless, automotive infotainment, consumer components and a complementary base of industrial components, including secure MCUs for smart cards. Even in the auto industry, where the two companies both focus on infotainment, their technologies harmonize: NXP dominates the radio market, while Freescale fills a large demand for low- to midrange center-stack processors and instrument cluster controllers.

“The most significant processor competition will likely occur in low-power connectivity solutions, where both chipmakers offer competitive connectivity MCUs,” said Hackenberg. “In particular, the newly merged company will be well-positioned to make groundbreaking advances in the human-machine interface market.”

Freescale recently began developing its portfolio of vision-related intellectual property with Canadian maker CogniVue, used in advanced driver assistance systems (ADAS). For its part, NXP has solid voice-processing expertise. Both companies overall have strong sensor fusion intellectual property, with each maker tending toward different applications. “The resulting combination could offer strategic symmetry in combined vision-, voice- and motion-controlled systems,” Hackenberg added.

Another important aspect of the merger is that Freescale is a near-exclusive source for power architecture processors and processor intellectual property. Although its market share overall is small compared to x86 and ARM, Freescale plays a significant role in the military aerospace industry, where many high-reliability equipment controls rely on power architecture. “While the acquisition of Freescale by a foreign owner is unlikely to be a deal breaker, the development could have some bearing on the approval process in the military, as it will now involve a non-U.S. company possessing ownership of its primary source of military aerospace specific Power Architecture,” Hackenberg noted.

By Douglas G. Sutherland and David W. Price

Author’s Note: This is the fifth in a series of 10 installments exploring the fundamental truths about process control—defect inspection and metrology—for the semiconductor industry. Each article in this series introduces one of the 10 fundamental truths and highlights their implications.

In the last installment we discussed the idea that uncertainty in measurement is part of the process. Anything that degrades the quality of the measurement also degrades the quality of the process because it introduces more variability into the Statistical Process Control (SPC) charts which are windows into the health of the process. In this paper we will expand upon those ideas.

The fifth fundamental truth of process control for the semiconductor IC industry is:

Variability is the Enemy of a Well Controlled Process.

In a wafer fab there are many different types of variability — all of them are bad.

  • Variability in the lot arrival rate, the processing time and the downtime of processing tools, to name just a few sources, all contribute to increased cycle time
  • Variability in the physical features (CD, film thickness, side-wall angle, etc.) contribute to increased leakage current, slower part speed, and yield loss
  • Variability in the defect rate leads to variability in the final yield, in the infant mortality rate, and in long-term reliability
  • Most importantly, variability degrades our ability to monitor small changes in the process – the signal must be greater than the noise in order to be detectable

There is nearly always some way to adjust the average of a given measurement, but the range of values is much harder to control and often much more important. For example, if a man has his feet in an oven and his head in a freezer, his average body temperature may well be 98o F but that fact won’t make him any less dead. Variability kills, and any effort to reduce it is usually time and money well spent.

Variability in Defect Inspection

Figure 1 below shows two simulated SPC charts that monitor the defect count at a given process step. Each chart samples every fifth lot (20 percent lot sampling). Both charts have an excursion at lot number 300 where a defect of interest (DOI) that makes up 10 percent of the total suddenly increases by three-fold. In the left chart the excursion would be caught within 8.5 lots on average, but in the right chart the same excursion would not be caught, on average, until 38.6 lots passed. The only difference is that the chart on the right has twice as much variability.

In general, for an excursion to be caught in a timely fashion it must be large enough to increase the average total defect count by an amount equivalent to three standard deviations of the baseline. If the baseline defect count is very noisy (high variability) then only large excursions will be detectable. Often people think this is the purpose of excursion monitoring: to find the big changes in defectivity. It is not.

KLAT_figures_web_Figure 1 (left) KLAT_figures_web_Figure 1 (right)

 

Figure 1. Two identical SPC charts showing the defect count at a given step but the chart on the left has half the variability of the chart on the right. The excursion at lot number 300 is detected on the left chart within 8.5 lots (on average) but the same excursion is not detected for 38.6 lots on the chart on the right. Increasing the variability by 2x increases the exposed lots by over 4.5x 

In our experience it is nearly always the smaller excursions that cause the most damage simply because they go undetected for prolonged periods of time. The big excursions get a lot of attention and generate a lot of activity but the dollar value of their impact is usually quite small in comparison. It is not uncommon to see low-level excursions cause upwards of $30,000,000 in yield loss. Large excursions are usually identified very quickly and usually result in a few million dollars of loss.

Other sources of variability in inspection data are low capture rate (CR) and poor CR stability. Defect inspection tools that have low CR will inherently have low CR stability. This means that even if the exact same defects could be moved to a different wafer you would not get the same result because of the different background signal from one wafer to the next. This adds significant variability into the SPC chart and can severely impair the ability to detect changes in the defect level.

It’s similar to looking at the stars on two different nights. Sometimes you see them all; sometimes you don’t. The stars are still there—it’s just that the conditions have changed. Something analogous happens with wafers. The exact same defects may be present but the conditions (film stack, CD, overlay, etc.) have changed. An inspection tool with a tunable wavelength allows you to filter out the background noise in the same way that a radio telescope allows you to see through the clouds. Inspection tools with flexible optical parameter settings (wavelength, aperture, polarization, etc.) produce robust inspections that effectively handle changes in background noise and take the variability out of the defect inspection process.

Variability in Metrology

Figure 2 shows two different distributions of critical dimension (CD). The chart of the left shows a distribution that spans the full range from the lower control limit (LCL) all the way to the upper control limit (UCL). Any change in the position of the average will result in some part of the tail extending beyond the one of the control limits.

KLAT_figures_web_Figure 2 (left) KLAT_figures_web_Figure 2 (right)

 

Figure 2. The distribution of CD values. The left chart shows a highly variable process and the right chart shows a process that has low variability.

The right hand chart has much less variability. Not only can the average value change a bit in either direction but there is enough room that one may deliberately choose to shift the position of the center point. Depending on the step this may allow one to tune the speed of the part or make trade-offs between part speed and leakage current.

Up to 10 percent of the breadth of these distributions comes from the CD tool used to measure the value in the first place. Contributions to the variability—total measurement uncertainty (TMU) —come from static precision, dynamic precision, long-term stability and matching. Clearly, metrology tools that have better TMU allow more latitude in the fine tuning of process control. This becomes especially important when using feed forward and/or feedback loops that can compound noise in the measurement process.

Obviously the best way to reduce variability is with the process itself. However, process control tools (inspection and metrology) and process control strategies can contribute to that variability in meaningful ways if they are poorly implemented. Metrology and inspection are the windows into your process: they allow you to see what parts of the process are stable, and more importantly, what parts are changing. The expense of implementing a superior process control strategy is nearly always recouped in terms of reducing variability and making the measurements more sensitive to small changes that can cause the most financial damage.

About the authors:

Dr. David W. Price is a Senior Director at KLA-Tencor Corp. Dr. Douglas Sutherland is a Principal Scientist at KLA-Tencor Corp. Over the last 10 years, Dr. Price and Dr. Sutherland have worked directly with more than 50 semiconductor IC manufacturers to help them optimize their overall inspection strategy to achieve the lowest total cost. This series of articles attempts to summarize some of the universal lessons they have observed through these engagements.

Read more Process Watch:

The most expensive defect

Process Watch: Fab managers don’t like surprises

Process Watch: The 10 fundamental truths of process control for the semiconductor IC industry

Process Watch: Exploring the dark side

“The Dangerous Disappearing Defect,” “Skewing the Defect Pareto,” “Bigger and Better Wafers,” “Taming the Overlay Beast,” “A Clean, Well-Lighted Reticle,” “Breaking Parametric Correlation,” “Cycle Time’s Paradoxical Relationship to Yield,” and “The Gleam of Well-Polished Sapphire.”

Building on the highly successful inaugural program Innovation Village, SEMICON Europa 2015 (October 6-8) will prominently feature second edition of this very successful program connecting early-stage companies with strategic investors, venture capitalists and other relevant stakeholders. The SEMICON Europa technology and business program agenda addresses the critical issues and challenges facing the microelectronics industries and provides information, education, and guidance for industry professional to move innovations and products to market. This year’s Innovation Village will bring together the most innovative European start-up and growth companies with leading investors from semiconductor and related industries.  New in 2015 is cooperation with the incubator “HighTech Startbahn” from Dresden with their Investors Congress “HighTech Venture Days.” As a result, the Innovation Village program has expanded to a four-day event with 60 selected companies, six high-tech sectors, speed presentations (pitches) and 60+ investors.

The goal of Innovation Village is to encourage exchanges between high-tech ventures and industry relevant investors. Participating start-up and growth companies have the opportunity to exhibit for three days at individual kiosks in the Innovation Village exhibition hall, presenting their innovations in a series of short pitches.  The Innovation Village features 40 private pitches to investors only, plus 20 public pitches — focusing on Information Communication Technology (ICT), Micro- and Nanotechnology and related applications, Materials Science, Environment and Energy Technology, Machinery and Plant Engineering, Industry 4.0 and Life Science and Automotive.

With a dedicated conference program on innovation and a live demonstration day for innovation products and applications, Innovation Village provides a uniquely valuable platform for both high-tech ventures as well as investors. The Innovation Village exhibition hall will also host several key industry companies and investors in exclusive booths with private meeting space.

“Saxony has gained a reputation for being one of Europe’s leading regions in innovative research,” says Heinz Kundert, president of SEMI Europe. “With the Innovation Village coming to Dresden for the first time, it is an excellent occasion to demonstrate the region’s capabilities for innovative technologies and products.”

“Dresden has proven to be one of Europe’s leading cities for IC manufacturing and microelectronics driven technology. The region is also host to a high number of innovations based start-ups,” says Bettina Vossberg, Chairwoman of the Board of Directors, HighTech Startbahn. “With the enhancement of both our strong concepts, it is an excellent occasion to demonstrate Europe’s capabilities in innovation and commercialization of new technologies.”

Innovation Village will represent the most viable new technology in Europe. Interested start-ups and growth companies are invited to fill out a Request for Participation (RFP) form online at the SEMICON Europa website (www.semiconeuropa.org). The ventures are encouraged to apply as early as possible. RFPs will be judged by SEMICON Europa Innovation Village Committee and HighTech Startbahn experts in venture capitalism and new technology investment: Tobias Jahn (3M New Ventures); Tony Chao (Applied Ventures LLC), Claus Schmidt (Robert Bosch Venture GmbH), Jim Traynor (TEL Venture), Christophe Desrumeaux (CEA Investissement), Jong Sang Choi (Samsung Ventures), Jean-Marc Girard (Air Liquid Electronics), Jean-Marc Bally (ASTER Capital), Erkki Aaltonen (VTT Ventures) and Pascal Vanluchene (Capital-E).

To encourage visibility for both investors and early stage innovative ventures, Innovation Village conferences and the exhibition will be free-of-charge for all SEMICON Europa visitors. Speakers will attract diverse visitors, including large companies, SMEs, and start-ups to the Innovation Village area. Dedicated innovation lounge areas set amidst the exhibition kiosks will allow visitors, investors and start-ups to interact with each other.

Nano-electronics research center imec has announced that it will award Dr. Morris Chang, founding chairman of Taiwan Semiconductor Manufacturing Company, Limited (TSMC), the world’s first and largest semiconductor foundry, with a lifetime of innovation award. With his pioneering vision and founding of TSMC, Dr. Chang enabled the rapid growth of the fabless sector and changed the landscape of the semiconductor industry. Imec’s award recognizes Dr. Chang’s profound and unparalleled impact on the global semiconductor industry, and will be presented to him in person on June 23, in Belgium at imec’s annual Imec Technology Forum in Brussels.

Dr. Chang founded TSMC in 1987 as a company solely dedicated to manufacturing chips according to customers’ designs. By not competing with customers, TSMC enabled entrepreneurs to build world-class businesses around designing and marketing chips without the need of a manufacturing facility. By partnering for manufacturing capabilities, fabless companies can avoid the mammoth costs of operating their own semiconductor fabrication facility and focus on innovation of the circuits while leaving the manufacturing and yield challenges to their partners in foundry, and thereby accelerating innovation according to market needs. It is the world’s largest dedicated independent semiconductor foundry, and many of today’s largest high-tech companies can link their success directly to their partnership with TSMC.

“Chairman Chang is immensely respected in the global semiconductor community for his innovative vision and tireless drive to shape the future of technology,” stated Luc Van den hove, president and CEO at imec. “Innovation is the cornerstone of economic growth and imec, as the nucleus of the global semiconductor industry for joint R&D on advanced technologies, is a proud partner of TSMC. We are greatly honored to welcome Chairman Chang to Belgium and to present him with this award, representing imec’s and its partners’ gratitude, respect, admiration and appreciation.”

Imec and TSMC have a long and fruitful history of collaboration. Since 2005, TSMC is one of the core partners in imec’s industrial affiliation program on advanced CMOS technologies. Imec’s unique research platform harnesses the collective expertise and knowledge of the entire value chain, bringing together foundries, IDMs, fabless and fab-lite companies, packaging and assembly companies, and equipment and material suppliers, to drive innovation and the development of new, competitive products. Other strategic CMOS partners include Intel, Samsung, Globalfoundries, Micron, SK Hynix, Toshiba/Sandisk, Qualcomm, Huawei, Panasonic, Sony … TSMC’s commitment to imec was extended in 2009 by the establishment of TSMC’s European R&D facility at the imec campus, benefiting from imec’s state-of-the-art semiconductor cleanroom facility. Imec and its partners, in turn, benefit from TSMC’s broad-based technology roadmap and platform expertise, its customers, suppliers, and ecosystem partners. Other highlights in the collaboration between imec and TSMC are the appointment of imec as a TSMC value chain aggregator for Europe, enabling imec to offer TSMC technology on a multiproject wafer basis to European companies and academia through imec’s Europractice IC services, and imec to become a VCA of TSMC for the Indian market in 2013.

Morris Chang - Founding Chairman, TSMC

Morris Chang – Founding Chairman, TSMC

SEMI, the global industry association for companies that supply manufacturing technology and materials to the world’s chip makers, today reported that worldwide sales of semiconductor manufacturing equipment totaled $37.50 billion in 2014, representing a year-over-year increase of 18 percent. 2014 total equipment bookings were 8 percent higher than in 2013. The data are available in the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) Report, now available from SEMI.

Compiled from data submitted by members of SEMI and the Semiconductor Equipment Association of Japan (SEAJ), the Worldwide SEMS Report is a summary of the monthly billings and bookings figures for the global semiconductor equipment industry. The report, which includes data for seven major semiconductor producing regions and 24 product categories, shows worldwide billings totaled $37.50 billion in 2014, compared to $31.79 billion in sales posted in 2013. Categories cover wafer processing, assembly and packaging, test, and other front-end equipment. Other front-end includes mask/reticle manufacturing, wafer manufacturing, and fab facilities equipment.

Spending rates increased for all the regions tracked in the WWSEMS report, except for Taiwan. Even with the annual decrease, Taiwan remained the largest market for new semiconductor equipment for the third year in a row with $9.41 billion in equipment sales. The North American market held onto the second place with $8.16 billion in sales; South Korea maintained its third position with total sales of $6.84 billion. China moved up in the rankings, surpassing Japan with $4.37 billion in sales.

The global assembly and packaging segment increased 33 percent; total test equipment sales increased 31 percent; other front end equipment segment increased 15 percent; and the wafer processing equipment market segment increased 15 percent.

Semiconductor Capital Equipment Market by World Region (2013-2014)

(Dollar in U.S. billions; Percentage Year-over-Year)

2014

2013

% Change
Taiwan

9.41

10.57

-11%
North America

8.16

5.27

55%
South Korea

6.84

5.22

31%
China

4.37

3.37

30%
Japan

4.18

3.38

24%
Europe

2.38

1.91

25%
Rest of World

2.15

2.07

4%
Total

37.50

31.79

18%

Source: SEMI/SEAJ March 2015
Note: Figures may not add due to rounding.