Category Archives: Metrology

On Monday, Applied Materials announced two new systems, a Reflexion LK Prime CMP system and a Producer XP Precision CVD system, both aimed at complex devices with 3D architectures. The company has introduced six new products over the last three months, with a new VIISta ion implanter introduced in June, and an Endura Ventura PVD system, Endura Volta CVD Cobalt system and Vericell solar wafer inspection system introduced in May.

The transition from planar to 3D devices, such as finFETs and 3D NAND, creates a variety of new challenges for equipment and materials. CMP, for example, now directly determines gate dimensions. “In planar, it was basically about depth of focus, basically providing ability to build metal layers one on top of another,” explained Sid Huey. “Now, with 3D, CMP is at the gate. It’s really at the heart of the transistor and this controls the device performance. What this means is that the performance required now is really an order of magnitude more stringent than what it was in the past.” Huey, director, CMP product manager, CMP Division, Silicon Systems Group, Applied Materials.

In the past, advances in CMP were largely centered around new polishing pads and slurries (which provide the “mechanical” part of chemical-mechanical polishing) and low downforce polishing heads. Today, the focus is on multiple process steps which enables better process control. New device architectures can require additional polishing steps. Logic 3D FinFETs involve up to 10 more planarization steps; 3D NAND require up to 5 more.  The latter are especially long processes, making it harder to maintain a steady removal rate and achieve an ultra-uniform surface. Dividing them into several shorter steps yields superior results. The system controls FinFET gate height with nanometer-level uniformity for every die.

The new Reflexion features 14 processing stations for polishing and cleaning: six polishing stations and eight integrated cleaning stations. Some processes are done with the wafer held vertically. The system includes a pre-cleaning module to reduce defectivity, and real-time process control designed for the influx of new on-wafer materials. The increase in processing modules doubles wafer throughput for many applications, providing up to a 100 percent boost in productivity.

The 3D NAND industry inflection also requires enabling deposition technology for vertical gate formation and complex patterning applications. The Producer XP Precision CVD system supports the 3D NAND transition by delivering essential nanometer-level layer-to-layer film thickness control for excellent CD uniformity across the wafer. Key to this performance is the system’s capability to tune crucial parameters that include temperature, plasma, and gas flow. This engineering flexibility supports the alternate deposition of different high-quality, low-defect films.

The Producer CP Precision CVD system.

The Producer CP Precision CVD system.

Reflexion LK Prime CMP system

Reflexion LK Prime CMP system

SEMATECH and the newly merged SUNY College of Nanoscale Science and Engineering (CNSE) / SUNY Institute of Technology (SUNYIT) today jointly announce the creation of the Chemical Mechanical Planarization (CMP) Center, based at the Albany Nanotech Complex. The Center aims to accelerate the development of next generation CMP technology, and to drive improvement in the yield and cost of ownership of CMP processes.

“In support of Governor Andrew Cuomo’s commitment to New York’s global leadership in developing next generation technologies, we are excited to partner with SEMATECH to develop technology for the manufacturing of future nanoelectronics devices,” said Christopher Borst, Associate Vice President for G450C Technical Operations and Associate Professor of Nanoengineering at the newly merged CNSE/SUNYIT. “Through access to the newly merged CNSE/SUNYIT’s advanced fabrication facilities, we will enable a center of excellence with world-class capabilities for development of leading-edge process solutions for future generation technologies.”

“The CMP Center is an important part of our strategy to provide our members with the critical capabilities needed to accelerate process maturity for end users,” said Edward Barth Director of Growth Initiatives at SEMATECH. “In addition to SEMATECH’s network of consortium members, the newly merged CNSE/SUNYIT’s leadership in providing state-of-the-art process and metrology toolsets will enable the development of new materials and CMP processes in further scaling of IC devices.”

As semiconductor dimensions are scaled, advances in test structures and process flows are critical for accelerating process development to support industry needs.  The new planarization center, a vital component of the newly merged CNSE/SUNYIT and SEMATECH’s process technology efforts, will serve as a technology test-bed that will enable participating companies to develop, demonstrate, integrate and qualify advanced CMP technologies for the semiconductor industry.

“The CMP community have been asking for this and the newly merged CNSE/SUNYIT and SEMATECH have responded loud and clear,” said Frank Tolic, Associate Vice President for Business, Wafer Processing of the newly merged CNSE/SUNYIT.  “Leveraging our combined strengths creates the next generation of cost effective test vehicles, test wafers, and industry know-how that will lead the CMP community successfully through the next technology generations.”

“This collaborative venture incorporates the newly merged CNSE/SUNYIT’s and SEMATECH’s joint technical expertise and industry vision, with CNSE/SUNYIT’s state-of-the-art equipment,” said Satyavolu Papa Rao, Director of Process Technology, SEMATECH. “The entire CMP ecosystem, including consumable suppliers, tool and metrology vendors, and end users such as IDMs, foundries and fabless companies, can partner to establish industry standard test structures and develop solutions to meet the needs of sub-20 nm technology nodes.”

The new CMP Center, along with other Centers being established, will create cross-center synergies to drive technical excellence and reduce the overall cost of ownership in the development of next-generation technology.

 Applied Materials, Inc. and Tokyo Electron Limited today unveiled the new name and logo of their combined company which will be used once the merger closes. Derived from the concept of eternal innovation for society, Eteris [pronounced: eh-TAIR-iss] embodies the spirit of what will drive the new company and speaks to what makes the combination unique.

“The new name for our combined company builds on the strong legacies of Applied Materials and Tokyo Electron, creating something even greater than the sum of the two,” said Tetsuro Higashi, chairman, president and CEO of Tokyo Electron. “At the time we announced our plans to merge, we said this was a bold step forward for our industry. The name Eteris demonstrates our commitment to a new and exciting future for our company to create and enable technology innovations that improve the way people live.”

“Eteris is innovative and forward-looking and our logo symbolizes expanding future opportunities driving a new era of innovation and growth,” said Gary Dickerson, president and CEO of Applied Materials. “With a new name, mission and vision, we are bringing our new company into focus so that we can move quickly, execute our combined strategy and begin to create value as soon as the merger closes.”

Eteris captures the company’s focus on innovations that will enable its customers and move the industry forward. Core to Eteris is the promise to leave a positive and lasting impact on the world. Paired with the name is a bold logo that celebrates Eteris’ role in realizing the incredible possibility of technology. At the heart of the mark, the bright green square symbolizes the energy of the new company, the power of its technology and the foundation of innovation it provides to enable customer success. From the green foundation, bright colors and new dimensions expand, representing the many innovations Eteris will make possible every day. The logo represents expanding future opportunities that drive new innovation and growth.

joint_photo_eteris

The unveiling of the new company’s name and logo are the latest milestones in the merger’s progress. Last month the stockholders of Applied Materials and Tokyo Electron declared strong support for the combination. Approximately 99% of the shares voting at the Applied Materials stockholder meeting and 95% of the shares voting at the Tokyo Electron stockholder meeting voted to adopt the proposed business combination. These results underscore the value the combination brings to stockholders.

The closing of the business combination remains subject to customary conditions set forth in the parties’ Business Combination Agreement, including review by regulators in various countries. Applied Materials and Tokyo Electron expect the transaction to close in the second half of 2014.

Jordan Valley Semiconductors Ltd., a supplier of X-ray based metrology tools for advanced semiconductor manufacturing lines, today announced that its micro-spot X-ray Fluorescence (µXRF) metrology tool has been qualified for production monitoring of advanced Wafer Level Packaging (WLP) processes, by another memory player. The tool provides fully automated metrology solutions for several key applications, including single µ-bump chemical composition and height measurements, as well as control of multi-layer Under Bump Metallization (UBM) stack deposition.

Isaac Mazor, Jordan Valley’s CEO, said: “We are glad to add another leading memory customer to our distinguished list of advanced customers. This is additional proof that Jordan Valley’s tool and technology superiority is well appreciated and serves leading companies in the industry. Advancements in WLP technologies, such as the scaling down of solder bumps, complex UBM stacks, etc., set new metrology challenges and requirements that Jordan Valley can address. We believe that our tools will further contribute to our customer’s high yield targets in the current and future WLP process.”

Jordan Valley’s micro-XRF metrology tool is the “tool of record” for single bump composition measurements. It is ideal for non-destructive, in-line µ-bump %Ag measurements and uses a vertical excitation geometry that provides the smallest beam footprint with no dependence on height variation. The tool provides information critical for WLP process control, and comes with fully automated recipe driven measurements and analysis capabilities, advanced navigation algorithms for measurement on product wafers and more.

Jordan Valley’s management will attend Semicon West 2014 in San Francisco on July 7-10, 2014.

North America-based manufacturers of semiconductor equipment posted $1.41 billion in orders worldwide in May 2014 (three-month average basis) and a book-to-bill ratio of 1.00, according to the May EMDS Book-to-Bill Report published today by SEMI.   A book-to-bill of 1.00 means that $100 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in May 2014 was $1.41 billion. The bookings figure is 2.4 percent lower than the final April 2014 level of $1.44 billion, and is 6.6 percent higher than the May 2013 order level of $1.32 billion.

The three-month average of worldwide billings in May 2014 was $1.41 billion. The billings figure is 0.3   percent higher than the final April 2014 level of $1.40 billion, and is 15.1 percent higher than the May 2013 billings level of $1.22 billion.

“Semiconductor equipment bookings and billings maintain a consistent pace approaching the end of the second quarter,” said Denny McGuirk, president and CEO of SEMI.  “Like other trends reported across the industry, semiconductor process equipment sales demonstrate positive year-over-year performance.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

 

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill

December 2013

1,349.7

1,380.8

1.02

January 2014

1,233.2

1,280.3

1.04

February 2014

1,288.3

1,295.4

1.01

March 2014

1,225.5

1,297.7

1.06

April 2014 (final)

1,403.2

1,443.0

1.03

May 2014 (prelim)

1,408.0

1,407.9

1.00

Source: SEMI, June 2014

The data contained in this release were compiled by David Powell, Inc., an independent financial services firm, without audit, from data submitted directly by the participants. SEMI and David Powell, Inc. assume no responsibility for the accuracy of the underlying data.

Design and construction professionals are showing unprecedented levels of collaboration through the G450C.

BY ADRIAN MAYNES and FRANK ROBERTSON, G450C, Albany, NY

Hard data and strong collaboration are proving effective in solving the challenges inherent in building 450mm semiconductor fabs. In the past year, the Facilities 450mm Consortium (F450C) — the facilities-focused off-shoot of the Global 450mm Consortium — has provided the unified forum to test and analyze utility requirements, overhead conveyance systems and energy-efficiency strategies. The Global 450mm Consortium (G450C), a New York-based public/private program with leadership from GLOBALFOUNDRIES, IBM, Intel, Samsung, TSMC and the College of Nanoscale Science and Engineering is housed on SUNY’s University at Albany campus and maintains focus on 450mm process and equipment development (FIGURE 1). Combined, preliminary results from the seconsortiaare building the framework for this next-generation fab.

FIGURE 1. The College of Nanoscale Science and Engineering NanoFab Xtension, which houses 25,000 ft2 of cleanroom for 450mm research and development. Source: CNSE.)

FIGURE 1. The College of Nanoscale Science and Engineering NanoFab Xtension, which houses 25,000 ft2 of cleanroom for 450mm research and development. Source: CNSE.)

The F450C came into existence in 2013 facing a series of significant technical hurdles. The purpose of the 450mm fab is to manufacture more advanced integrated circuits at lower cost with a lighter environmental footprint. However, the initial 450mm tool guidelines point to a greater cost per square foot (meter) of cleanroom space, much heavier structural loads and significantly larger tool sizes, which can detract from the manufacturing flexibility the industry seeks. The potential for competing visions among industry leaders and the cyclicality of semiconductor demand in the marketplace add head winds on the path toward widespread 450mm adoption. These factors pose challenges that will need to be managed to ensure 450mm program objectives are achieved.

  • All key players are coming together
  • CNSE is providing a uniquely neutral and technologically advanced home for critical research
  • Work of the G450C is being guided by a strict application of an inside-out design approach
  • Key advances have been made in utility requirements, overhead conveyance systems and energy efficient strategies

Data are pointing to promising advantages of the 450mm model, which may support broad industry adoption.

A collaborative approach

When the complexity of the semiconductor manufac- turing process adds the scale of a 450mm wafer, the facility requirements can seem immense. The current scale of today’s 300mm factories indicates that managing the size and complexity is key to attaining the efficiencies needed for 450mm adoption. Driving to GLOBALFOUNDRIES’ massive facility in upstate New York, for example, feels more like approaching a coliseum than a manufacturing fab (FIGURE 2).

FIGURE 2. GlobalFoundries Fab8.1 located in Malta, NY.

FIGURE 2. GlobalFoundries Fab8.1 located in Malta, NY.

Naturally, the industry is closely examining impacts to the facility infrastructure along with the increase in wafer size, since merely scaling the manufacturing process is not practical. The size of the 450mm fab and its associated utility consumption projections would exceed affordability and exacerbate sustainability concerns without close focus on potential efficiencies.

The facility experts involved in establishing and implementing 450mm infrastructure requirements are facing a similar degree of challenges as the integrated circuit and equipment manufacturers.

Design and construction professionals are showing unprecedented levels of collaboration through the G450C to deconstruct semiconductor facility matter associated with 450mm adoption. This consortium formed in the summer of 2013 to unite collective industry expertise to tackle pressing 450mm facility and infrastructure issues. With a special focus on safety, cost, schedule, sustainability and environmental footprint, this group aims to: reduce production cost; increase manufacturing productivity; and reduce the environmental load associated with each chip manufactured.

Everything starts at the process level

Early development of 450mm silicon and infrastructure began before the turn of the decade, yet it wasn’t until 2013 that 450mm and 300mm process tools began to progress synchronously through technology development at CNSE. The function, operation and shape of a semiconductor facility are driven by the process technology and its corresponding manufacturing requirements. Design progresses from the inside out, starting with the process, in this sequence:

1. Process: the early development of silicon and infrastructure defines the utility process requirements

2. Equipment & Automation: process requirements dictate the process equipment/ tools

3. Production Environment: process equipment defines the manufacturing environment and critical process systems (power, the periphery of the tools, capable of multiple configura- tions for somewhat heavier payloads water, vacuum, chemicals and gases)

4. Site Infrastructure: the facility and its corresponding site requirements are developed

Equipment suppliers have begun providing tools so that G450C can create a 450mm baseline. Industry guidance is for some 450mm tools to maintain 300mm footprint normalized to throughput. Through working with original equipment manufacturers (OEMs) and suppliers, it becomes clear that some tools required to manufacture wafers are bigger and many components are heavier than their 300mm counterparts. This led members of Semiconductor Equipment and Materials International (SEMI) to prioritize the topic of “cranes and hoists” in a survey of potential 450mm standardization focus areas in late 2012. Members of the G450C agreed that industry alignment was needed to deal with the handling of components for 450mm equipment that might be larger and heavier than those currently lifted manually.

In March 2014, a multifaceted work group consisting of IC makers, OEMs, and facility systems suppliers published an initial set of component lifting systems for 450mm fab equipment. The Component Lift working group addressed a number of IC maker concerns around interference with overhead track automation systems, ceiling loading and fab layout flexibility. This led to almost immediate determination that ceiling-mounted cranes generally would not work for wafer fabs. Three broad classes of component lifting were then identified:

1. Generally light-duty custom fixtures integrated with and often mounted on the tools for specific component handling operations

2. Aisle-based mobile lift mechanisms operating from

3. Gantry-like structures addressing the full span of large (e.g., cluster) tools, capable of heavy lifting and conveying payloads beyond the tool periphery

In a 10-month span, the Component Lift working group published a cost of ownership model, safety imperatives, productivity suggestions and other key considerations in their March 2014 guidelines. While more work awaits, this effort is indicative of a new era in which industry collaboration lays the foundation for 450mm success.

Correctly sizing utilities

Vital to the 450mm program’s success is the ability to create an efficient manufacturing facility that builds upon industry know-how and lessons learned from prior technologies. Yesterday’s approach of examining singular utility systems and then searching for ways to improve their individual efficiency is not sufficient. Facility designers must consider how process equipment and facility systems interact as a whole.

In the fall of 2013, the F450C conducted a survey with all aforementioned 450mm consortium member companies to build a roadmap based on the industry’s priority focus areas. A plurality of polled members identified 450mm factory utility right-sizing as the top priority for the F450C. Simply stated, we want smarter utility consumption data to enable more efficient 450mm factories, not singular systems, but as a whole factory.

A “utility right-sizing” focus group was created and has been working since the fall of 2013 to characterize true 450mm utility consumption and requirements. Using the inside-out design process, the first step is to conduct real-time measurements for all critical 450mm process tools.

A critical step in the semiconductor manufacturing process is that of wet process, in which liquid chemicals remove materials from a wafer. This step is well known for its high usage of power, water, drains and chemicals. The G450C and F450C members are installing a series of monitoring devices on CNSE’s first 450mm wet process tool.

Haws Corporation, a F450C member company, has donated a series of effluent monitoring systems that enable utility characterization for acid waste neutralization drains, HF drains and exhaust. By characterizing drain effluents, the industry can more intelligently identify opportunities for reuse, reclaim and recycling. M+W Group, CH2M Hill and the G450C are collaborating to install power and flow meters on this same tool. In the second quarter of 2014, the group will conduct real-time utility measurements at idle, operational and peak modes, and combine the data with 300mm benchmarks to assemble the most comprehensive factory utility model in the history of our industry.

To illustrate why this initiative is a priority, consider that a 10 percent decrease in process equipment power consumption would reduce facility construction capex by ~2 percent. For a $1 billion dollar fab, this equates to an impact of approximately $20 million. A 10 percent decrease in process equipment ultra-pure water (UPW) consumption would reduce UPW system cost by approximately 7 percent and facility construction CAPEX by 0.3 percent.

Wet process is the start. This monitoring methodology will be repeated for all critical tool sets within the 450mm process in the coming years.

Just the beginning

Designing a safe way to install and work on 450mm process tools, combined with measuring and characterizing utilities, are two vital priorities for improving facility sustainability and efficiency. But it is just the beginning.

TABLE 1. (*) Increase is mainly driven by new processes and equipment technology, e.g. EUV, single wafer processing etc. (**) Pending AMHS concept and preference for floor mounted or ceiling suspended maintenance cranes (***) Mainly driven by simultaneous introduction of new lithography technology, not by wafer size transition Source: M+W Group, 2013

TABLE 1.
(*) Increase is mainly driven by new processes and equipment technology, e.g. EUV, single wafer processing etc.
(**) Pending AMHS concept and preference for floor mounted or ceiling suspended maintenance cranes
(***) Mainly driven by simultaneous introduction of new lithography technology, not by wafer size transition
Source: M+W Group, 2013

Edwards Vacuum, an original member of the F450C, is also providing its expertise to advance a “Green Mode” project, focusing on resource reduction and energy savings. About half of the process tools in a semiconductor facility use vacuum pumps and abatement systems to treat exhaust gases. The abatement systems were designed to run at full process capacity, even when the tool is not processing wafers. These “sub-fab” systems have significant impact on utility usage (power, process cooling water, acid wastewater treatment and nitrogen). Putting sub-fab systems into idle or green mode when there are no wafers processed can represent substantial reductions in operating and infrastructure costs. The Green Mode project is a multi-equipment supplier collaboration with the following goals:

1. Identify the impacts of vacuum operation changes at the process chamber, i.e., Green Mode

2. Consider other monitoring parameters that could provide information on vacuum system “health” and performance

3. Collect data to better understand correlation between process conditions and vacuum performance

Results from this project will drive SEMI standards that minimize process risk while adding to utility consumption savings.

From suppliers to scientists, the path to realizing 450mm affordability will continue to require unparalleled industry collaboration. In addition to the facility and infrastructure challenges featured in this article, leaders of the semiconductor industry continue to prioritize roadmap items that will further reduce capex for future 450mm fabs.

The G450C and F450C are also working with global airborne molecular contamination organizations and forums to examine how facility-related design (automated material handling system/stocker evaluation, parts- cleaning design, etc.) can reduce defectivity and improve product yield.

And as the roadmap for 450mm is further defined, there will be more facility and infrastructure projects to come.

The G450C and F450C will continue to coordinate globally to ensure a cost-effective facility transition from 300mm to 450mm. In uncertain economic times, it is electrifying to witness unparalleled collaboration where companies that normally compete in the free market have joined together to deliver a safe, cost-efficient and sustainable fab of the future.

The 2013 market for semiconductor wet chemicals (acids, bases and solvents) totaled $1.03B, up six percent over 2012, according to a new report from Techcet Group, “Wet Chemicals for Semiconductor Device Processing 2014, A Techcet Group Critical Materials Report.” The 2014 outlook is for eight percent additional growth to $1.11B. The semiconductor wet chemicals market is expected to grow to $1.36B by 2018, according to Techcet’s forecast. Current growth in wet chemicals revenue tracks the increase in wafer starts and further boosted by price increases driven by higher raw materials costs.

As <32nm nodes move toward volume production, there is a continuing trend toward the use of more dilute chemistries and smaller chemical volumes per process step. Overall process cost reduction and a smaller environmental footprint combine to drive this trend. The continuing shrinkage of device features is also driving the reinvestigation of alternative process technologies such as supercritical CO2 all plasma processing, and UV-ozone cleaning.

The global market is distributed among seven major players with five percent share or greater, led by BASF and Kanto in the first tier. There are, however, vast differences in market leadership by region, with BASF leading in Europe, Taiwan and China, and Kanto leading in Singapore and Japan. KMG continues to expand its US market share dominance with its acquisition of OM Group’s Ultra Pure Chemicals business in June, 2013.

The semiconductor wet chemical industry is vulnerable to several situations playing out in the general chemical industry as well as international politics. Semiconductor-grade nitric acid supplies were disrupted by a May 2012 explosion at El Dorado Chemical Company, and are not expected to fully recover until mid-2015. US shale oil production is providing some price escala- tion relief from Middle East petroleum supplies, providing relief in solvents and polyethylene products. New mining activity for phosphor and fluorspar around the world is starting to reduce dependence on China, providing some relief for hydrofluoric and phosphoric acid supplies.

In addition to market analysis, technical trends, critical supply chain issues and EH&S activities, the report includes profiles and updates for thirteen major chemical suppliers to the global semiconductor industry.

Techcet Group, LLC specializes in technical trend analysis and market analysis for the semiconductor, silicon, PV and related electronics industries. The company has been responsible for producing the International Sematech Critical Material Reports since 2001.

Entropic announced plans today to close and consolidate several global facilities, a move that would impact approximately 23 percent of Entropic’s headcount. In its official release, Entropic said these plans are intended to align its cost structure around providing more focused engineering, R&D and product development programs.

Today’s actions, which are expected to be substantially completed by the fourth quarter of 2014, will place a higher concentration of engineering, R&D and product development efforts in San Diego, Irvine and San Jose, California, with specialized and local efforts maintained in Shanghai and Shenzhen, China and Belfast, Northern Ireland. Entropic will close major engineering sites in Austin, Texas; Israel; India; and Taiwan. By consolidating sites, Entropic anticipates it will be able to reduce product development complexity, create immediate operational efficiencies, and lower structural overhead costs.

Entropic offered approximately 30 percent of the staff in the facilities closing an opportunity to relocate to one of its California sites and expects to have approximately 500 employees at year’s end. Entropic is offering transition assistance to those impacted by the restructuring.

“Our actions today, while difficult to make as they affect our team of dedicated, talented employees, will enable Entropic to better target resources, improve short-term performance and accelerate our path to profitability while maintaining the proper level of investment in product development, the commercialization of new products, and general customer and design-win support,” said Patrick Henry, president and chief executive officer, Entropic.

Beginning in the fourth quarter of 2014, Entropic expects to realize approximately $6 million in quarterly savings, primarily in operating expenses mainly related to personnel and facilities expenses, with annualized savings in those same areas projected at $24 million.

The Company expects to incur a total pre-tax restructuring charge of approximately $5 million, of which roughly 75 percent is expected to be cash expenditures.

Today, Entropic also announced it lowered its previously announced financial guidance for the second quarter of 2014. Entropic now expects revenue for the second quarter to be in the range of $50 million to $51 million.

The Semiconductor Industry Association (SIA) yesterday announced that worldwide sales of semiconductors reached $26.34 billion for the month of April 2014, an increase of 11.5 percent from the April 2013 total of $23.62 billion and a slight uptick of 0.7 percent compared to last month’s total of $26.15 billion. Sales in the Americas increased 14.7 percent year-over-year in April, leading all regions. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. Additionally, a new WSTS industry forecast projects continued growth for 2014 and 2015.

“The global semiconductor market maintained its strong momentum in April, with year-over-year sales increasing across every region and product category,” said Brian Toohey, president and CEO, Semiconductor Industry Association. “The market remains well ahead of the pace set in 2013, which was a record year for semiconductor revenues. April marked the twelfth consecutive month that year-over-year sales have increased, and we expect that trend to continue during the remainder of 2014 and into 2015.”

Regionally, sequential monthly sales increased in Asia Pacific (1.7 percent) and Japan (1.1 percent), but decreased in Europe (-0.6 percent) and the Americas (-1.6 percent). Compared to April 2013, sales increased in the Americas (14.7 percent), Asia Pacific (12.5 percent), Europe (8.2 percent), and Japan (4.4 percent – the region’s largest increase in more than three years).

Additionally, SIA today endorsed the WSTS Spring 2014 global semiconductor sales forecast, which projects the industry’s worldwide sales will reach $325.4 billion in 2014, a 6.5 percent increase from the 2013 sales total. This reflects a revision up from the WSTS Fall 2013 forecast, which projected 4.1 percent growth in 2014. WSTS now predicts year-over-year increases for 2014 in Asia Pacific (9.3 percent), Europe (7.9 percent), and the Americas (2.1 percent), with a slight decline projected for Japan (-1.3 percent).

Beyond 2014, the industry is expected to grow steadily and moderately across all regions, according to the WSTS forecast. WSTS predicts 3.3 percent growth globally for 2015 ($336.1 billion in total sales) and 4.3 percent growth for 2016 ($350.5 billion). WSTS tabulates its semi-annual industry forecast by convening an extensive group of global semiconductor companies that provide accurate and timely indicators of semiconductor trends.

April 2014
Billions
Month-to-Month Sales
Market Last Month Current Month % Change
Americas 5.08 5.00 -1.6%
Europe 3.08 3.06 -0.6%
Japan 2.81 2.84 1.1%
Asia Pacific 15.18 15.43 1.7%
Total 26.15 26.34 0.7%
Year-to-Year Sales
Market Last Year Current Month % Change
Americas 4.36 5.00 14.7%
Europe 2.83 3.06 8.2%
Japan 2.72 2.84 4.4%
Asia Pacific 13.71 15.43 12.5%
Total 23.62 26.34 11.5%
Three-Month-Moving Average Sales
Market Nov/Dec/Jan Feb/Mar/Apr % Change
Americas 5.59 5.00 -10.6%
Europe 2.95 3.06 3.7%
Japan 2.84 2.84 0.0%
Asia Pacific 14.87 15.43 3.8%
Total 26.25 26.34 0.3%

 

Plasma-Therm, a global provider of semiconductor equipment, has again been ranked number one in an independent survey of customers, the company announced today. This is the third year in a row that Plasma-Therm received a “RANKED 1st” award, and the 16th consecutive year that the company has won awards in the VLSIresearch Customer Satisfaction Survey.

“We are grateful to be ranked first by our customers for customer satisfaction,” said Plasma-Therm CEO Abdul Lateef. “The semiconductor market segments that we serve recognize the quality of Plasma-Therm products and the value provided by our Customer Focused approach.”

‘Plasma-Therm’s repeat appearances among this elite group of suppliers demonstrates its commitment to product quality, after-sale support, and technical leadership,” said G. Dan Hutcheson, Chairman and CEO of VLSIresearch. “We congratulate Plasma-Therm on again being ranked first by its customers in the Etch and Clean Equipment category.”

The latest award — “RANKED 1st” in the category Suppliers of Etch & Clean Equipment — is the third award resulting from this year’s Customer Satisfaction Survey. Plasma-Therm also received a 2014 “10 BEST” award in the category “Focused Suppliers of Chip Making Equipment,” and a 2014 “THE BEST” award in the category “Fab Equipment Suppliers.”

According to VLSIresearch, the annual Customer Satisfaction Survey is the only publicly available opportunity since 1988 for customers to provide feedback to suppliers of semiconductor, display, and solar-power equipment, as well as suppliers of related materials and subsystems.

Plasma-Therm develops and manufactures systems for plasma processing, which are used to etch and deposit high-tech materials. Its products, including VERSALINE and MicroDieSingulator, perform critical process steps for fabricating integrated circuits, photomasks, LEDS, power devices, and other forms of nanotechnology that are used in everything from smartphones and cars to research labs and space-exploration missions.

Survey participants worldwide were asked to rate equipment suppliers among 15 categories based on three key factors: supplier performance, customer service, and product performance. A total of 3,516 surveys were returned, resulting in 55,918 total responses, VLSIresearch said.