Category Archives: Packaging and Testing

In September 2013, EPSON announced its next generation inkjet technology, PrecisionCore, introducing for the first time MEMS inkjet heads manufactured with thin film PZT technology. This announcement has been highly publicized: first, thin film PZT MEMS applications are now on the market, proving the reliability and maturity of this technology. Second, more inkjet head players will soon follow.

“Thin film piezoelectric materials are gaining increasingly more importance within the MEMS industry. Although semiconductor manufacturing companies are historically reluctant to introduce such exotic materials into their production lines, every major MEMS foundry nowadays is working on the implementation and qualification of piezoelectric thin film in their MEMS manufacturing processes,” explains Claire Troadec, Market & Technology Analyst, Semiconductor Manufacturing, at Yole Développement.

Lead zirconium titanate or PZT (Pb[ZrxTi1-x]O3 with 0 ≤ x ≤ 1)) is a very interesting ferroelectric material. Depending on its composition, it has the advantage of combining 3 different material properties: high dielectric constant, pyroelectric effect and piezoelectric effect. Its high dielectric constant property is still extensively being used with the integration of thin film PZT in Integrated Passives Devices (IPDs) and to a lesser extent in Ferroelectric memories (FeRAM). These have been the 2 leading applications for thin film PZT for many years. NXP Semiconductors and STMicroelectronics dominate this IPD market.

The pyroelectric effect of PZT is today being used by Pyreos for thin film PZT based uncooled Infrared detectors, although this thin film PZT based technology remains quite marginal in this field. The most promising effect of PZT for future applications would certainly be its piezoelectric effect. Companies like Wavelens and PoLight are extensively working on the introduction of their autofocus based products to the market using thin film PZT technology. This profusion of new MEMS applications using thin film PZT technology is just beginning.

Click to view full size.

Click to view full size.

The roadmap for high volume production is still to be built

The main difficulty for thin film PZT technology is the integration of this exotic material into a robust and reproducible process flow. There are major technological challenges associated with thin film PZT integration into a product : deposition, etching, process monitoring, test, reliability. These are complex topics and although many R&D efforts have been made so far by labs, equipment and material suppliers, and device manufacturers, some work remains to be done to achieve robust products for high volume production.

Sol-Gel gives better intrinsic film properties as deposited thin film PZT, with good uniformity and higher breakdown voltages. But when considering high volume production, throughput becomes a major consideration and this is where Sol-Gel shows some limitations. Many equipment manufacturers within the semiconductor industry are thus working on a more classical solution: Sputtering.

ULVAC was among the first companies to develop thin film PZT deposition based on a PVD process and today, they have the more reliable PVD technology. Big semiconductor players like Applied Materials started preparing to compete in this market 18 month ago. They are rapidly ramping up their activities on thin film PZT. Meanwhile players like Oerlikon and SolMateS are continuing to improve their deposition technology, be it PVD or Pulsed Laser Deposition technology. They both show very promising results. SolMateS is a very interesting case: with their recent PLD technology and smaller company size, they end up competing with large PVD equipment manufacturers in this thin film PZT manufacturing area.

The thin film PZT manufacturing battle is only beginning, and the next five years are going to be very interesting.

In their new report, Yole Développement evaluates each thin film PZT deposition technology and compare them. The analysts’ team describes all key thin film PZT based applications. Yole Développement presents a roadmap for each key player with their expected year for market entry. Finally, they present their thin film PZT production forecasts for the 2013-2018 period.

MEMS Industry Group (MIG)’s MEMS Executive Congress — held November 7-8, 2013 in Napa, CA — showed why the MEMS industry is outpacing the semiconductor industry, in both growth and innovation. With a ten percent increase in attendance over 2012 and market analysts such as IHS Inc.’s Jérémie Bouchaud predicting that the MEMS industry will grow twice as fast as the semiconductor industry — MEMS Executive Congress highlighted innovation through presentations, panels and awards.

Gregg Bartlett, chief technology officer, GLOBALFOUNDRIES, captured the buoyant mood during the opening keynote presentation. “MEMS is an innovation race, not an arms race. If you can dream it, it can be built,” said Bartlett. “That’s the beauty of MEMS. It is limited only by someone’s ability to conceive it.”

From market analysts such as Yole Développement’s Laurent Robin, who described a wider variety of MEMS in the smartphone of 2018, to HTC America’s Gary Yao, who predicted that watches, glasses and wearable patches will join smartphones in our connected world of 2020, event speakers cited the critical role of consumer and mobile markets in the growth of MEMS.

The Winners: MEMS Innovation Awards and MEMS Technology Showcase
MEMS Executive Congress also celebrated innovation through MIG’s first MEMS Innovation Awards. “We are delighted to recognize STMicroelectronics as a multiple award-winner in our MEMS Innovation Awards,” said Karen Lightman, executive director, MEMS Industry Group. “ST won device of the year for its 2×2 eCompass and MEMS Company of the Year as well as MEMS Executive of the Year for Benedetto Vigna.”

“We are also thrilled to announce that SPTS Technologies earned MEMS Supplier of the Year, Samsung won MEMS Integrator of the Year, and Maxim Integrated’s Demetre Kondylis was recognized for a Lifetime Achievement Award.”

MEMS Executive Congress attendees also had the chance to vote for the best live demo given during MIG’s third annual MEMS Technology Showcase. For the first time in its history, there was a tie: DigitalOptics’ mems|cam product and MicroGen’s BOLT Power Cell both shared the crown.

More Recognition: MIG’s Hall of Fame
MIG also used the forum to induct two new MIG members into its annual Hall of Fame: Alissa M. Fitzgerald, founder and managing member, A.M. Fitzgerald & Associates, and Michael Gaitan, group leader, NIST.

Read more on MEMS at MIG Managing Director Karen Lightman’s blog

STMicroelectronics has been selected by MEMS Industry Group and affiliated voters as the Company of the Year for its continuing success in growing its MEMS business, expanding its product line, and demonstrating industry leadership and vision. Adding to ST’s Company of the Year recognition, Executive Vice President and General Manager of ST’s Analog, MEMS & Sensors Group, Benedetto Vigna, was acknowledged as Executive of the Year, and the LSM303C 2mmx2mm e-Compass captured Device of the Year recognition.

Vigna’s selection acknowledges his leadership in building ST’s MEMS business beyond the $1 billion per year revenue threshold – the first company to achieve that success – and driving the expansion of the use of MEMS technology into new markets and applications. His managerial achievements are complemented by his technical contributions, where he holds more than 150 patents.

The company’s very compact e-Compass accurately detects the direction and magnitude of external magnetic fields, using an accelerometer to compensate for tilt, ensuring a very accurate compass heading even when portable devices are inclined. As the world’s smallest e-Compass, the LSM303C is ideal for use in all smartphones and innovative context-sensitive devices used throughout the home, workplace, and in wellness and leisure activities. Moreover, when used together with ST’s MEMS gyroscopes, it can support even more advanced movement and position-related functionality.

The presentation of the first annual Innovation in MEMS Awards took place Friday, November 8th at MEMS Executive Congress, the key annual conference and networking event organized by MEMS Industry Group.

“There is no higher form of praise than recognition by one’s peers, and that is certainly true of ST-which earned an astounding three out of a possible six MEMS Innovation Awards through votes cast by MEMS Industry Group member companies and partners,” said Karen Lightman, executive director, MEMS Industry Group. “ST’s achievements as a company, the tremendous contributions of Benedetto Vigna, and the company’s LSM303C 2mmx2mm e-Compass are all deserving winners. We are so pleased to recognize ST as a multiple award-winner.”

CEA-Leti, Fraunhofer IPMS-CNT and three European companies — IPDiA, Picosun and SENTECH Instruments — have launched a project to industrialize 3D integrated capacitors with world-record density.

The two-year, EC-funded PICS project is designed to develop a disruptive technology through the development of innovative ALD materials and tools that results in a new world record for integrated capacitor densities (over 500nF/mm2) combined with higher breakdown voltages. It will strengthen the SME partners’ position in several markets, such as automotive, medical and lighting, by offering an even higher integration level and more miniaturization.

The fast development of applications based on smart and miniaturized sensors in aerospace, medical, lighting and automotive domains has increasingly linked requirements of electronic modules to higher integration levels and miniaturization (to increase the functionality combination and complexity within a single package). At the same time, reliability and robustness are required to ensure long operation and placement of the sensors as close as possible to the “hottest” areas for efficient monitoring.

For these applications, passive components are no longer commodities. Capacitors are indeed key components in electronic modules, and high-capacitance density is required to optimize – among other performance requirements – power-supply and high decoupling capabilities. Dramatically improved capacitance density also is required because of the smaller size of the package.

IPDiA has for many years developed an integrated capacitors technology that out performs current technologies (e.g. tantalum capacitors) in terms of stability in temperature, voltage, aging and reliability. Now, a technological solution is needed to achieve higher capacitance densities, reduce power consumption and improve reliability. The key enabling technology chosen to bridge this technological gap is atomic layer deposition (ALD) that allows an impressive quality of dielectric.

The PICS project consortium will address all related technological challenges and set up a cost-effective industrial solution. Picosun will develop ALD tools adapted to IPDiA’s 3D trench capacitors. SENTECH Instruments will provide a new solution to more accurately etch high-K dielectric materials. CEA-Leti and Fraunhofer IPMS-CNT will help the SMEs create innovative technological solutions to improve their competitiveness and gain market share. Finally, IPDiA will manage the industrialization of these processes.

About PICS The PICS project has received funding from the European Union’s Seventh Framework Program managed by REA-Research Executive Agency http://ec.europa.eu/rea (FP7/2007-2013) under grant agreement n° FP7-SME-2013-2-606149.

The PICS Project will last for two years and the consortium consists of three SMEs: IPDiA (France, coordinator), Picosun (Finland) and Sentech Instruments (Germany), and two leading research organizations: Fraunhofer IPMS-CNT (Germany) and CEA-Leti (France). Project objectives are to bring to mass production high density and high voltage capacitors based on ALD and etching development. Further information is available at www.fp7-pics.eu

 

About IPDiA IPDiA is a preferred supplier of high performance, high stability and high reliability silicon passive components to customers in the medical, automotive, communication, computer, industrial, and defense/aerospace markets. The company portfolio includes standard component devices such as silicon capacitors, RF filters, RF baluns, ESD protection devices as well as customized devices. IPDiA headquarters are located in Caen, France. The company operates design centers, sales and marketing offices and a manufacturing facility certified ISO 9001 / 14001 / 18001 / 13485 as well as ISO TS 16949 for the Automotive market. For further information, please visit www.ipdia.com

About Picosun Picosun is the world leading provider of ALD solutions for global industries. Picosun’s pioneering, unmatched expertise in ALD equipment design and manufacturing reaches back to the invention of the technology itself. Today, PICOSUN™ ALD systems are in daily production use in numerous prominent industries around the globe. Picosun is based in Finland, it has its subsidiaries in USA and Singapore, and world-wide sales and support network. For more information, visit www.picosun.com.

 

About SENTECH Instruments SENTECH Instruments GmbH develops, manufactures, and sells worldwide advanced quality instrumentation for Plasma Process Technology, Thin Film Measurement, and Photovoltaics. The medium-sized company founded in 1990 has grown fast over the last decades and has today 60 employees. SENTECH is located in Berlin, capital of Germany, and has moved to its own company building in 2010 in order to expand its production facilities.

SENTECH plasma etchers and deposition systems including ALD support leading-edge applications. They feature high flexibility, reliability, and low cost of ownership. SENTECH’s plasma products are developed and manufactured in-house and thus allow for customer-specific adaptations. More than 300 units have been sold to research facilities and industry for applications in nanotechnology, micro-optics, and optoelectronics. More information: www.sentech.de

About Fraunhofer IPMS-CNT Fraunhofer IPMS-CNT is a German research institute that develops advanced 300 mm semiconductor process solutions for Front-End and Back-End-of Line applications on state-of-the-art process- and analytical equipment. Research is focused on process development enabling 300 mm production, innovative materials and its integration into Systems (SoC/SiP) as well as nanopatterning through electron beam lithography. Fraunhofer is largest application-oriented research organization in Europe with 66 institutes and 22,000 employees. More information:  www.cnt.fraunhofer.de

About CEA-Leti By creating innovation and transferring it to industry, Leti is the bridge between basic research and production of micro- and nanotechnologies that improve the lives of people around the world. Backed by its portfolio of 2,200 patents, Leti partners with large industrials, SMEs and startups to tailor advanced solutions that strengthen their competitive positions. It has launched more than 50 startups. Its 8,000m² of new-generation cleanroom space feature 200mm and 300mm wafer processing of micro and nano solutions for applications ranging from space to smart devices. Leti’s staff of more than 1,700 includes 200 assignees from partner companies. Leti is based in Grenoble, France, and has offices in Silicon Valley, Calif., and Tokyo. Visit www.leti.fr for more information.  

STMicroelectronics announced on Tuesday it has won a prestigious BearingPoint Innovation Management Award for its FD-SOI technology in the “Innovation Ecosystem” category.

Over the past 50 years, the semiconductor industry’s efforts to meet the growing demand for computing power have followed Moore’s Law, which recognized that the number of transistors on integrated circuits doubles approximately every two years. But as electronic circuits get smaller and smaller, chip manufacturers have run into basic physical scaling issues in transistor design that have now limited performance. A major breakthrough in the pursuit of miniaturization of electronic circuits, ST’s Fully Depleted Silicon-On-Insulator (FD-SOI) technology has proven its ability to deliver about 30 percent higher speed and 30 percent improvement in energy consumption for the chips that power today’s digital electronic equipment. FD-SOI can bring significantly lower consumption to all the devices associated with the creation, transmission, storage and consumption of digital content from the network to the mobile device, helping not only to improve the quality of life of the people who use them, but also addressing major societal challenges in energy saving.

BearingPoint is an independent management and technology consultancy serving clients in more than 70 countries together with its global consulting network. BearingPoint combines industry, operational and technology skills with relevant proprietary and other assets in order to tailor solutions for each client’s individual challenges.

For the sixth edition, the Innovation Management Awards were organized by BearingPoint in collaboration with the editorial board of the French magazine L’Expansion and the Ecole des Ponts ParisTech, a prestigious French school of engineering. Based on inputs from 360 decision makers (companies and public bodies), 60 applications were proposed this year. From these, twenty-three cases that illustrate the best practices of innovation in management were submitted to a jury of experts who rewarded a winning company in each of the four categories.

“STMicroelectronics strategically chose to include multiple partners at the earliest stages of their R&D program. This is most remarkable! This new digital technology was then positioned as being faster in a very competitive market,” said Eric Falque, President of BearingPoint France-Benelux.

“We are honored to be distinguished by BearingPoint, L’Expansion and the Ecole des Ponts ParisTech. The fruit of scientific research, strategic vision and long-standing determination, faster, cooler and simpler FD-SOI technology strengthens ST’s role in shaping the future of the microelectronics industry,” declared Georges Penalver, Executive Vice President and Chief Strategy Officer, STMicroelectronics. “This award, like our success in delivering FD-SOI, is a major achievement for ST, its employees and its partners.”

InvenSense, Inc., the provider of MotionTracking system on chip devices, announced the opening of a new design center in Seoul, Korea. The design center strengthens InvenSense’s presence with a global expansion of its development team and is a direct extension of the software engineering team based in San Jose, California. InvenSense selected the Korean locale based on its close proximity to several of the world’s leading Original Design Manufacturers (ODM), wealth of engineering talent, and its ability to facilitate closer customer collaboration and partnership.

“Korea is an important strategic hub for the Asia Pacific region and among the most vibrant and highest growth areas for the mobile and semiconductor industries in the world,” said Behrooz Abdi, CEO and President, InvenSense, Inc. “The expansion of our presence in Korea demonstrates InvenSense’s deepened commitment to the Asia Pacific region and being strategically located near some of Asia’s largest ODMs will enable us to jointly innovate next-generation solutions.”

The design center is currently staffed with a team of engineers with extensive experience in developing MEMS system on chip (SoC) software and solutions.

InvenSense technology can be found in consumer electronic products including smartphones, tablets, gaming devices, optical image stabilization, and remote controls for Smart TVs. The company’s MotionTracking products are also being integrated into a number of industrial applications. InvenSense is headquartered in San Jose, California and has offices in China, Taiwan, Korea, Japan, and Dubai.

Experts in aerospace, automotive, mobile communications, Smart Cities and more join semiconductor leaders to shape the future of microelectronics at the International Technology Partners Conference (ITPC), to be held in Maui, Hawaii, on November 10-13. Teamwork and collaboration are critical elements of nearly all the major accomplishments of our time, and ITPC (www.semi.org/itpc) is specifically designed to create and promote business partnering dialog and relationships among the world’s top executives in the nano- and microelectronics manufacturing supply chains.  Now on its 28th edition, ITPC consistently attracts high-level executives from all over the world; this year the focus will be on addressing strategic investment and market and technology issues in the semiconductor value chain.

The participants at the International Technology Partners Conference have the power to alter the direction of the industry. From the speakers to attendees, their ideas drive technology roadmaps and shift market share.  Powerful speakers and a thought-provoking agenda are central to the event, with keynotes from:

  • IBM: Michael J. Cadigan, VP/GM, Microelectronics and Systems Technology Group
  • Intel: Wen-Hann Wang, VP, Intel Labs; director, Circuits and System Research
  • NASA Caltech Jet Propulsion Laboratory: Michael Watkins, Mission manager, Curiosity Mars Rover; manager, Science Division
  • Toyota Motor Corporation: Hiroyoshi Yoshiki, managing officer

ITPC’s three day agenda is business centric with a social component.  The format is designed with structured presentations and panel discussion on industry issues and unstructured free time for attendees to further explore topics of interest with other attendees.

Sessions include:

  • Growth Engines — Trends in Market Drivers: with Bill McClean, president, IC Insights and Raj Talluri, senior VP, product management, Qualcomm Technologies.
  • Driving towards the Future: Luc Van den hove, president and CEO, imec and James A. O’Neil, senior VP, Electronic Materials, ATMI Inc.
  • Engines of Innovation — Manufacturing Technology: Eric Meurice, chairman, ASML Holding and Atsuyoshi Koike, senior VP, Technology and Fab Operations, SanDisk; president, SanDisk (Japan) Limited
  • Accelerating Opportunities: Akihiko Tobe, GM, Smart City Project Division, Social Innovation Business Project Division, Hitachi, and Hans Stork, CTO, senior VP, ON Semi

This year, there are three panels at ITPC, which include: Engines of Learning: with Edwards Group, Egon Zehnder, KLA-Tencor, SanDisk (Japan), SMIC; Start Your Engines: CTO Principles of Innovation: with Applied Materials, Global 450mm Consortium (TSMC Assignee), Lam Research, VLSI Research, sk Hynix; and A Forum on Industry R&D Collaboration: with Global 450mm Consortium, IBM, imec, Intel, KLA-Tencor, Tokyo Electron America

ITPC is organized by SEMI and supported and sponsored by: ATMI, AZ Electronic Materials, Applied Materials, Ebara, Edwards, Hitachi High Tech, Horiba, KLA-Tencor, Lam Research, SCREEN, Tokyo Electron, Valqua America, Inc.

The International Technology Partners Conference will be held November 10-13, 2013 at the Wailea Beach Marriott in Maui, Hawaii. For registration and more information: visit www.semi.org/itpc.

STMicroelectronics this week has announced that all six of its front-end manufacturing sites have achieved certification to the latest, most stringent ISO 50001 energy-management standard.

The certification process involved developing tools to systematically measure the energy consumption of each piece of equipment, including buildings, and chiller and compressed dry-air equipment, and to analyze the sites’ overall energy usage. A common platform, which includes a documentation database, reporting tools and processes, has been developed and shared internally to establish and promote best practices. ST estimates that the certification process will contribute to saving 14 GWh of energy and US$ 2m in the 2013-2014 timeframe.

ST’s Agrate site in Italy was the first to achieve the ISO 50001 certification, followed quickly by Catania in Italy and ST’s other front-end sites in France (Crolles, Rousset, Tours) and Singapore (Ang Mo Kio). Each manufacturing site is committed to implementing energy-performance indicators to both monitor and optimize its consumption of electricity and natural gas and explore all opportunities to minimize the amount of energy used, reducing greenhouse gas emissions.

“Environmental performance and energy management are rooted in ST’s culture and have been a priority since the creation of the Company. We had started to upgrade our energy-management systems in anticipation of ISO 50001 before the standard was finalized. Today, our products and technologies are recognized as enabling low energy consumption for the end user. It is completely complementary now for our manufacturing sites producing those products to be certified; an acknowledgement of the substantial work undertaken at sites for better energy consumption and management,” said Edwin Dobson, director facilities, Front-End Manufacturing and Technologies, STMicroelectronics.

3D-IC: Two for one


September 25, 2013

Zvi Or-Bach, President & CEO of MonolithIC 3D Inc. blogs about upcoming events related to 3D ICs.

This coming October there are two IEEE Conferences discussing 3D IC, both are within an easy drive from Silicon Valley.

The first one is the IEEE International Conference on 3D System Integration (3D IC), October 2-4, 2013 in San Francisco, and just following in the second week of October is the S3S Conference on October 7-10 in Monterey. The IEEE S3S Conference was enhanced this year to include the 3D IC track and accordingly got the new name S3S (SOI-3D-Subthreshold). It does indicate the growing importance and interest in 3D IC technology.

This year is special in that both of these conferences will contain presentations on the two aspects of 3D IC technologies. The first one is 3D IC by the use of Through -Silicon-Via which some call -“parallel” 3D and the second one is the monolithic 3D-IC which some call “sequential.”

This is very important progress for the second type of 3D IC technology. I clearly remember back in early 2010 attending another local IEEE 3D IC Conference: 3D Interconnect: Shaping Future Technology. An IBM technologist started his presentation titled “Through Silicon Via (TSV) for 3D integration” with an apology for the redundancy in his presentation title, stating that if it 3D integration it must be TSV!

 Yes, we have made quite a lot of progress since then. This year one of the major semiconductor research organization – CEA Leti – has placed monolithic 3D on its near term road-map, and was followed shortly after by a Samsung announcement of mass production of monolithic 3D non volatile memories – 3D NAND.

We are now learning to accept that 3D IC has two sides, which in fact complement each other. In hoping not to over-simplify- I would say that main function of the TSV type of 3D ICs is to overcome the limitation of PCB interconnect as well being manifest by the well known Hybrid Memory Cube consortium, bridging the gap between DRAM memories being built by the memory vendors and the processors being build by the processor vendors. At the recent VLSI Conference Dr. Jack Sun, CTO of TSMC present the 1000x gap which is been open between  on chip interconnect and the off chip interconnect. This clearly explain why TSMC is putting so much effort on TSV technology – see following figure:

System level interconnect gaps

System level interconnect gaps

On the other hand, monolithic 3D’s function is to enable the continuation of Moore’s Law and to overcome the escalating on-chip interconnect gap. Quoting Robert Gilmore, Qualcomm VP of Engineering, from his invited paper at the recent VLSI conference: As performance mismatch between devices and interconnects increases, designs have become interconnect limited. Monolithic 3D (M3D) is an emerging integration technology that is poised to reduce the gap significantly between device and interconnect delays to extend the semiconductor roadmap beyond the 2D scaling trajectory predicted by Moore’s Law…” In IITC11 (IEEE Interconnect Conference 2011) Dr. Kim presented a detailed work on the effect of the TSV size for 3D IC of 4 layers vs. 2D. The result showed that for TSV of 0.1µm – which is the case in monolithic 3D – the 3D device wire length (power and performance) were equivalent of scaling by two process nodes! The work also showed that for TSV of 5.0µm – resulted with no improvement at all (today conventional TSV are striving to reach the 5.0µm size) – see the following chart:

Cross comparison of various 2D and 3D technologies. Dashed lines are wirelengths of 2D ICs. #dies: 4.

Cross comparison of various 2D and 3D technologies. Dashed lines are wirelengths of 2D ICs. #dies: 4.

So as monolithic 3D is becoming an important part of the 3D IC space, we are most honored to have a role in these coming IEEE conferences. It will start on October 2nd in SF when we will present a Tutorial that is open for all conference attendees. In this Monolithic 3DIC Tutorial we plan to present more than 10 powerful advantages being opened up by the new dimension for integrated circuits. Some of those are well known and some probably were not presented before. These new capabilities that are about to open up would very important in various market and applications.

In the following S3S conference we are scheduled on October 8, to provide the 3D Plenary Talk for the 3D IC track of the S3S conference. The Plenary Talk will present three independent paths for monolithic 3D using the same materials, fab equipment and well established semiconductor processes for monolithic 3D IC. These three paths could be used independently or be mixed providing multiple options for tailoring differently by different entities.

Clearly 3D IC technologies are growing in importance and this coming October brings golden opportunities to get a ‘two for one’ and catch up and learn the latest and greatest in TSV and monolithic 3D technologies — looking forward to see you there.

STMicroelectronics announced this week that its STM32 microcontroller is the brain controlling the innovative Pebble Smartwatch for iPhone and Android.

The Pebble Smartwatch seamlessly connects to iPhone and Android smartphones using Bluetooth to alert users with a silent vibration to incoming calls, emails and text messages. The outstanding real-time performance and power efficiency of the embedded STM32 F2 microcontroller gives Pebble users a perfect balance of functionality and battery life as well as full customizability – complete with beautiful downloadable watch faces and useful Internet-connected apps.

“Pebble wearers want a watch that connects seamlessly to their devices and can run for days so they can enjoy all the benefits of their smart watch without worrying about performance or battery life. The STM32 F2 makes that possible,” said Eric Migicovsky, Pebble’s founder and CEO.

In addition to providing the 32-bit performance and processing capacity required for advanced signal processing, the STM32 microcontroller architecture delivers real-time responsiveness, exceptional power efficiency, and highly integrated peripherals and memory required for the most demanding embedded applications.

When dealing with wearable technology, the packaging size is also extremely important. At just 4mm x 4mm, the STM32 F205 chip uses a minimal amount of space while delivering unprecedented performance and battery life.

In addition to the STM32 microcontroller, Pebble also uses ST’s LIS3DH MEMS digital-output motion sensor. The LIS3DH senses acceleration along all three axes and contributes to the watch’s usefulness via ultra low-power operational modes that allow advanced power saving and smart embedded functions.

“The initial interest from consumers for this category-creating device shows that people are looking for an interactive experience in a fashionable and exceptionally functional product,” said Tony Keirouz, Vice President Marketing and Applications at STMicroelectronics’ Americas Region. “Pebble’s choice of our STM32 microcontroller technology demonstrates how effectively our microcontroller “brains” have revolutionized electronic product design by redefining familiar design tradeoffs such as performance, cost, power consumption, ease of use and scalability.”