Category Archives: Packaging

Keysight Technologies, Inc. (NYSE: KEYS), a technology company that helps enterprises, service providers, and governments accelerate innovation to connect and secure the world, has acquired Thales Calibration Services in Melbourne, Australia, a subsidiary of Thales Group, effective July 2, 2018. This acquisition establishes Keysight as the largest calibration and support services organization in Australia.

Thales Calibration Services is a world-class commercial calibration facility specializing in dimensional, pressure, mass, and temperature metrology. Located in Melbourne, Thales Calibration was originally established to provide dimensional support, but expanded its capabilities and accreditation over the past several decades. It is now the largest commercial non-electronic metrology lab in Australia servicing the defense, commercial, medical, petro-chemical, and pharmaceutical industries.

“This acquisition complements our existing electrical portfolio, creating new opportunities for Keysight to support the defense sector in Australia,” said Bor-Chun Gooi, general manager for Keysight’s Managed Services Division East. “Now, Keysight is the largest calibration provider in Australia, offering customers a one stop services solution provider.”

IC Insights recently released its Mid-Year Update to The McClean Report 2018.  The update includes a revised forecast of the largest and fastest-growing IC product categories this year.  Sales and unit growth rates are shown for each of the 33 IC product categories defined by the World Semiconductor Trade Statistics (WSTS) organization in the Mid-Year Update.

The five largest IC product categories in terms of sales revenue and unit shipments are shown in Figure 1.  With forecast sales of $101.6 billion, (39% growth) the DRAM market is expected to be the largest of all IC product categories in 2018, repeating the ranking it held last year.  If the sales level is achieved, it would mark the first time an individual IC product category has surpassed $100.0 billion in annual sales. The DRAM market is forecast to account for 24% of IC sales in 2018.  The NAND flash market is expected to achieve the second-largest revenue level with total sales of $62.6 billion this year. Taken together, the two memory categories are forecast to account for 38% of the total $428.0 billion IC market in 2018.

Figure 1

For many years, the standard PC/server MPU category topped the list of largest IC product segments, but with ongoing increases in memory average selling prices, the MPU category is expected to slip to the third position in 2018.  In the Mid-Year Update, IC Insights slightly raises its forecast for 2018 sales in the MPU category to show revenues increasing 5% to an all-time high of $50.8 billion, after a 6% increase in 2017 to the current record high of $48.5 billion.  Helping drive sales this year are AI-controlled systems and data-sharing applications over the Internet of Things.  Cloud computing, machine learning, and the expected tidal wave of data traffic coming from connected systems and sensors is also fueling MPU sales growth this year.

Two special purpose logic categories—computer and peripherals, and wireless communications—are forecast to round out the top five largest product categories for 2018.

Four of the five largest categories in terms of unit shipments are forecast to be some type of analog device.  Total analog units are expected to account for 54% of the total 318.1 billion IC shipments forecast to ship this year.  Power management analog devices are projected to account for 22% of total IC units and are forecast to exceed the combined unit shipment total of the next three categories on the list.  As the name implies, power management analog ICs help regulate power usage and to keep ICs and systems running cooler, to manage power usage, and ultimately to help extend battery life—essential qualities for an increasingly mobile and battery-powered world of devices.

TDK Corporation (TSE:6762) has developed the new MPZ0603-H series of multilayer chip beads for power lines in an IEC 0603 package (EIA 0201) that feature twice the rated current and about half the DC resistance of the existing MPZ0603-C series. Thanks to a newly developed technology for the internal electrodes, TDK was able to reduce the DC resistance to as low as 36 mΩ, thus increasing the rated current to as high as 1900 mA. The MPZ0603-H series offers high impedance values ranging from 22 Ω to 120 Ω at 100 MHz. The new chip beads measure in with a miniature footprint of 0.6 mm x 0.3 mm and a low insertion height of just 0.3 mm. With their compact dimensions and excellent electrical specifications the ferrite beads are very well suited for a wide spectrum of noise suppression measures in the IC power supply lines of smartphones, audio players, PCs, and other devices. Mass production of the new series began in August 2018.

As the multifunctionality of portable devices such as smartphones continues to grow, high current ratings are becoming an increasingly important factor for components in the IC power supply lines. Thanks to their low DC resistance the MPZ0603-H chip beads not only offer a high rated current, but they also help lower the power consumption of devices.

Main applications

  • Noise suppression in the IC power supply lines in smartphones, audio players, PCs, and other devices

Main features and benefits

  • DC resistance as low as 36 mΩ approximately half that of existing products
  • Rated current as high as 1900 mA approximately twice that of existing products

By Laith Altimime

In a bid to reinvigorate Europe’s electronics strategy and strengthen the region’s position in key emerging technologies, European electronics industry CEOs in June called on public and private actors to accelerate collaboration at the European Union and national levels. The CEO’s proposed new strategic actions include creating a European Design Alliance to pool the expertise of design houses and forming an electronics education and skills task force consisting of representatives from industry, research, European institutions, member states and SEMI.

The business executive’s calls – embodied in “Boosting Electronics Value Chain in Europe,” a report submitted to Mariya Gabriel, Commissioner for Digital Economy and Society, of the European Commission – come as global competition in the electronics industry intensifies. The document highlights Europe’s need to buttress its position amongst others in artificial intelligence (AI), autonomous driving and personalized healthcare – applications that rely on new semiconductor architectures, materials, equipment and design methodologies.

The European semiconductor industry plans to pour more than 50 billion EUR into technology development and innovation by 2025, deepening its investments in research, innovation and manufacturing to help drive Europe’s digital transformation.

For its part, SEMI, as the industry association connecting the electronics value chain, is well-positioned to bring together member companies and public actors to address key challenges facing the sector. This year in April, SEMI announced that Electronics System Design Alliance (ESD Alliance) will join SEMI, adding key electronics design companies to SEMI membership and unlocking the full potential of collaboration between electronics design and manufacturing.  With the ESD Alliance, SEMI adds the product design segment to the electronics supply chain, streamlining and connecting the full ecosystem. The integration also promises to support the industry coordination required to develop specialized (AI) chips used in various smart applications.

SEMI Europe is also accelerating its education and workforce development activities. SEMI Europe this year created its Workforce Development Council Europe, chaired by Emir Demircan, SEMI Europe’s senior manager of public policy, based in Brussels. The council is designed to connect electronics industry human resources representatives with members to evolve best practices in hiring that help Europe gain, train and retain world-class talent.

Other SEMI Europe workforce development activities include the following:

  • SEMI member forums across Europe are helping young talent with career opportunities in the semiconductor industry.
  • In November, SEMICON Europa will host a Career Café where STEM students will explore careers in electronics design and manufacturing.
  • With the participation of representatives from the European Commission, SEMI Europe’s Industry Strategy Symposium in April focused on strategies for attracting more skilled workers into electronics design and manufacturing.

Looking ahead, semiconductor sales is forecast to reach USD 1 trillion by 2030. The global semiconductor industry is at the heart of a new era of connectivity, developing breakthrough solutions for ascendant data-driven technologies such as AI and Internet of Things (IoT). SEMI Europe’s role in strengthening the region’s position in the global electronics industry to help drive this extraordinary growth is critical. SEMI Europe will continue to foster public-private partnerships to tackle industry challenges that are too big, too risky and too costly for companies and government institutions to address alone.

Contact: Laith Altimime, President, SEMI Europe, [email protected] ; Emir Demircan, Sr Manager Public Policy, [email protected]

Originally published on the SEMI blog.

Achronix Semiconductor Corporation, a developer of field programmable gate array (FPGA)-based hardware accelerator devices and embedded FPGA (eFPGA) intellectual property (IP), today announced availability of an optimized High-Level Synthesis (HLS) flow from its partner, Mentor, a Siemens business, for its FPGA technology products.

The integrated development environment enables designers to quickly go from C++ to FPGA using Mentor’s Catapult® HLS and Achronix’s ACE design tools. Initially used for 5G wireless applications to reduce the overall development effort and improve quality of results (QoR), it is suitable for any design targeting Achronix technology.

“The combination of Mentor’s powerful Catapult tools and Achronix’s embedded FPGA technology offer a truly unique value proposition for companies that require high performance FPGA technology in their SoC that can be configured using a proven C‑based design flow,” remarks Steve Mensor, Achronix’s vice president of marketing. “This combined solution is a great testament of a close working relationship between the engineering groups at Mentor and Achronix. Our initial target was 5G wireless, but the unique capabilities of the overall solution will be valuable across many market segments that require the fastest development time.”

“We are happy to welcome Achronix to the Mentor OpenDoor Program, and pleased to be an active member of the Achronix Partner Program. This open and collaborative partnership is very strategic and is already proving beneficial to our mutual customers,” notes Ellie Burns, director of marketing, Calypto Systems Division at Mentor. “Achronix eFPGA offers a tremendous ability to adapt to late changing and new requirements in a field programmable SoC. Coupled with Catapult HLS and the verification speed of C++, chip designers can now easily go from algorithm change to new low-power, high-performance hardware in days rather than weeks or months.”

The Catapult to Achronix Flow

The Catapult HLS to Speedcore embedded FPGA technology flow gives designers the ability to make algorithmic changes in late stages of IP development and to optimize the algorithm and the digital micro-architecture. The integrated verification environment allows reuse of the software tests for generated register transfer level (RTL) code, reducing the need for dedicated RTL test benches by more than 80%.

Achronix ACE design tools support Catapult’s RTL constructs and primitives. Currently Achronix libraries for its Speedcore eFPGA products and for its Speedster standalone FPGAs are integrated into the flow.

The Achronix high-performance and high-density FPGA technology can be used for diverse hardware acceleration applications in data center compute, networking and storage; 5G wireless infrastructure, network acceleration; advanced driver assistance systems (ADAS) and autonomous vehicles.

Availability

Early versions of the design and development environment are available now.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $117.9 billion during the second quarter of 2018, an increase of 6.0 percent over the previous quarter and 20.5 percent more than the second quarter of 2017. Global sales for the month of June 2018 reached $39.3 billion, an uptick of 1.5 percent over last month’s total of $38.7 billion, and a surge of 20.5 percent compared to the June 2017 total of $32.6 billion. Cumulatively, year-to-date sales during the first half of 2018 were 20.4 percent higher than they were at the same point in 2017. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Halfway through 2018, the global semiconductor industry continues to post impressive sales totals, notching its highest-ever quarterly sales in Q2 and record monthly sales in June,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Global sales have increased year-to-year by more than 20 percent for 15 consecutive months, and sales of every major product category increased year-to-year in June. Sales into the Americas market continue to be strong, with year-to-date totals more than 30 percent higher than at the same point last year.”

Regionally, sales increased compared to June 2017 in China (30.7 percent), the Americas (26.7 percent), Europe (15.9 percent), Japan (14.0 percent), and Asia Pacific/All Other (8.6 percent). Sales also were up compared to last month in China (3.2 percent), Japan (1.3 percent), the Americas (1.2 percent), and Asia Pacific/All Other (0.5 percent), but down slightly in Europe (-0.8 percent).

For comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, consider purchasing the WSTS Subscription Package. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2018 SIA Databook.

Samsung Electronics Co., Ltd. today announced that it has begun mass producing the industry’s first 4-bit (QLC, quad-level cell) 4-terabyte (TB) SATA solid-state drive (SSD) for consumers.

Based on 1-terabit (Tb)* V-NAND with outstanding performance equivalent to the company’s 3-bit design, Samsung’s QLC SSD is expected to bring a new level of efficiency to consumer SSDs.

“Samsung’s new 4-bit SATA SSD will herald a massive move to terabyte-SSDs for consumers,” said Jaesoo Han, executive vice president of memory sales & marketing at Samsung Electronics. “As we expand our lineup across consumer segments and to the enterprise, 4-bit terabyte-SSD products will rapidly spread throughout the entire market.”

With its new 1Tb 4-bit V-NAND chip, Samsung will be able to efficiently produce a 128GB memory card for smartphones that will lead the charge toward higher capacities for high-performance memory storage.

Typically, as data stored within a memory cell increases from three bits to four, the chip capacity per unit area would rise and the electrical charge (used to determine information from a sensor) would decrease by as much as 50 percent, making it considerably more difficult to maintain a device’s desired performance and speed.

However, Samsung’s 4-bit 4TB QLC SATA SSD maintains its performance levels at the same level as a 3-bit SSD, by using a 3-bit SSD controller and TurboWrite technology, while increasing drive capacity through the use of 32 chips, all based on 64-layer fourth-generation 1Tb V-NAND.

The 4-bit QLC SSD enables a sequential read speed of 540 MB/s and a sequential write speed of 520 MB/s, and comes with a three-year warranty.

Samsung plans to introduce several 4-bit consumer SSDs later this year with 1TB, 2TB, and 4TB capacities in the widely used 2.5-inch form factor.

Since introducing the 32-gigabyte (GB) 1-bit SSD in 2006, which ushered in the PC SSD era, to today’s 4TB 4-bit SSD, Samsung continues to drive new thresholds for each multi-bit generation.**

In addition, the company expects to provide M.2 NVMe SSDs for the enterprise this year and begin mass production of 4-bit fifth-generation V-NAND. This will considerably expand its SSD lineup to meet the growing demand for faster, more reliable performance across a wide span of applications, such as next generation data centers, enterprise servers, and enterprise storage.

* 1Tb (128GB) x 32 = 4TB (4,096GB)

** Samsung’s mass production history of SSDs in bits per cell

Year Bit Nodes Chip Capacity Drive Capacity
2006 1-bit SLC (single-level cell) 70nm-class 4Gb 32GB
2010 2-bit MLC (multi-level cell) 30nm-class 32Gb 512GB
2012 3-bit TLC (triple-level cell) 20nm-class 64Gb

500GB
2018 4-bit QLC (quad-level cell) 4th-gen V-NAND 1Tb 4 TB

Xperi Corporation announced a partnership with global semiconductor foundry, UMC. This strategic partnership will enable the companies to support the growing demand for Invensas ZiBond and Invensas DBI 3D semiconductor technologies.

Together, Xperi and UMC will further optimize and commercialize the ZiBond and DBI technologies for a wide range of semiconductor devices including image sensors, radio frequency (RF), MEMS, display drivers, touch controllers, SoC, analog, power and mixed-signal devices. Wafer to wafer (W2W) and die to wafer (D2W) bonding and 3D interconnect implementations will be employed to address the requirements of a variety of applications within the mobile, consumer, automotive, communication, industrial and Internet of Things (IoT) industries.

“As a world-leading semiconductor foundry, we are committed to delivering leading-edge solutions to our customers,” said Wenchi Ting, vice president of specialty technologies at UMC. “By partnering with Xperi and the Invensas team, true pioneers in direct and hybrid bonding technologies, we continue to be well-positioned to meet our customers’ evolving requirements for advanced wafer bonding technologies.”

“We are excited to join forces with UMC, a premier global foundry engaged in every major sector of the electronics industry, to expand the production base for our ZiBond and DBI bonding and 3D interconnect platforms,” said Craig Mitchell, president, Invensas. “We look forward to working together to proliferate these enabling technologies into a wide range of high volume semiconductor applications.”

ZiBond is a low temperature homogenous direct bonding technology that forms strong bonds between semiconductor wafers or die with same or different coefficients of thermal expansion. This technology is used in image sensors, MEMS and various RF front-end devices.

DBI is a low temperature hybrid direct bonding technology that allows semiconductor wafers or die to be bonded with exceptionally fine pitch 3D electrical interconnect. This technology is suited for various semiconductor devices such as image sensors, DRAM, MEMS and RF devices.

Products employing these technologies are found in smartphones, tablets, laptops, cameras, televisions and gaming consoles, as well as in industrial, automotive and IoT electronic devices.

Leti, a research institute at CEA Tech, and CMP, a service organization that provides prototyping and low-volume production of ICs and MEMS, today announced the integrated-circuit industry’s first multi-project-wafer (MPW) process for fabricating emerging non-volatile memory OxRAM devices on a 200mm foundry base-wafer platform.

Available on Leti’s 200mm CMOS line, the MPW service provides a comprehensive, very low-cost way to explore techniques designed to achieve miniaturized, high-density components. Including Leti’s Memory Advanced Demonstrator (MAD) future mask set with disruptive OxRAM (oxide-based resistive RAM) technology, Leti’s integrated silicon memory platform is developed for backend memories and non-volatility associated with embedded designs. The new technology platform will be based on HfO2/Ti (titanium-doped hafnium oxide) active layers.

Emerging OxRAM non-volatile memory is one of the promising technologies to be implemented for classical embedded memory applications on advanced nodes like micro-controllers or secure products, as well as for AI accelerators and neuromorphic computing.

Leti’s MAD platform is dedicated to advanced non-volatile memories, bringing both versatility and robustness for material and interface assessment, and allowing in-depth exploration of memory performance from technology and design perspectives.

The full platform’s highlights:

  • 200mm STMicroelectronics HCMOS9A base wafers in 130nm node
  • All routing is made on ST base wafers from M1 to M4 (included)
  • Leti’s OxRAM memory module is fabricated on top
  • One level of interconnect (i.e. M5) plus pads are fabricated in Leti’s cleanroom.

“Leti has developed during the past 20 years deep expertise in non-volatile memory (NVM) devices covering flash evolutive solutions and disruptive technologies,” said Etienne Nowak, head of the Leti’s Advanced Memory Lab. “This MPW capability, combined with our Memory Advanced Demonstrator platform, is based on a broad tool box that enables customized research with our partners, and provides a benchmark between different NVM solutions.”

The MPW service with integrated silicon OxRAM addresses all the key steps of advanced memory development. These include material engineering and analysis, developing critical memory modules, evaluation of memory cells coupled with electrical tests, modeling and innovative design techniques to comply with circuit design opportunities and constraints. This technology offer comes with a design kit, including layout, verification and simulation capabilities. Libraries are provided with a comprehensive list of active and passive electro-optical components. The design kit environment is compatible with all offers through CMP.

Providing access to a non-volatile memory process from Leti is a major achievement in development work at CMP. Since 2003, the organization has participated in national and European projects for developing access to NVM technologies (Mag-SPICE, Calomag, Cilomag, Spin, and Dipmem). With this new offer in place, the CMP users’ community can have the benefits and advantages of using this process through this close collaboration between CMP and Leti.

“CMP has a long experience providing smaller organizations with access to advanced manufacturing technologies, and there is very strong interest in the CMP community in designing and prototyping ICs using this process,” said Jean-Christophe Crébier, director of CMP. “It is an opportunity for many universities, start-ups and SMEs in France, Europe,North America and Asia to take advantage of this new technology and MPW service.”

In August, Toshiba Electronic Devices & Storage Corporation (“Toshiba”) will start mass production and shipments of “TPWR7904PB” and “TPW1R104PB”, 40V N-channel power MOSFETs for automotive applications. They are housed in the DSOP Advance(WF) packages that deliver double-sided cooling, low resistance, and small size.

The new products secure high heat dissipation and low On-resistance characteristics by mounting a U-MOS IX-H series chip, a MOSFET with the latest trench structure, into a DSOP Advance(WF) package. Heat generated by conduction loss is effectively dissipated, improving the flexibility of thermal design.

The U-MOS IX-H series also delivers lower switching noise than Toshiba’s previous U-MOS IV series, contributing to lower EMI[1].
The DSOP Advance(WF) package has a wettable flank terminal structure[2].

Applications
– Electric power steering
– Load switches
– Electric pumps

Features
– Qualified for AEC-Q101, suitable for automotive applications
– Double-sided cooling package with top plate[3] and drain
– Improved AOI visibility due to wettable flank structure
– U-MOS IX-H series featuring low On-resistance and low noise characteristics

Main Specifications

　(@Ta=25 ℃)

Part
number

Absolute
maximum ratings

Drain-source
On-resistance
RDS(ON) max (mΩ)

Built-in
Zener Diode
between
Gate-Source

 Series Package

Drain-
source
voltage
VDSS
(V)

Drain
current
(DC)
ID
(A)
@VGS＝6 V @VGS=10 V
TPWR7904PB 40 150 1.3 0.79 No U-MOSⅨ-H

DSOP
Advance(WF)L
TPW1R104PB 120 1.96 1.14

DSOP
Advance(WF)M

Notes:
[1] EMI (Electromagnetic interference)
[2] Wettable flank terminal structure: A terminal structure that allows AOI (Automated Optical Inspection) of installation on boards.
[3] Be aware that the top plate has the same electric potential as the sources; however, not intended for an electrode.