Category Archives: Packaging

Technavio’s latest market research report on the global substrate-like PCB market provides an analysis of the most important trends expected to impact the market outlook from 2018-2022. Technavio predicts an emerging trend as a major factor that has the potential to significantly impact the market and contribute to its growth or decline.

The global substrate-like PCB market will grow at a CAGR of over 7% during the forecast period, according to Technavio analysts. A key factor driving the market’s growth is the need for miniaturization and more efficient interconnect solutions. In the recent years, the size of electronic packages has decreased to reduce power consumption and increase the functionality and the number of embedded components. The size of mobile phone PCBs decreased by over 75% between 2004 and 2017, with the inclusion of a growing number of sensors and processors.

In this report, Technavio highlights the increasing outsourcing of activities in the semiconductor industry as one of the key emerging trends in the global substrate-like PCB market:

Increasing outsourcing of activities in the semiconductor industry

Previously, the semiconductor industry was characterized by the presence of companies that designed, fabricated, packaged, and tested ICs in-house. But, at present, most semiconductor companies are going fabless by only designing chips while outsourcing fabrication, packaging, and testing to other companies. An increasing number of semiconductor and electronics manufacturing companies are outsourcing their manufacturing processes to foundries and (semiconductor and testing services) SATS providers.

“Semiconductor vendors that do not own fabrication facilities outsource the expensive process of semiconductor manufacturing to dedicated third-party manufacturers that have large-scale manufacturing plants, thereby cutting down on capital investments, operational costs, and complexity,” says a senior analyst at Technavio for research on semiconductor equipment.

Global substrate-like PCB market segmentation

This market research report segments the global substrate-like PCB market into the following applications (communication and IoT) and key regions (the Americas, APAC, and EMEA).

The communication segment held the largest market share in 2017, accounting for more than 73% of the market. This application segment is expected to demonstrate steady growth during the forecast period.

APAC was the leading region for the global substrate-like PCB market in 2017, accounting for a market share of approximately 85%. The market share of this region is anticipated to increase significantly during the period 2018-2022.

Microsemi Corporation (Nasdaq: MSCC), a provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced it will be expanding its Silicon Carbide (SiC) MOSFET and SiC diode product portfolios early next quarter, including samples of its next-generation 1200-volt (V), 25 mOhm and 80 mOhm SiC MOSFET devices; next-generation 700 V, 50 A Schottky barrier diode (SBD) and corresponding die. These SiC solutions, along with other recently announced devices in the SiC SBD/MOSFET product families, will be demonstrated June 5-7 in hall 6, booth 318 at PCIM Europe 2018, held at the Exhibition Centre in Nuremberg, Germany.

As Microsemi continues to expand development efforts for its SiC product family, it has become one of the few suppliers providing a range of Si/SiC power discrete and module solutions to the market. These next-generation SiC MOSFETs are ideally suited for a number of applications within the industrial and automotive markets, including hybrid electric vehicle (HEV)/EV charging, conductive/inductive onboard chargers (OBCs), DC-DC converters and EV powertrain/traction control. They can also be used for switch mode power supplies, photovoltaic (PV) inverters and motor control in medical, aerospace, defense and data center applications.

“Fast adoption of SiC solutions for applications such as EV charging, DC-DC converters, powertrain, medical and industrial equipment, and aviation actuation demand a high degree of efficiency, safety and reliability on components used in such systems,” said Leon Gross, vice president and business unit manager for Microsemi’s Power Discretes and Modules business unit. “Microsemi’s next-generation SiC MOSFET and SiC diode families will include AEC-Q101 qualifications, which will insure high reliability while ruggedness is demonstrated by high repetitive unclamped inductive switching (UIS) capability at rated current without degradation or failures.”

According to market research firm Technavio, the global SiC market for semiconductor applications is expected to reach nearly $540.5 million by 2021, growing at a compound annual growth rate (CAGR) of more than 18 percent. The firm also forecasts the global SiC market for automotive semiconductor applications at nearly 20 percent CAGR by 2021. Microsemi is well-positioned with these trends, with its SiC MOSFET and Schottky barrier diode devices avalanche-rated with a high short-circuit withstand rating for robust operation, and the capabilities necessary to enable these growing application trends.

Microsemi’s next-generation 1200 V, 25/40/80 mOhm SiC MOSFET devices and die as well as its next-generation 1200 V and 700 V SiC SBD devices offer customers attractive benefits in comparison to competing Si/SiC diode/MOSFET and IGBT solutions, including more efficient switching at higher switching frequencies as well as higher avalanche/UIS rating and higher short-circuit withstand rating for rugged and reliable operation. For example, SiC MOSFETs are developed with an ideal balance of specific on-resistance, low gate and thermal resistances, and low gate threshold voltage and capacitance for reliable operation. Designed for high yield processes and low parameter variation across temperature, they operate at higher efficiency (in comparison to Si and IGBT solutions) across high junction temperature (175 degrees Celsius) to extend battery systems like those in HEV/EV applications.

The newly sampling devices also offer excellent gate integrity and high gate yield as verified through high temperature reverse bias (HTRB) and time-dependent dielectric breakdown (TBBD) tests, which are part of its AEC-Q101 qualification in progress. Other key features include:

  • High UIS capability, offering 1.5x to 2x higher than competitive SiC MOSFETs and GaN devices for avalanche ruggedness;
  • High short-circuit rating ranging from 1.5x to 5x higher than competitor SiC MOSFET devices for more rugged operation;
  • Up to 10x lower failure-in-time (FIT) rate than comparable Si IGBTs at rated voltage for neutron susceptibility and with comparable performance against SiC competition pertaining to neutron irradiation; and
  • Higher SiC power density versus Si, enabling smaller magnetics/transformers/DC bus capacitors and less cooling elements for more compact form factor to lower overall system costs.

The 64th annual IEEE International Electron Devices Meeting(IEDM), to be held at the Hilton San Francisco Union Square hotel December 1-5, 2018, has issued a Call for Papers seeking the world’s best original work in all areas of microelectronics research and development.

The paper submission deadline this year is Wednesday, August 1, 2018. Authors are asked to submit four-page camera-ready papers. Accepted papers will be published as-is in the proceedings. A limited number of late-news papers will be accepted. Authors are asked to submit late-news papers announcing only the most recent and noteworthy developments. The late-news submission deadline is September 10, 2018.

At IEDM each year, the world’s best scientists and engineers in the field of microelectronics gather to participate in a technical program consisting of more than 220 presentations, along with a variety of panels, special sessions, Short Courses, a supplier exhibit, IEEE/EDS award presentations and other events highlighting leading work in more areas of the field than any other conference.

This year, special emphasis is placed on the following topics:

  • Neuromorphic computing/AI
  • Quantum computing devices and links
  • Devices for RF, 5G, THz and mmWave
  • Advanced memory technologies
  • More-than-Moore devices and integrations
  • Technologies for advanced logic nodes
  • Non-charge-based devices and systems
  • Sensors and MEMS devices
  • Package-device level interactions
  • Electron device simulation and modeling
  • Advanced characterization, reliability and noise
  • Optoelectronics, displays and imaging systems

Overall, papers in the following areas of technology are encouraged:

  • Circuit and Device Interaction
  • Characterization, Reliability and Yield
  • Compound Semiconductor and High-Speed Devices
  • Memory Technology
  • Modeling and Simulation
  • Nano Device Technology
  • Optoelectronics, Displays and Imagers
  • Power Devices
  • Process and Manufacturing Technology
  • Sensors, MEMS and BioMEMS

Further information

For more information, interested persons should visit the IEDM 2018 home page at www.ieee-iedm.org.

Memory devices employ a wide range of packaging technology from wire-bond leadframe and BGA to TSV.

BY SANTOSH KUMAR, Yole Développement, Lyon-Villeurbanne, France

The memory market is going through a strong growth phase. The total memory market grew by >50% YoY to more than US$125 billion in 2017 from US$79.4 billion in 2016. [1] RAM and NAND dominate the market, representing almost 95 % of standalone memory sales. There is a supply/demand mismatch in the market which is impacting on the ASP of memory devices, and as a result the large memory IDMs are reaping record profits. The memory industry has consolidated with the top five players – Samsung, SKHynix, Micron, Toshiba and Western Digital – accounting for 90% of the market.

The demand for memory is coming from all sectors but the mobile and computing (mainly servers) market is showing particularly strong growth. On average, the DRAM memory capacity per smartphone will rise more than threefold to reach around 6GB by 2022. DRAM cost per smartphone represents >10% of the bill of materials of the phone and is expected to increase further. The NAND capacity per smartphone will increase more than fivefold to reach >150GB by 2022. For servers, the DRAM capacity per unit will increase to a whopping 0.5TB by 2022, and the NAND capacity per SSD for the enterprise market will be in excess of 5TB by 2022. The growth in these markets is led by applications like deep learning, big-data, networking, AR/ VR, and autonomous driving. The automotive market, which traditionally used low density (low-MB) memory, will see the adoption of DRAM memory led by the emerging trend of autonomous driving and in-vehicle infotainment. The NOR flash memory market also saw a resurgence and is expected to grow at an impressive 16% CAGR to reach ~US$4.4 billion by 2022, due to its application in new areas such as AMOLED displays, touch display driver ICs and industrial IoTs.

On the supply side, the consolidation of players, the difficulty in migrating to advanced nodes due to technical challenges, and the need for higher investment to migrate from 2D to 3D NAND, has led to shortfall in both DRAM & NAND flash supply. DRAM players want to retain high ASPs (& high profitability) to justify the huge capex investment for advanced node migration and as such are not inclined to increase capacity. Entry of Chinese memory players will ease the supply side constraint, but it’ll not happen before 2020.

Memory device packaging

There are many variations of memory device packaging. This implies a wide range of packaging technology from the low pin count SOP package to the high pin-count TSV, all depending upon the specific product requirements such as density, performance, cost, etc. We have broadly identified five packaging platforms for memory devices: viz lead frame, wire-bond BGA, flip-chip BGA, WLCSP and TSV, even though in each platform there are many varia- tions and different nomenclature in industry.

The total memory package market is expected to grow at 4.6% CAGR2016-2022 to reach ~US$26 billion by 2022. [1] Wire-bond BGA accounted for more than 80% of the packaging market in dollar terms in 2016. Flip-chips, however, started making inroads in the DRAM memory packaging market and is expected to grow at ~20% CAGR in the next five years to account for more than 10% of the memorypackagingmarket.Currentlytheflip-chipmarket is only around 6% of the total memory packaging market. Flip-chip growth is led by its increased adoption in the DRAM PC/server segment fueled by a high bandwidth requirement.

Currently Samsung has already converted >90% of its DRAM packaging line. SK Hynix have started the conversion and other players will also adopt it in future. At Yole Développement (Yole), we believe that all DDR5 memory for PC/servers will move to flip-chip.

TSV is employed in high bandwidth memory devices requiring high bandwidth with low latency memory chips for high performance computing in various applications. In 2016 the TSV market was <1% of the total memory market. However, it is expected to grow by >30% CAGR to reach ~8% of memory packaging in dollar terms. WLSCP packaging is used in NOR flash and niche memory devices (EEPROMs/EPROM/ROM). It is expected to grow at >10% CAGR, but in terms of value will remain <1% of the market by 2022.

In mobile applications, memory packaging will mainly remain on the wire-bond BGA platform but will start to move into the multi-chip package (ePoP) for high end smartphones.

The main requirement of NAND flash devices is high storage density at low cost. NANDs are stacked using wire bonding to provide high density in a single package. The NAND packaging market is expected to reach ~ US$ 10 billion by 2022. NAND flash packaging will remain on the wire bond BGA platform and will not migrate to flip-chip. Toshiba, however, will start using TSV packaging in NAND devices to increase the data transfer rate for high end applications. Following Toshiba, we believe Samsung and SKHynix will also bring TSV packaged NAND devices into the market.

OSATs account for <20% of the memory packaging business

The total memory packaging market is estimated to have been ~US$20 billion in 2016. There are many OSATs involved in the memory packaging business, and >80% of the packaging (by value) is still done internally by OSATs. The majority of these are small OSATs and have only low-end packaging capability. Global memory IDMs have much experience in packaging, accumulated over years, and have their own internal large capacity. Therefore, there is limited opportunity for OSATs to make inroads into the packaging activity of IDMs. Many Chinese players, however, are entering the memory market with more than US$50 billion investment committed. [1] These new entrants do not have experience in memory assembly / packaging, unlike global IDMs, and they will outsource major packaging activities to OSATs. The flip-chip business for memory packaging will increase to 13% of the total market to reach US$3.5 billion in 2022. This is an opportunity for low-end memory OSATs to invest in flip-chip bumping and assembly capacity. Otherwise they will lose business to the big OSATs with advanced packaging capability.

Conclusion

The memory industry is going through a golden phase with strong demand coming from all sectors, particularly from the mobile and computing (mainly servers) markets.

Memory devices employ a wide range of packaging technology from wire-bond leadframe and BGA to TSV. Wire-bond BGA still accounts for the bulk of the memory packaging market. However, flip-chip technology will start making inroads in DRAM memory packaging and will grow at 20% CAGR (by revenue) over the next five years, accounting for ~13% of the total memory packaging market by 2022. The memory packaging market is mainly controlled by IDMs. OSATs have limited opportunity to impact IDM packaging activity. Many Chinese players, however, are entering the memory business and, unlike global IDMs, these new players lack experience in memory assembly/packaging and they outsource most of their packaging activity to OSATs.

SANTOSH KUMAR is a Senior Technology and Market Research Analyst at Yole Développement in France.

References

1. Memory Packaging Market and Technology Report 2017, Yole Développement

SEMI, the global industry association representing the electronics manufacturing supply chain, today announced that the WT | Wearable Technologies Conference 2018 USA will co-locate July 11-12 with SEMICON West 2018 in San Francisco. The electronics industry’s premier U.S. event, SEMICON West — July 10-12 at Moscone North and South — will highlight engines of industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

“We are excited that the WT | Wearables Technologies Conference has joined SEMICON West to co-locate in 2018,” said David Anderson, president of SEMI Americas. “Our strategic partnership brings new content and more value to our extended supply chain. Every day the semiconductor industry makes chips smaller and faster with ever-higher performance. These innovations enable new wearable applications for smart living, smart medtech and healthcare that are continuously improving our lives. The WT | Wearable Technologies Conference speakers at SEMICON West 2018 will demonstrate just how they use semiconductor technology to deliver leading-edge wearables.”

“It is a great pleasure to collaborate with the leading global electronics manufacturing association and its successful SEMICON West event,” said Christian Stammel, CEO of WT | Wearables Technologies. “Since the beginning of our platform in 2006, the semiconductor industry has been a major driver of wearables and IoT innovation. All major developments in the WT application markets like healthcare (smart patches), safety and security (tracking solutions), lifestyle and sport (smartwatches and wristbands) and in the industrial field (AR / VR) were driven by semiconductor and MEMS innovations. Our program of expert speakers at SEMICON West will share the latest insights in the wearables market as the SEMI and WT ecosystems explore collaboration and innovation opportunities.”

Micron Technology, Inc. (Nasdaq:MU), and Intel Corporation today announced production and shipment of the industry’s first 4bits/cell 3D NAND technology. Leveraging a proven 64-layer structure, the new 4bits/cell NAND technology achieves 1 terabit (Tb) density per die, the world’s highest-density flash memory.

The companies also announced development progress on the third-generation 96-tier 3D NAND structure, providing a 50 percent increase in layers. These advancements in the cell structure continue the companies’ leadership in producing the world’s highest Gb/mm2 areal density.

Both NAND technology advancements—the 64-layer QLC and 96-layer TLC technologies —utilize CMOS under the array (CuA) technology to reduce die sizes and deliver improved performance when compared to competitive approaches. By leveraging four planes vs the competitors’ two planes, the new Intel and Micron NAND flash memory can write and read more cells in parallel, which delivers faster throughput and higher bandwidth at the system level.

The new 64-layer 4bits/cell NAND technology enables denser storage in a smaller space, bringing significant cost savings for read-intensive cloud workloads. It is also well-suited for consumer and client computing applications, providing cost-optimized storage solutions.

“With introduction of 64-layer 4bits/cell NAND technology, we are achieving 33 percent higher array density compared to TLC, which enables us to produce the first commercially available 1 terabit die in the history of semiconductors,” said Micron Executive Vice President, Technology Development, Scott DeBoer. “We’re continuing flash technology innovation with our 96-layer structure, condensing even more data into smaller spaces, unlocking the possibilities of workload capability and application construction.”

“Commercialization of 1Tb 4bits/cell is a big milestone in NVM history and is made possible by numerous innovations in technology and design that further extend the capability of our Floating Gate 3D NAND technology,” said RV Giridhar, Intel vice president, Non-Volatile Memory Technology Development. “The move to 4bits/cell enables compelling new operating points for density and cost in Datacenter and Client storage.”

For the 20th year, a worldwide survey of semiconductor manufacturers has resulted in Plasma-Therm winning multiple awards for its systems and superior customer service.

In the annual Customer Satisfaction Survey conducted by VLSIresearch, Plasma-Therm earned a total of five awards, including two “RANKED 1st” awards. Plasma-Therm earned the highest scores of all companies in two award categories, “Etch & Clean Equipment” and “Focused Suppliers of Chip Making Equipment.”

Survey participants are asked to rate semiconductor equipment suppliers in 15 categories based on supplier performance, customer service, and product performance.

“The achievement of two ‘RANKED 1st’ awards and five awards overall is very gratifying” Plasma-Therm CEO Abdul Lateef said. “While we continue to expand our product and application portfolio, we never lose our focus on providing the best service and support. We are working harder than ever to ensure success for all our customers, from small institutions and start-ups to specialty fabs and high-volume manufacturers.”

In THE BEST Suppliers of Fab Equipment, which includes specialized manufacturers like Plasma-Therm as well as the world’s largest equipment makers, Plasma-Therm ranked higher than every other company besides ASML, the world’s largest maker photolithography supplier. Plasma-Therm also was ranked higher than all other suppliers besides ASML in THE BEST Suppliers of Fab Equipment to Specialty Chip Makers.

With this year’s awards, Plasma-Therm now has received a total of 42 awards over 20 years of participation in the Customer Satisfaction Survey. VLSIresearch received feedback from more than 94 percent of the chip market in this year’s survey, which was conducted over 2-1/2 months and in five languages. Here is the full list of awards earned by Plasma-Therm in the 2018 Customer Satisfaction Survey:

• RANKED 1st in FOCUSED SUPPLIERS OF CHIP MAKINGEQUIPMENT • RANKED 1st in ETCH & CLEAN EQUIPMENT
• 10 BEST FOCUSED SUPPLIERS OF CHIP MAKING EQUIPMENT
• THE BEST SUPPLIERS OF FAB EQUIPMENT

• THE BEST SUPPLIERS OF FAB EQUIPMENT TO SPECIALTY CHIP MAKERS About Plasma-Therm

Established in 1974, Plasma-Therm is a manufacturer of advanced plasma processing equipment for specialty semiconductor markets, including advanced packaging, wireless communication, photonics, solid-state lighting, MEMS/NEMS, nanotechnology, renewable energy, data storage, photomask, and R&D. Plasma-Therm offers etch and deposition technologies and solutions for these markets.

Molex, a global manufacturer of electronic solutions, announced today the acquisition of BittWare, Inc., a global provider of computing systems featuring field-programmable gate arrays (FPGAs) deployed in data center compute and network packet processing applications.

“Among the foremost FPGA computing platform developers, BittWare brings an impressive breadth of board-level computing technologies, integrated systems and software expertise,” said Tim Ruff, senior vice president of Molex.

According to Mark Gilliam, president of Interconnect Systems International, a Molex company, “The acquisition expands on the capabilities of Molex and its subsidiary Nallatech to address the rising demand for FPGA-based high-performance compute and network processing solutions.”

Headquartered in Concord, NH, BittWare provides solutions based on FPGA technology from Intel (formerly Altera) and Xilinx. Many of the world’s leading companies use BittWare FPGA solutions to provide the processing power for demanding applications in compute and data center, military and aerospace, government, instrumentation and test, financial services, broadcast and video.

“FPGA-based platforms have become a strategically important driver of machine learning, artificial intelligence, cybersecurity, network acceleration, IoT, and other megatrends. As a Molex subsidiary, now working with Nallatech, I believe we will have the critical mass to bring new resources, better processes, and economies of scale to our valued customers and this rapidly growing industry as a whole,” said Jeff Milrod, president and CEO of BittWare.

BittWare commercial products turn the latest FPGA device features into reliable board-level solutions, suitable for both development and deployment in integrated servers. The company serves original equipment manufacture (OEM) customers, who value the decades of engineering experience BittWare brings to designing custom solutions and manufacturing them at scale with partners such as Benchmark Electronics. BittWare products are supported with extensive tools, FPGA IP, and in-house technical support staff.

Philpott Ball & Werner, LLC acted as BittWare’s financial advisor. Financial terms of the transaction were not disclosed.

For more information about Molex BittWare FPGA solutions, please visit www.molex.com.

By Emir Demircan

SEMI Position on the European Commission’s Proposal for a Regulation Establishing a Framework for Screening Foreign Direct Investments into the European Union

In response to the European Commission’s (EC) proposed framework for screening foreign direct investments (FDI), SEMI, representing the global electronics manufacturing supply chain, offers three recommendations for consideration by EU policymakers:

To support the sophisticated global ecosystem of semiconductor manufacturers, the EU should remain open to global investment. More efforts should be made to form trade and investment agreements that support European businesses’ access to foreign markets.

The global micro- and nano-electronics (MNE) industry consists of organizations specializing in research, design, equipment, materials, semiconductor manufacturing, assembly and applications – a complex global ecosystem that contributes 2 trillion USD (SEMI data) to the world economy. With its production of smaller, faster, more reliable products with higher performance, the MNE industry is one of the world’s most capital- and research-intensive sectors. Today, a state-of-the-art semiconductor manufacturing fab can easily cost billions of euros and might require international investment to deliver cutting-edge solutions.

Europe’s MNE industry plays a pivotal role in this global value chain through its investments in emerging technologies such as autonomous driving, smart healthcare, artificial intelligence and industrial automation. The region’s MNE industry features leading electronics manufacturing equipment and materials businesses, world-class research and development (R&D) and educational institutions, and vital semiconductor manufacturing hubs that are home to multinationals headquartered both inside and outside of the EU.

In the proposed framework, the EU recognizes that FDI is an important engine of economic growth, jobs and innovation. Its work to maintain a climate of open investment and connect European businesses with leading innovators and investors around the world has laid the groundwork for the success of European industrial technologies sector. These efforts have set an example for rich cross-border business relations even in the face of rising protectionist practices around the world.

The proposed EC regulation aims to establish an EU-level framework for exchanging information related to a broad range of technologies between the EC and Member States, and to assess, investigate, authorize, condition, prohibit, or unwind FDI in certain technologies on the grounds of security or public order. EU policymakers should bear in mind that a new EU-level FDI screening mechanism must be implemented very carefully. Stakeholders must clearly understand how FDI can pose a threat to security and public order in the EU.

Only transparent and precise definitions of FDI, security and public order and a limited scope of targeted technologies can provide the regulatory certainty for the EU to remain an attractive destination for foreign investors and European investees alike. On the contrary, unclear regulations could sow insecurity amongst potential investors, leading to delays or cancellation of much-needed investments and choking access to finance in capital-intensive sectors such as MNE.

MNE is a key enabling technology and advances in semiconductors enable market adoption of game-changing technologies such as artificial intelligence. The EU should ensure that future regulations do not cause lock-in effects or limit the growth of key technologies in Europe.

In the interest of security and public order, the proposed EU regulation permits Member States and the EC to screen FDI in critical infrastructure such as energy, transportation, communications and critical technologies including semiconductors, artificial intelligence and cybersecurity.  While it might be easier to screen critical infrastructure and the large-scale public services it provides for potential threats in security and public order, applying the same FDI filter to critical technologies can be extremely challenging.

Semiconductors are embedded in virtually all smart devices and systems including computers, mobile phones, cars, and aircraft. The ubiquity of chips raises the prospect that FDI in European smart technologies – and the supply chain that develops them – could be subject to screening. This level of regulatory oversight is likely to hamper not only EU’s competitiveness in key enabling technologies such as MNE but also ever-evolving applications including artificial intelligence. Also, the proposed screening framework calls for the assessment of FDI risks to security or public order by determining if an investor is controlled by foreign governments through “significant funding.” In the context of FDI, differentiating between state and private actors in other countries can be extremely challenging or even impossible, and the term “significant funding” is not clearly defined. Under this light, SEMI recommends:

  1. Defining a limited scope with clear conditions, explaining in quantitative and qualitative terms how FDI in key enabling technologies can threaten public order and security, and
  2. Introducing criteria that identifies whether an FDI leads to market distortions in Europe because a government investment program is not aligned with EU state-aid rules.

FDI is a powerful tool to support economic growth and competitiveness. Many Member States already screen FDI on the grounds of security and public order. Future regulations should ensure that additional screening neither duplicates national and EU-level assessments nor hampers Member States’ competitiveness.

Under the proposed regulation, the EC could screen FDI at the Union level. However, because many Member States already have detailed screening procedures in place to protect national security and public order, the draft regulation could increase red tape by duplicating administrative processes and regulations at the national and EU levels. Policymakers should keep in mind that FDI must in principle remain a national competence, with each Member State establishing its own national policy aimed at attracting FDI and supporting its economic growth. Many Member States compete to increase their share of EU FDI in key technologies that underpin national economic growth. Likewise, international investors already subject each Member State to their own investment criteria before making significant FDI decisions. Any proposed regulation that pushes Member States to share national-level FDI information could dilute successful FDI policies of some Member States and hamper the EU’s overall competitiveness.

Emir Demircan is Senior Manager Public Policy at SEMI Europe. Contact Emir at [email protected] , 0032484903114. 

Originally published on the SEMI blog.

Crossbar, Inc. announced an agreement with Microsemi Corporation, the largest U.S. commercial supplier of military and aerospace semiconductors, in which Microsemi will license Crossbar’s ReRAM core intellectual property. As part of the agreement, Microsemi and Crossbar will collaborate in the research, development and application of Crossbar’s proprietary ReRAM technology in next generation products from Microsemi that integrate Crossbar’s embedded ReRAM with Microsemi products manufactured at the 1x nm process node.

“We are pleased to have Microsemi in our growing list of licensees,” said George Minassian, CEO of Crossbar. “Together, we can bring unique integration of ReRAM into highly integrated, advanced node semiconductor solutions for a wide range of high-performance, low-power solutions.”

The unique nanofilament technology of Crossbar ReRAM is built upon standard CMOS processes and is fully scalable to below 10nm without impacting performance. Highly integrated semiconductor solutions with unique embedded memory architectures can be built to offer a highly secure, low-power platform with fast access times for advanced applications including edge computing, communications infrastructure, artificial intelligence, Industrial IoT and automotive.

“We are very pleased with the Crossbar license as their unique and highly scalable ReRAM technology allows us to plan power-efficient, high performance products across a multi-generation roadmap,” said Jim Aralis, Microsemi CTO. “This technology collaboration with Crossbar furthers our commitment to becoming the leading supplier of semiconductor solutions differentiated by performance, reliability, security and power while delivering truly innovative solutions.”