Category Archives: Semiconductors

Soitec, a designer and manufacturer of semiconductor materials for the electronics industry, is launching a pilot line to produce fully depleted silicon-on-insulator (FD-SOI) wafers in its Singapore wafer fab. This is the first stage in beginning FD-SOI production in Singapore and providing multi-site FD-SOI substrate sourcing to the global semiconductor market.

“Our decision to launch this FD-SOI line in Singapore as well as the decision we already made to ramp up our FD-SOI production in France are based on direct customer demand,” said Paul Boudre, CEO of Soitec. “These are very important milestones for Soitec and the expanding FD-SOI ecosystem. In Singapore, we plan to get full qualification at the customer level in the first half of 2019 and then increase capacity in line with market commitment.”

The FD-SOI ecosystem continues to strengthen and the use of FD-SOI technology is progressing. Multiple foundries, IDMs and fabless customers are engaged with a growing number of FD-SOI tape-outs and wafer starts. FD-SOI offers a unique value proposition for low-power applications, which makes it well suited for rapidly growing electronic market segments such as mobile processing, IoT, automotive and industrial.

Soitec reports that its investment in Singapore to launch its FD-SOI pilot line is approximately US$40 million, to be spent over a 24-month period.

Researchers from North Carolina State University are rolling out a new manufacturing process and chip design for silicon carbide (SiC) power devices, which can be used to more efficiently regulate power in technologies that use electronics. The process – called PRESiCE – was developed with support from the PowerAmerica Institute funded by the Department of Energy to make it easier for companies to enter the SiC marketplace and develop new products.

“PRESiCE will allow more companies to get into the SiC market, because they won’t have to initially develop their own design and manufacturing process for power devices – an expensive, time-consuming engineering effort,” says Jay Baliga, Distinguished University Professor of Electrical and Computer Engineering at NC State and lead author of a paper on PRESiCE that will be presented later this month. “The companies can instead use the PRESiCE technology to develop their own products. That’s good for the companies, good for consumers, and good for U.S. manufacturing.”

Power devices consist of a diode and transistor, and are used to regulate the flow of power in electrical devices. For decades, electronics have used silicon-based power devices. In recent years, however, some companies have begun using SiC power devices, which have two key advantages.

First, SiC power devices are more efficient, because SiC transistors lose less power. Conventional silicon transistors lose 10 percent of their energy to waste heat. SiC transistors lose only 7 percent. This is not only more efficient, but means that product designers need to do less to address cooling for the devices.

Second, SiC devices can also switch at a higher frequency. That means electronics incorporating SiC devices can have smaller capacitors and inductors – allowing designers to create smaller, lighter electronic products.

But there’s a problem.

Up to this point, companies that have developed manufacturing processes for creating SiC power devices have kept their processes proprietary – making it difficult for other companies to get into the field. This has limited the participation of other companies and kept the cost of SiC devices high.

The NC State researchers developed PRESiCE to address this bottleneck, with the goal of lowering the barrier of entry to the field for companies and increasing innovation.

The PRESiCE team worked with a Texas-based foundry called X-Fab to implement the manufacturing process and have now qualified it – showing that it has the high yield and tight statistical distribution of electrical properties for SiC power devices necessary to make them attractive to industry.

“If more companies get involved in manufacturing SiC power devices, it will increase the volume of production at the foundry, significantly driving down costs,” Baliga says.

Right now, SiC devices cost about five times more than silicon power devices.

“Our goal is to get it down to 1.5 times the cost of silicon devices,” Baliga says. “Hopefully that will begin the ‘virtuous cycle’: lower cost will lead to higher use; higher use leads to greater production volume; greater production volume further reduces cost, and so on. And consumers are getting a better, more energy-efficient product.”

The researchers have already licensed the PRESiCE process and chip design to one company, and are in talks with several others.

“I conceived the development of wide bandgap semiconductor (SiC) power devices in 1979 and have been promoting the technology for more than three decades,” Baliga says. “Now, I feel privileged to have created PRESiCE as the nation’s technology for manufacturing SiC power devices to generate high-paying jobs in the U.S. We’re optimistic that our technology can expedite the commercialization of SiC devices and contribute to a competitive manufacturing sector here in the U.S.,” Baliga says.

The paper, “PRESiCE: PRocess Engineered for manufacturing SiC Electronic-devices,” will be presented at the International Conference on Silicon Carbide and Related Materials, being held Sept. 17-22 in Washington, D.C. The paper is co-authored by W. Sung, now at State University of New York Polytechnic Institute; K. Han and J. Harmon, who are Ph.D. students at NC State; and A. Tucker and S. Syed, who are undergraduates at NC State.

SEMI, the global industry association representing the electronics manufacturing supply chain, today reported that worldwide semiconductor manufacturing equipment billings reached US$14.1 billion for the second quarter of 2017.

Quarterly billings of US$14.1 billion represent an all-time historic record for quarterly billings, exceeding the record level set in the first quarter of this year. Billings for the most recent quarter are 8 percent higher than the first quarter of 2017 and 35 percent higher than the same quarter a year ago. Sequential regional growth was mixed for the most recent quarter with the strongest growth exhibited by Korea. Korea maintained the largest market for semiconductor equipment for the year, followed by Taiwan and China. The data are gathered jointly with the Semiconductor Equipment Association of Japan (SEAJ) from over 95 global equipment companies that provide data on a monthly basis.

The quarterly billings data by region in billions of U.S. dollars, quarter-over-quarter growth and year-over-year rates by region are as follows:

2Q2017
1Q2017
2Q2016
2Q2017/1Q2017

(Qtr-over-Qtr)
2Q2017/2Q2016

(Year-over-Year)
Korea
4.79
3.53
1.53
36%
212%
Taiwan
2.76
3.48
2.73
-21%
1%
China
2.51
2.01
2.27
25%
11%
Japan
1.55
1.25
1.05
24%
47%
North America
1.23
1.27
1.20
-3%
3%
Europe
0.66
0.92
0.37
-29%
76%
Rest of World
0.62
0.63
1.31
-1%
-53%
Total
14.11
13.08
10.46
8%
35%

Source: SEMI (http://www.semi.org) and SEAJ (http://www.seaj.or.jp)

The Equipment Market Data Subscription (EMDS) from SEMI provides comprehensive market data for the global semiconductor equipment market.

Upbeat about the growth prospects of Taiwan’s electronics sector, more than 45,000 visitors are expected to attend SEMICON Taiwan 2017 which opens tomorrow at Taipei’s Nangang Exhibition Center.  SEMICON Taiwan (September 13-15), the premier tradeshow and event for the electronics manufacturing supply chain, aims to connect the electronics manufacturing ecosystem─ both vertically and horizontally. The event will provide an overview of market trends and leading technologies in the industry, with forums and business-matching activities which will enable collaboration and new opportunities. The three-day event features 700 exhibitors covering over 1,800 booths.

Taiwan is forecast to spend US$12.3 billion in 2017, making it the second largest fab equipment spending region, according to the SEMI World Fab Forecast report just issued.  Taiwan is home to the leading share of the world’s IC foundry, and has the largest share of installed capacity ─ more than 20 percent. With 2017’s large semiconductor equipment investment, Taiwan’s semiconductor industry is booming and is also the world’s largest consumer of semiconductor materials ($9.8 billion in 2016) for the seventh consecutive year, bringing new opportunities in this increasingly critical sector.

Covering the hottest electronics topics like smart manufacturing and automation, high-tech facility, materials, laser, and emerging semiconductor technology, more than 70 presentations will be given on TechXPOT stages, providing the latest technology updates plus opportunities to meet potential partners and customers. To further connect attendees and exhibitors, SEMICON Taiwan will facilitate a series of networking events, like the Materials, High-Tech Facility, Laser, and Smart Manufacturing “Get Togethers” and the Supplier Search Program, creating business opportunities.

This year SEMICON Taiwan has added new theme pavilions including Circular Economy, Compound Semiconductor, Laser, and Opto Semiconductor.  In addition, 12 theme pavilions and eight country/region pavilions are featured.

This is the first year that the International Test Conference (ITC) will be co-located with SEMICON Taiwan 2017, also marking the first time that ITC is held in Asia. The conference will focus on the rapid growth of emerging applications like IoT and automotive electronics, and how testing technologies are challenged by rapid advancements of manufacturing processes, 3D stacking and SiP.

Also co-located with SEMICON Taiwan 2017, the SiP Global Summit will discuss three key system-in-package topics:

  •  Package Innovation in Automotive
  •  3D IC, 3D interconnection for AI and High-end Computing
  •  Innovative Embedded Substrate and Fan-Out Technology to Enable 3D-SiP Devices

The Jing Jing Lucky Draw is always an anticipated show activity with excellent prizes like the Dyson 3-in-1 smart fan, iPad Pro, and Nintendo Switch.

For more information about SEMICON Taiwan 2017, please visit http://www.semicontaiwan.org.

KLA-Tencor Corporation (NASDAQ: KLAC) today introduced five patterning control systems that help chipmakers achieve the strict process tolerances required for multi-patterning technologies and EUV lithography at the sub-7nm logic and leading-edge memory design nodes. Within the IC fab, the ATL™ (Accurate Tunable Laser) overlay metrology system and the SpectraFilm™ F1 film metrology system characterize processes and monitor excursions during fabrication of finFET, DRAM, 3D NAND and other complex devices. The Teron™ 640e reticle inspection product line and the LMS IPRO7 reticle registration metrology system facilitate development and qualification of EUV and advanced optical reticles at mask shops. The 5D Analyzer® X1 advanced data analysis system is the foundation of an open architecture approach that supports fab-customized analyses and real-time process control applications. These five new systems extend KLA-Tencor’s diverse portfolio of metrology, inspection and data analysis systems that enable identification and correction of process variations at the source.

“At the 7nm and 5nm design nodes, it is becoming increasingly difficult for chipmakers to find specific sources of on-product overlay error, critical dimension non-uniformity and hotspots,” said Ahmad Khan executive vice president of the Global Products Group at KLA-Tencor. “Our customers are looking beyond scanner corrections to understand how variations from all reticle and wafer process steps affect patterning. Through open access to fab-wide metrology and inspection data, IC engineers can quickly pinpoint and manage process issues directly where they occur. Our systems, such as the five introduced today, deliver our strongest technology to our customers’ experts, enabling them to drive down the patterning error contributions of every wafer, reticle and process step.”

The five new systems that support patterning control for sub-7nm design node devices include:

  • The ATL overlay metrology system utilizes unique tunable laser technology with 1nm resolution to automatically maintain highly accurate and robust overlay error measurements in the presence of process variations, supporting fast technology ramps and accurate wafer disposition during production.
  • The SpectraFilm F1 film metrology system employs new optical technologies that determine single- and multi-layer film thicknesses and uniformity with high precision to monitor deposition processes in production, and deliver bandgap data that predict device electrical performance earlier than end-of-line test.
  • The Teron 640e reticle inspection product line incorporates optical, detector and algorithm enhancements that detect critical pattern and particle defects at high throughput, advancing the development and qualification of EUV and optical patterned reticles in leading-edge mask shops.
  • The LMS IPRO7 reticle registration metrology system leverages a new operating mode to accurately measure on-device reticle pattern placement error with fast cycle time, enabling comprehensive reticle qualification for e-beam mask writer corrections and reduction of reticle-related contributions to device overlay errors in the IC fab.
  • The 5D Analyzer X1 data analysis system offers an extendible, open architecture that accepts data from a wide range of metrology and process tools to enable advanced analysis, characterization and real-time control of fab-wide process variations.

ATL, SpectraFilm F1, Teron 640e, LMS IPRO7 and 5D Analyzer X1 are part of KLA-Tencor’s unique 5D Patterning Control Solution™, which also includes systems for patterned wafer geometry measurements, in-situ process measurements, critical dimension and device profile metrology, lithography and patterning simulation, and discovery of critical hotspots. Several ATL, SpectraFilm F1 and 5D Analyzer X1 systems are in use at leading-edge IC manufacturers worldwide, supporting a range of patterning control applications. Through upgrades and new tool shipments, the Teron 640e and LMS IPRO7 expand KLA-Tencor’s strong installed base of reticle inspection and metrology systems in advanced mask shops. To maintain the high performance and productivity demanded by IC manufacturing, ATL, SpectraFilm F1, Teron 640e, LMS IPRO7 and 5D Analyzer X1 are backed by KLA-Tencor’s global comprehensive service network. More information on the five new systems can be found on the advanced patterning control web page.

Historically, the DRAM market has been the most volatile of the major IC product segments. Figure 1 reinforces that statement by showing that the average selling price (ASP) for DRAM has more than doubled in just one year. In fact, the September Update to The McClean Report will discuss IC Insights’ forecast that the 2017 price per bit of DRAM will register a greater than 40% jump, its largest annual increase ever!

Just one year ago, DRAM buyers took full advantage of the oversupply (excess capacity) portion of the cycle and negotiated the lowest price possible with the DRAM manufacturers, regardless of whether the DRAM suppliers lost money on the deal. Now, with tight capacity in the market, DRAM suppliers are getting their “payback” and charging whatever the market will bear, regardless of whether the price increases hurt the users’ electronic system sales or causes it to lose money.

Figure 1

Figure 1

The three remaining major DRAM suppliers—Samsung, SK Hynix, and Micron—are each currently enjoying record profits from their memory sales.  For example, Micron reported net income of $1.65 billion on $5.57 billion in sales—a 30% profit margin—in its fiscal 3Q17 (ending in May 2017).  In contrast, the company lost $170 million in its fiscal 4Q16 (ending August 2016).  A similar turnaround has occurred at SK Hynix.  In 2Q17, SK Hynix had a net profit of $2.19 billion on sales of $5.94 billion—a 37% profit margin.  In contrast, SK Hynix had a net profit of only $246 million on $3.39 billion in sales one year ago in 2Q16.

Previously, when DRAM capacity was tight and suppliers were enjoying record profits, one or more suppliers eventually would break rank and begin adding additional DRAM capacity to capture additional sales and marketshare. At that time, there were six, eight, or a dozen DRAM suppliers.  If the supplier was equipping an existing fab shell, new capacity could be brought on-line relatively quickly (i.e., six months).  A greenfield wafer fab—one constructed on a new site—took about two years to reach high-volume production.  Will the same situation play out with only three DRAM suppliers left to serve the market?

Recently, Micron stated that it does not intend to add DRAM wafer capacity in the foreseeable future. Instead, it will attempt to increase its DRAM output by reducing feature size that, in turn, reduces die size.   Eventually, as the company moves down the learning curve, it will be able to ship an increasing number of good die per wafer.  However, SK Hynix, in its 2Q17 financial analyst conference call, stated that it plans to begin adding DRAM wafer capacity since it is not able to meet increasing demand by technology advancements alone.  Samsung has been less forthcoming in its plans for future DRAM production capacity.

Although Samsung and Micron may tolerate SK Hynix’s DRAM expansion efforts for a short while, IC Insights believes that both companies will eventually step up and add DRAM wafer start capacity to protect their marketshare—and DRAM ASPs will begin to fall.  As the old saying goes, it only takes two companies to engage in a price war—and there are still three major DRAM suppliers left.

The latest update to the World Fab Forecast report, published on September 5, 2017 by SEMI, again reveals record spending for fab equipment. Out of the 296 Front End facilities and lines tracked by SEMI, the report shows 30 facilities and lines with over $500 million in fab equipment spending.  2017 fab equipment spending (new and refurbished) is expected to increase by 37 percent, reaching a new annual spending record of about US$55 billion. The SEMI World Fab Forecast also forecasts that in 2018, fab equipment spending will increase even more, another 5 percent, for another record high of about $58 billion. The last record spending was in 2011 with about $40 billion. The spending in 2017 is now expected to top that by about $15 billion.

fab equipment spending

Figure 1: Fab equipment spending (new and refurbished) for Front End facilities

Examining 2017 spending by region, SEMI reports that the largest equipment spending region is Korea, which increases to about $19.5 billion in spending for 2017 from the $8.5 billion reported in 2016. This represents 130 percent growth year-over-year. In 2018, the World Fab Forecast report predicts that Korea will remain the largest spending region, while China will move up to second place with $12.5 billion (66 percent growth YoY) in equipment spending. Double-digit growth is also projected for Americas, Japan, and Europe/Mideast, while other regions growth is projected to remain below 10 percent.

The World Fab Forecast report estimates that Samsung is expected to more than double its fab equipment spending in 2017, to $16-$17 billion for Front End equipment, with another $15 billion in spending for 2018. Other memory companies are also forecast to make major spending increases, accounting for a total of $30 billion in memory-related spending for the year. Other market segments, such as Foundry ($17.8 billion), MPU ($3 billion), Logic ($1.8 billion), and Discrete with Power and LED ($1.8 billion), will also invest huge amounts on equipment. These same product segments also dominate spending into 2018.

In both 2017 and 2018, Samsung will drive the largest level in fab spending the industry has ever seen. While a single company can dominate spending trends, SEMI’s World Fab Forecast report also shows that a single region, China, can surge ahead and significantly impact spending. Worldwide, the World Fab Forecast tracks 62 active construction projects in 2017 and 42 projects for 2018, with many of these in China.

For insight into semiconductor manufacturing in 2017 and 2018 with more details about capex for construction projects, fab equipping, technology levels, and products, visit the SEMI Fab Database webpage (www.semi.org/en/MarketInfo/FabDatabase) and order the SEMI World Fab Forecast Report. The report, in Excel format, tracks spending and capacities for over 1,200 facilities including over 80 future facilities, across industry segments from Analog, Power, Logic, MPU, Memory, and Foundry to MEMS and LEDs facilities.

The eBeam Initiative, a forum dedicated to the education and promotion of new semiconductor manufacturing approaches based on electron beam (eBeam) technologies, today announced the completion of its sixth annual eBeam Initiative perceptions survey. Industry luminaries representing 40 companies from across the semiconductor ecosystem–including photomasks, electronic design automation (EDA), chip design, equipment, materials, manufacturing and research–participated in this year’s survey. The eBeam Initiative also completed its third annual mask makers’ survey with feedback from 10 captive and merchant photomask manufacturers.

Among the results of the perceptions survey, respondents are notably more optimistic about the implementation of EUV lithography for semiconductor high-volume manufacturing (HVM). In addition, expectations on the use of multi-beam mask writing technology for HVM remain high. At the same time, a solid majority of respondents believe that the throughput of variable shaped beam (VSB) mask writing systems is still adequate for the next few years. Results from the eBeam Initiative’s third annual mask makers’ survey indicate that mask write times remain consistent compared with last year’s survey, while responses to several new survey questions pointed to new requirements and challenges for mask makers. These include significantly greater mask data preparation time for finer masks, and a significant rise in the use of mask process correction (MPC) below 16-nm ground rules.

Aki Fujimura, CEO of D2S, the managing company sponsor of the eBeam Initiative, will present the results of the mask makers’ survey in an invited talk this morning at the SPIE Photomask Technology Symposium in Monterey, Calif. In addition, the complete results of both surveys will be discussed by an expert panel later today during the eBeam Initiative’s annual members meeting held in conjunction with the SPIE Photomask Technology Symposium, and will be available for download following the meeting at www.ebeam.org.

Highlights from eBeam Initiative Perceptions Survey

  • 75 percent of respondents predict that EUV will be used in HVM by the end of 2020.
  • The belief that actinic mask inspection for EUV will eventually be used grew significantly, with only 7 percent of respondents indicating it would never be used in HVM, compared to 21 percent of respondents in last year’s survey.
  • 74 percent of respondents predicted that multi-beam technology will be used in mask writing for HVM by the end of 2019. While the weighted average of the expected time for HVM implementation shifted 10 months compared to what last year’s respondents predicted, expectation of multi-beam adoption increased over last year’s survey.
  • While the majority of respondents agree that multi-beam mask writing will be adopted soon, 61 percent also believe that the throughput of current VSB mask writing systems is still adequate for the next few years.
  • 70 percent of respondents believe that inverse lithography technology (ILT) is being used in at least a few critical layers of leading-edge-node production chips today (2017).

Highlights from Mask Makers Survey (data from July 2016 to June 2017)

  • Mask write times have remained consistent compared with last year.
  • At the same time, the weighted average of the mask turnaround time (TAT) is significantly greater for more critical layers, approaching 12 days for 7-nm to 10-nm ground rules.
  • Data prep error was the leading cause of mask returns (28 percent) identified by respondents.
  • The weighted average of mask data preparation time is also significantly greater for finer masks, exceeding 21 hours for 7-nm to 10-nm ground rules.
  • MPC is being applied to over one-third of all masks at 11-nm to 15-nm ground rules. With sub-7-nm ground rules, this increased to 72 percent of all masks reported by respondents.

“We would like to thank everyone for their participation in this year’s annual perceptions survey and mask makers’ survey,” stated Fujimura. “Every year, interest in these surveys continue to grow from throughout the mask-making and semiconductor ecosystem. Participation in the perceptions survey grew from 30 to 40 companies this year, while the mask makers’ survey continues to include leading-edge mask makers from around the globe.”

Added Fujimura, “In the perceptions survey, feedback clearly indicates that EUV has turned a corner, with nearly all respondents anticipating that it will be used in semiconductor HVM at some point in the future. This marks a sizeable shift from only three years ago, when one-third of survey respondents believed that EUV would never see HVM adoption. Also interesting are the responses related to multi-beam technology, where confidence remains high but predictions of its expected insertion point have been extended by nearly a year. In the mask makers’ survey, a new question validated a clear trend on the use of MPC below 16-nm ground rules, partially resulting in the significant increases in data preparation time for masks with finer ground rules.”

Brooks Instrument will be exhibiting at SEMICON Taiwan 2017 with a new vaporization product, mass flow controllers with high-speed EtherCAT, and a broad range of other mass flow meters, controllers and capacitance manometers for semiconductor manufacturing.

The show runs September 13-15 at the Taipei Nangang Exhibition Center in Taipei, Taiwan. Brooks Instrument will be co-exhibiting with its regional business partner SCH Electronics Co., Ltd. at booth 168.

With more than 70 years of history in new technology developments, Brooks Instrument is focused on improving the precision and performance of mass flow, pressure and vacuum technologies to help enable advanced semiconductor manufacturing.

“At Brooks Instrument, we’re excited to be presenting for the first time at SEMICON Taiwan,” said Mohamed Saleem, Chief Technology Officer at Brooks Instrument. “We look forward to having one-on-one conversations with our colleagues from Taiwan and across the region about their key needs and the challenges they face implementing next-generation production tools and processes.”

A world leader in advanced flow, pressure, vacuum and vapor delivery solutions, Brooks Instrument will showcase key components in its portfolio designed to meet critical gas chemistry control challenges and improve process yields for 10nm and beyond nodes. This includes the new VDM300 vapor delivery module (VDM) as well as the company’s proven GF100 Series mass flow controllers (MFC) with high-speed EtherCAT® connectivity.

VDM300 Vapor Delivery Module: The self-contained VDM delivers precise amounts of ultra-high-purity deionized water (DIW) vapor to help ensure accurate and repeatable processing for functions such as plasma etching and photoresist stripping. Using proven vapor-draw vaporization technology, the VDM300 features an improved graphical user interface and firmware.

Full-scale flow capacity is up to 3,000 standard cubic centimeters per minute (sccm), with a better control turndown ratio of 20:1. Flow accuracy is ±1.0 percent of set point at 10-100 percent full-scale, while repeatability is less than ±0.2 percent of full-scale.

With its optional EtherCAT interface, the VDM300 joins the Brooks Instrument line of EtherCAT-enabled products, which also includes the company’s proven GF100 Series MFCs. The VDM300 uses the same signal processing and calibration techniques as the GF100 Series.

GF100 Series MFC with High-Speed EtherCAT Connectivity: Brooks Instrument has enhanced its industry-leading GF100 Series MFCs with high-speed EtherCAT interfaces for both high-flow and low-flow applications.

Responding to rapidly evolving requirements for next-generation tools and fabs, the GF100 Series includes several features to help boost process yields and productivity:

  • Embedded diagnostics to leverage real-time EtherCAT data acquisition capabilities for advanced fault detection and classification;
  • An ultra-stable flow sensor (less than ±0.15 percent of full-scale drift per year) enables tighter low set point accuracy and reduces maintenance requirements;
  • Improved valve shutdown reduces valve leak-by, minimizing potential first wafer effects;
  • Enhancements to the GF100 advanced pressure transient insensitivity to less than one percent of set point with five PSI per second pressure perturbations, which reduces crosstalk sensitivity for consistent mass flow delivery.

Rudolph Technologies, Inc. (NYSE: RTEC) announces new Truebump™ Technology on the Dragonfly™ Inspection System. Truebump Technology provides fast, accurate and repeatable three-dimensional (3D) metrology for all advanced packaging bumping applications, from copper (Cu) pillar, to microbumps, and even large C4 bumps. With the Dragonfly system, the advanced packaging industry now has premier high-volume 2D inspection and 3D bump metrology on a single platform. The first Dragonfly system with Truebump Technology has shipped to a major IC manufacturer in the United States.

“Truebump Technology combines multiple 3D metrology techniques to provide faster, more accurate, and more repeatable measurements of the 3D features that are critical in advanced packaging technologies,” said Matt Wilson, senior director of inspection product management, Rudolph Technologies. “As 2D and 3D dimensions decrease, the tolerances for manufacturing become tighter, and device stacking continues to drive an increase in functionality. Because these 3D connections are so vital for reliability, the bump height measurements need to be absolutely accurate.”

Wilson continued, “A single wafer may contain 50 million bumps, each with multiple data points, creating massive amounts of data. The Dragonfly system’s integrated connection with Discover®analytics software gives users tools to visualize data, correct coplanarity variations, and improve yields.“

Truebump Technology is three times faster and 25 percent more repeatable than Rudolph’s previous generation tool. The Dragonfly system’s high volume throughput combined with industry leading accuracy and repeatability enable further adoption of stacked devices in advanced packaging applications that fuel today’s drive for thinner and lighter products that deliver more capability in a smaller form factor.