Category Archives: Semiconductors

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced it has received multiple orders for its comprehensive portfolio of manufacturing equipment and services designed to address the burgeoning demand for wafer-level optics (WLO) and 3D sensing. The market-leading portfolio comprises the EVG 770 automated UV-nanoimprint lithography (UV-NIL) stepper for step-and-repeat master stamp fabrication, the IQ Aligner UV imprinting system for wafer-level lens molding and stacking, and the EVG 40 NT automated measurement system for alignment verification. EVG’s WLO solutions are supported by the company’s NILPhotonics Competence Center, which leverages field-proven process and equipment know-how to support emerging photonic applications and significantly shorten time to market through fast process implementation and optimization, as well as through customized equipment design.

Using imprint lithography and bond-alignment technologies to fabricate microlenses, diffractive optical elements and other optical components at the wafer-level provides numerous benefits. These include lowering cost of ownership through highly parallel fabrication processes, as well as enabling smaller form factors of the final devices through stacking. EVG is both a pioneer and market leader in nanoimprint lithography and micromolding with the largest installed base of tools worldwide.

“We are seeing a steep increase in the demand for equipment enabling wafer-level optics,” confirmed Dr. Thomas Glinsner, corporate technology director for EV Group. “Since the beginning of this year alone, we have shipped multiple systems for lens molding and stacking as well as metrology to major WLO manufacturers for high-volume production. Such orders are further strengthening EVG’s position as the market leader in this area, while creating a wealth of new opportunities in emerging applications.”

Industry-leading device makers have recently announced plans to broaden their business targets in the sensing space to help address customers’ increasingly aggressive time-to-market windows. According to market research and strategy consulting firm Yole Développement, more than a dozen types of sensors are being designed into next-generation smartphones. These include 3D sensing cameras, fingerprint sensors, iris scanners, laser diode emitters, laser rangers and biosensors. Overall, the optical hub is expected to grow from $10.6 billion in 2016 to $18 billion by 2021, showing a compound annual growth rate of more than 11 percent.

Demand for EVG’s WLO manufacturing solutions is driven in part by the need for novel optical sensing solutions and devices for mobile consumer electronics products. Key examples include 3D sensing (essential for more authentic virtual and augmented reality (VR/AR) user experiences), biometric sensing (increasingly critical for security applications), environmental sensing, infrared (IR) sensing and camera arrays. Other applications include additional optical sensors in smartphones for advanced depth sensing to improve camera autofocus performance, and micro displays.

“There is undoubtedly a highly sustainable trend emerging in wafer-level optics and 3D sensing,” stated Markus Wimplinger, EV Group’s corporate technology development and IP director. “We foresee even broader adoption of this technology in the near future due to the large number of ongoing customer projects supported by our NILPhotonics Competence Center located at our corporate headquarters.”

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $33.6 billion for the month of July 2017, an increase of 24.0 percent compared to the July 2016 total of $27.1 billion and 3.1 percent more than the June 2017 total of $32.6 billion. All major regional markets posted both year-to-year and month-to-month increases in July, and the Americas market led the way with growth of 36.1 percent year-to-year and 5.4 percent month-to-month. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Worldwide semiconductor sales increased on a year-to-year basis for the twelfth consecutive month in July, reflecting impressive and sustained growth for the global semiconductor market,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Sales in July increased throughout every major regional market and semiconductor product category, demonstrating the breadth of the global market’s recent upswing, and the industry is on track for another record sales total in 2017.”

Year-to-year sales increased in the Americas (36.1 percent), China (24.1 percent), Asia Pacific/All Other (20.5 percent), Europe (18.9 percent), and Japan (16.7 percent). Month-to-month sales increased in the Americas (5.4 percent), Asia Pacific/All Other (2.8 percent), China (2.7 percent), Japan (2.1 percent), and Europe (1.2 percent).

To find out how to purchase the WSTS Subscription Package, which includes comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, please visit http://www.semiconductors.org/industry_statistics/wsts_subscription_package/. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2017 SIA Databook: https://www.semiconductors.org/forms/sia_databook/.

Jul 2017

Billions

Month-to-Month Sales                              

Market

Last Month

Current Month

% Change

Americas

6.59

6.94

5.4%

Europe

3.16

3.20

1.2%

Japan

2.98

3.04

2.1%

China

10.41

10.69

2.7%

Asia Pacific/All Other

9.50

9.77

2.8%

Total

32.64

33.65

3.1%

Year-to-Year Sales                         

Market

Last Year

Current Month

% Change

Americas

5.10

6.94

36.1%

Europe

2.69

3.20

18.9%

Japan

2.60

3.04

16.7%

China

8.61

10.69

24.1%

Asia Pacific/All Other

8.11

9.77

20.5%

Total

27.13

33.65

24.0%

Three-Month-Moving Average Sales

Market

Feb/Mar/Apr

May/Jun/Jul

% Change

Americas

6.08

6.94

14.2%

Europe

2.99

3.20

7.3%

Japan

2.88

3.04

5.7%

China

10.13

10.69

5.6%

Asia Pacific/All Other

9.21

9.77

6.0%

Total

31.29

33.65

7.5%

UPMEM, a fabless semiconductor startup company, announces UPMEM Processing In-Memory (PIM), the next generation hardware solution for data intensive applications in the datacenter, solving server-level efficiency and performance bottlenecks. UPMEM’s programmer friendly acceleration technology is much awaited for by big data players as Moore’s law is fading away.

“The new generation of data intensive applications can no longer be easily handled by traditional CPUs,” said Gilles Hamou, CEO and co-founder of UPMEM. “Initial benchmarks by our partners validate the game-changing added-value of UPMEM PIM technology, as well as the strong fit of its programming model for a large scope of real world data-intensive applications.”

The PIM chip, integrating UPMEM’s proprietary RISC processors (DRAM Processing Units, DPUs) and main memory (DRAM), is the building block of the first efficient, scalable and programmable acceleration solution for big data applications. Associated with its Software Development Kit, the UPMEM PIM solution can accelerate data-intensive applications in the datacenter servers 20 times, with close to zero additional energy premium. This huge leap opens new horizons for Big Data players, in terms of costs and new services.

“Faster and more efficient data analytics require new datacentric application architectures, positioning compute nearer the data,” said Western Digital iMemory Project leader Robin O’Neill. “The UPMEM Processing In-Memory solution is particularly relevant and highly promising for a variety of data analytics use cases, without dramatic changes to server architectures.”

UPMEM’s innovative technology solves the Memory Wall and the dominant energy cost of data movement between the processor and its main memory in application servers. Thousands of UPMEM in-memory co-processors (DRAM Processing Units, aka DPUs) orchestrated by the main processor, localize most of data processing in the memory chips, while proposing familiar programmability. Besides, the UPMEM solution comes without any disruption of existing server hardware, standardized protocols, programming & compiling schemes, removing any barrier for fast & massive adoption. For instance, the UPMEM solution provides a full DNA mapping and variance analysis in minutes instead of hours, making affordable real-time personalized genomics a reality.

The financing round will enable the company to produce and bring to market its disruptive Processing In-Memory (PIM) chip-based solution. In parallel, UPMEM will accelerate its evaluation programs with top tier global big data customers and IT labs, using available programming and simulation tools.

UPMEM obtained this series A financing from actors engaged in semiconductors and with a strong footprint in Europeand the US: C4Ventures, Partech Ventures, Supernova Invest, Western Digital Capital, Crédit Agricole bank, and entrepreneurs from the data center and micro electronics industry led by Etix CEO Charles-Antoine Beyney. Reza Malekzadeh from Partech Ventures and Charles-Antoine Beyney will join the UPMEM board of directors.

“Data intensive use cases are severally constrained by the Memory Wall issue,” explains Olivier Huez, Partner at C4 Ventures. “We’ve looked far and wide and UPMEM’s founders have built the only company on the market which can address this seamlessly and deliver such an impressive uplift in performance.”

“We are no longer in an era were CPUs and other hardware getting continuously faster would mask the slow speed of inefficient software,” said Reza Malekzadeh, General Partner at Partech Ventures. “UPMEM’s solution addresses the performance needs of modern scale-out applications while preserving datacenter and infrastructure hardware investments.”

“The PIM concept is not new in itself,” said Christophe Desrumaux, Investment Director at Supernova Invest. “But UPMEM brings together a world class team, an innovative patented approach without any hardware compatibility disruption, and a full set of design tools that make it widely adoptable by users.”

Researchers from the National University of Singapore (NUS) have established new findings on the properties of two-dimensional molybdenum disulfide (MoS2), a widely studied semiconductor of the future.

In two separate studies led by Professor Andrew Wee and Assistant Professor Andrivo Rusydi from the Department of Physics at the NUS Faculty of Science, the researchers uncovered the role of oxygen in MoS2, and a novel technique to create multiple tunable, inverted optical band gaps in the material. These novel insights deepen the understanding of the intrinsic properties of MoS2 which could potentially transform its applications in the semiconductor industry.

The studies were published in prestigious scientific journals Physical Review Letters and Nature Communications respectively.

MoS2 – An alternative to graphene

MoS2 is a semiconductor-like material that exhibits desirable electronic and optical properties for the development and enhancement of transistors, photodetectors and solar cells.

Prof Wee explained, “MoS2 holds great industrial importance. With an atomically thin two-dimensional structure and the presence of a 1.8eV energy band gap, MoS2 is a semiconductor that can offer broader applications than graphene which lacks a band gap.”

Presence of oxygen alters the electronic and optical properties of MoS2

In the first study published in Physical Review Letters on 16 August 2017, NUS researchers conducted an in-depth analysis which revealed that the energy storage capacity or dielectric function of MoS2 can be altered using oxygen.

The team observed that MoS2 displayed a higher dielectric function when exposed to oxygen. This new knowledge shed light on how adsorption and desorption of oxygen by MoS2 can be employed to modify its electronic and optical properties to suit different applications. The study also highlights the need for adequate consideration of extrinsic factors that may affect the properties of the material in future research.

The first author of this paper is Dr Pranjal Kumar Gogoi from the Department of Physics at NUS Faculty of Science.

MoS2 can possess two tunable optical band gaps

In the second study published in Nature Communications on 7 September 2017, the team of NUS researchers discovered that as opposed to conventional semiconductors which typically have only one optical band gap, electron doping of MoS2 on gold can create two unusual optical band gaps in the material. In addition, the two optical bandgaps in MoS2 are tunable via a simple, straight forward annealing process.

The research team also identified that the tunable optical band gaps are induced by strong-charge lattice coupling as a result of the electron doping.

The first author of this second paper is Dr Xinmao Yin from the Department of Physics at NUS Faculty of Science.

The research findings from the two studies lend insights to other materials that possess similar structure with MoS2.

“MoS2 falls under a group of material known as the two-dimensional transitional metal dihalcogenides (2D-TMDs) which are of great research interest because of their potential industrial applications. The new knowledge from our studies will assist us in unlocking the possibilities of 2D-TMD-based applications such as the fabrication of 2D-TMD-based field effect transistors,” said Asst Prof Rusydi.

Leveraging the findings of these studies, the researchers will apply similar studies to other 2D-TMDs and to explore different possibilities of generating new, valuable properties in 2D-TMDs that do not exist in nature.

Lam Research Corporation (Nasdaq:LRCX), a global supplier of innovative wafer fabrication equipment and services to the semiconductor industry, announced that it has completed the acquisition of Coventor, Inc., a provider of simulation and modeling solutions for semiconductor process technology, micro-electromechanical systems (MEMS), and the Internet of Things (IoT). The combination of Lam and Coventor supports Lam’s advanced process control vision and is expected to accelerate process integration simulation to increase the value of virtual processing, further enabling chipmakers to address some of their most significant technical challenges.

“We see a strong synergy between our modeling capability and Lam’s desire to enable virtual experimentation of process development for customers and within its business units,” said Mike Jamiolkowski, president and CEO of Coventor. “We believe that our combination will increase the value we can deliver to our customers by providing more capability and improving their time to market.”

Customers rely on Coventor software and expertise to help predict the structures and behavior of designs before committing to time-consuming and costly wafer fabrication. This fast and accurate “virtual fabrication” allows technology developers and manufacturers to understand process variation effects early in the development timeframe and reduce the number of silicon learning cycles required to bring a successful product to market.

“We are looking forward to Coventor being a part of Lam and increasing the value and contribution we jointly provide to our customers,” said Rick Gottscho, executive vice president and corporate chief technical officer of Lam Research. “To keep pace with future design requirements, new technologies such as virtual fabrication and processing will be crucial to improve time to market. Together, our collective goal is to deliver more simulation, more virtual fabrication, and an overall increase in computational techniques to support the development of next-generation transistors, memories, MEMS and IoT devices.”

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced it is delivering a comprehensive automotive IP portfolio for the TSMC 16nm FinFET Compact (16FFC) automotive process technology. This broad IP portfolio enables a host of applications ranging from in-vehicle infotainment, in-cabin electronics, vision subsystems, digital noise reduction and advanced driver assistance system (ADAS) subsystems and is registered in the TSMC9000A program.

The comprehensive IP portfolio incorporates the key IP needed to implement advanced infotainment and ADAS systems on chip (SoCs), and includes the Cadence flagship 4266-speed grade LPDDR4/4X DDR PHY and controllers and PCI Express® 4.0/3.0 (PCIe®4/3) PHY and controllers. This is complemented by subsystems supporting MIPI® D-PHYSM, USB3.1/USB2.0, DisplayPort, Octal SPI/QSPI, UFS and Gigabit Ethernet with TSN.

In order to support cost-effective automotive SoC designs, Cadence IP is area- and power-optimized for the AEC-Q100 Grade 2 temperature range, eliminating the need to carry Grade 1 power and area penalties into cost-sensitive automotive SoC designs. Cadence IP is designed to be ASIL-B ready and ASIL-C/D capable based on end users’ safety goals and safety requirements as outlined in the ISO 26262 standard.

“Renesas has been the world leader in providing automotive computing SoCs for a long time,” said Masahiro Suzuki, vice president of the Automotive Solutions Business Unit, Renesas Electronics Corporation. “We are seeing increased adoption of advanced MCUs in automobiles to accelerate autonomous driving, connected cars and electric vehicles. To address these trends in a timely manner, we have been working with Cadence on the development of physical IP using cutting-edge process nodes. Cadence has delivered advanced solutions for LPDDR4/4X PHY that support the highest LPDDR4 memory speed available in the market.”

“Cadence automotive subsystem solutions have been designed from the ground up to meet the stringent requirements of automotive OEMs and tier 1 suppliers,” said Babu Mandava, Cadence’s senior vice president and general manager, IP Group. “Additionally, Cadence IP is performance optimized for the advanced SoC designs for in-vehicle infotainment and ADAS applications. Through our continued collaboration with TSMC, we’re making it very simple for automotive designers to use the most advanced IP solutions to deliver innovative products to market quickly with confidence that they are compliant with the industry’s latest safety and reliability standards.”

“Cadence has quickly adapted its IP portfolio to support automotive applications for our 16FFC process, enabling accelerated design-ins with major automotive suppliers,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “Our ongoing collaboration with Cadence has resulted in a robust, comprehensive set of IP that enables today’s complex automotive designs for ADAS applications and infotainment systems.”

Kulicke & Soffa Industries, Inc. (NASDAQ: KLIC) (“Kulicke & Soffa”, “K&S” or the “Company”) announced today its collaboration agreement with Kinik Company, to provide comprehensive dicing blades solutions.

This sales and distribution agreement enhances both organizations’ complementary product offerings within select markets. Kulicke & Soffa’s electro-plated dicing blades target silicon wafer and non-metalized package singulation, while Kinik’s molded dicing blades focus on metalized packages and hard-material substrate singulation applications. This initial collaboration partnership establishes a foundation for more meaningful joint development opportunities in the future.

“This is a perfect match for K&S and Kinik to provide customers with a complementary portfolio of dicing blades products,” said Eugene Tan, Kulicke & Soffa’s Senior Director of Capillary and Blade Business Lines. “We look forward to enhancing this partnership in the future.”

William Lee, Kinik’s General Manager and Head of Diamond Business Unit said, “This collaboration is an important step in our commitment to better support our customers. Together, with our aligned market-driven strategy, we will provide a broad range of competitive dicing blades solutions to customers.”

SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced that UltraSoC will provide debug and trace technology for the SiFive Freedom platform, based on the RISC-V open source processor specification as part of the DesignShare initiative. UltraSoC’s embedded analytics IP will be available through the recently announced SiFive DesignShare ecosystem that gives any company, inventor or maker the ability to harness the power of custom silicon. UltraSoC’s debug and trace functionality will enable users of the Freedom platform to access a wide variety of tools and interfaces to use in their developments.

The DesignShare concept enables an entirely new range of applications. Companies like SiFive, UltraSoC and other ecosystem partners have developed efficient, pre-integrated solutions to lower the upfront engineering costs required to bring a custom chip design based on the SiFive Freedom platform to realization. The partnership between SiFive, originator of the industry’s first open-source chip platform, and UltraSoC, the industry leader in vendor-neutral on-chip debug and analytics tools, significantly strengthens the ecosystem surrounding RISC-V, the open source processor specification which is often dubbed “the Linux of the semiconductor industry.”

“SiFive was founded with the mission to disrupt the semiconductor industry by leveling the playing field for anyone who wants to develop custom silicon,” said Naveed Sherwani, CEO of SiFive. “The DesignShare ecosystem enables aspiring system designers with the tools they need when designing their SoC. We’re thrilled to welcome UltraSoC to the DesignShare ecosystem and look forward to seeing the innovations our collaboration brings to the market.”

UltraSoC’s IP simplifies the development of systems on chip (SoCs) and provides embedded analytics features that enable chip makers to cut development costs significantly and increase the profitability of their projects. The company has taken a leading role in producing a specification for RISC-V processor trace functionality, which UltraSoC and SiFive intend to work together with the RISC-V Foundation to incorporate fully into the RISC-V standard. Trace is a fundamental requirement for developers working with any processor architecture, allowing engineers to view the behavior of their programs in detail, isolating bugs and identifying areas for improvement. UltraSoC and SiFive IP fully supports this recently released trace specification.

“UltraSoC is committed to increasing the number of silicon design starts, and our participation in DesignShare with SiFive is a natural extension of that work,” said Rupert Baines, CEO of UltraSoC. “We are committed to driving the acceleration of the democratization of the semiconductor industry, both through our membership in the RISC-V Foundation and via individual partnerships like this one with SiFive. Making UltraSoC’s IP available through the DesignShare model will enable chipmakers everywhere to leverage the benefits of open source hardware and introduces new innovative designs to the market.”

Rick O’Connor, executive director of the RISC-V Foundation, commented: “The idea behind the open source movement is that one doesn’t have to design everything from scratch. The idea behind DesignShare is to help speed the development of new silicon designs by reducing the barriers of cost, process and integration that have traditionally held back innovation in the semiconductor industry. SiFive, UltraSoC and the other companies that are making their IP available through DesignShare are fundamentally enabling this revolution in an otherwise stagnant industry.”

SiFive was founded by the inventors of RISC-V – Andrew Waterman, Yunsup Lee and Krste Asanovic – with a mission to democratize access to custom silicon. In its first six months of availability, more than 1,000 HiFive1 software development boards have been purchased and delivered to developers in over 40 countries. Additionally, the company has engaged with multiple customers across its IP and SoC products, started shipping the industry’s first RISC-V SoC in November 2016 and announced the availability of its Coreplex RISC-V based IP earlier this month. SiFive’s innovative “study, evaluate, buy” licensing model dramatically simplifies the IP licensing process, and removes traditional road blocks that have limited access to customized, leading edge silicon.

UltraSoC allows designers to create an on-chip infrastructure that non-intrusively monitors a chip’s behavior – both hardware and software. In development, engineers can use this IP to gain an intimate understanding of the interactions between on-chip processor blocks, custom logic, and system software. The company joined the RISC-V Foundation in 2016, with a mission to provide the RISC-V community with secure, independent on-chip development and debug capabilities; earlier in 2017 it offered its RISC-V processor trace specification for adoption by the RISC-V Foundation as part of the open source specification.

Microsemi Corporation (Nasdaq: MSCC), a provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced the appointment of Richard M. Beyer to its board of directors.

Beyer was chairman and CEO of Freescale Semiconductor from 2008 through June 2012. Prior to Freescale, he served as president, CEO and director of Intersil Corporation from 2002 to 2008. He has also previously served in executive management roles at Elantec Semiconductor, FVC.com, VLSI Technology Inc. and National Semiconductor Corporation. Beyer currently serves as chairman of the board at Dialog Semiconductor PLC and sits on the board at Micron Technology Inc. In addition, he served three years as an officer in the United States Marine Corps.

Cypress Semiconductor Corp. (Nasdaq: CY) today announced the appointment of Catherine P. Lego to its board of directors. She will serve on the company’s Audit Committee. Lego brings to Cypress an established board record with public technology companies and more than a dozen private enterprises, plus invaluable experience supporting executive teams to drive the strategic growth of component, module and systems businesses.

“We are pleased to have Cathy Lego join Cypress’ board,” said Steve Albrecht, Cypress’ chairman. “She will be an excellent addition. Cathy brings a wealth of high tech board experience that aligns well with Cypress’ strategic evolution to become a high-growth leader of embedded solutions. We expect her to be an outstanding resource who will help the management team continue its strong execution of the Cypress 3.0 strategy.”

Lego currently serves on the boards of Lam Research Corporation and IPG Photonics Corporation. At Lam Research, she chairs the Compensation Committee and is a member of the Nominating and Governance Committee. From 2009 until 2014, she chaired the Audit Committee. At IPG Photonics, her roles include chair of the Compensation Committee and member of the Audit Committee. She was previously on the board of Fairchild Semiconductor from 2013 until its 2016 acquisition by ON Semiconductor. In addition, she served on the boards of SanDisk Corporation and JDS Uniphase. During her tenure of more than 25 years contributing in various committee roles, Lego has been trusted as chair or member of Audit Committees for almost every public or private company board she has been affiliated with. In 2015, she received a Directors 100 award from the National Association of Corporate Directors (NACD) for her board service.

Lego previously was a partner at two venture capital funds and practiced as a certified public accountant with Coopers & Lybrand (now PwC). She is the founder, owner and principal of Lego Ventures, LLC, where she consults with early-stage technology companies, develops business plans, obtains seed and expansion financing, and advises on strategic growth through mergers or acquisitions.

Lego, 60, holds a B.A. in economics and biology from Williams College and an M.S. in accounting from the New York University Graduate School of Business.