Category Archives: Semiconductors

Rudolph Technologies, Inc. (NYSE: RTEC) today announced the receipt of over $12M in new orders for its recently-released NovusEdge™ system for edge and backside inspection on bare silicon wafers. The new orders are for capacity expansions at our existing customers as well as orders from two additional large wafer manufacturers based in Asia. These orders are in addition to the $3M previously announced and will ship throughout calendar year 2019.

“With these orders Rudolph has expanded its customer base to include the top wafer suppliers with over 75 percent of the bare wafer market share,” said Mike Plisinski, Rudolph Technologies’ CEO. “We believe the early acceptance of these new systems is being driven by the accelerating demand for high-quality bare silicon wafers for sub 20nm nodes. To meet that demand, customers require an inspection solution with increased sensitivity on the wafer edge and backside. The Rudolph team worked closely with bare wafer manufacturers in order to introduce a new product with compelling capabilities and value of ownership. As the rate of die shrinks slows at the advanced nodes, more wafers are required to make enough die to meet growing market demand, especially for advanced memory and logic chips.”

Chips and micro-fractures at the edge readily propagate as cracks into active areas of the wafer, especially when the wafer is thinned. Backside contamination can distort the frontside of the wafer during lithography, consuming focus budgets that are already thin and will become even thinner with the adoption of EUV lithography.

Edge and backside inspection have requirements that are very different from conventional frontside inspection. The NovusEdge EBI (Edge, Backside Inspection) system’s image-based approach provides full coverage of near-edge, bevel and apex regions, both top and bottom. Compared to existing technology, it is faster, more sensitive and better at classifying types of defects, especially for the complex shapes and curvatures at the notch. Backside inspection can use the same light scattering techniques used on the frontside but requires special handling capabilities to avoid contacting or contaminating the frontside. In all cases, sophisticated software provides analysis and automatic defect classification.

SEMICON Japan 2018, the largest and most influential event for the electronics manufacturing supply chain in Japan with more than 70,000 attendees expected, opens tomorrow at Tokyo Big Sight. Themed “Dreams Start Here,” The Dec. 12-14 exposition and conference gathers industry leaders and visionaries for insights into the latest technologies, innovations and trends in the electronics industry, including emerging opportunities in SMART applications and the all-new SMART Application Zone.

With artificial intelligence (AI) and Internet of Things (IoT) transforming industries and applications, Japan is uniquely positioned to meet the electronics industry’s new demands with a strong customer basis in automotive and robotics, and considerable 200mm and smaller wafer fab capacity for the MCU, logic, power, and MEMS and sensor devices key to SMART applications.

The SuperTHEATER highlights SEMICON Japan with seven forums in three days:

  • Opening keynotes on an “Alternative Future Envisioned by New Leaders” feature Motoi Ishibashi, CTO at Rhizomatiks, and Toru Nishikawa, president and CEO at Preferred Networks
  • Semiconductor Executive Forum with “Executive Viewpoints from Three Top SMART Era Companies: Toshiba Memory, GLOBALFOUNDIRES and Qualcomm
  • SEMI Market Forum, “Growing China and Global Semiconductor Ecosystem,” with presenters from IHS Markit and SEMI
  • SMART Transportation Summit, “Future Created by SMART Innovation,” with executives from Toyota, Honda, Denso, Bosch and Infinion
  • SMART Technology Forum, “The Front Line of AI,” with speakers from The University of Tokyo, Microsoft, Amazon Web Services and DefinedCrowd
  • Manufacturing Innovation Forum, “The Front Line of EUV lithography,” with ASML, Carl Zeiss and Xilinx
  • Mirai Vision Forum, “Technology and the Future of the Body,” with speakers from Leave a Nest, MELTIN MMI and Man-Machine Synergy Effectors

SMART Application Zone

On the SEMICON Japan show floor, 70 companies will exhibit in the new SMART Application Zone in East Hall 3. Connecting SMART industries with the semiconductor supply chain, the SMART Application Zone will showcase emerging technologies and vertical product applications generating new semiconductor demand across SMART Transportation and SMART Manufacturing. Key exhibitors include:

  • SMART Transportation – Bosch, Tesla Motors and Toyota Motor
  • SMART Manufacturing – IBM, Japan Semiconductor, Lapis Semiconductor, Microsoft, NEC, Preferred Networks, Sony, SAS and SIEMENS

Register now for SEMICON Japan. For a detailed agenda, please see the “SEMICON Japan Schedule-at-a-Glance.

GOWIN Semiconductor Corp., an innovator of programmable logic devices, announces the expansion of its global sales operations into the EMEA region. Based in the UK, the operation is managed by recently appointed Mike Furnival, Director of Sales, EMEA and General Manager of GOWIN Semiconductor (Europe). Previously, Mike Furnival held similar senior positions at XMOS Ltd. and Lattice Semiconductor UK Ltd.

“We are truly excited to be expanding our global sales activities into EMEA,” said Jason Zhu, CEO of GOWIN Semiconductor Corp. “Today, EMEA remains a very important territory for innovation, design, and quality product development, especially in the communication, industrial and automotive marketplaces. We are convinced that this expansion will significantly enhance GOWIN’s ability to demonstrate its leadership position in our fast-growing FPGA business and having Mike’s experience and knowledge onboard will ensure that our customers receive the best possible sales support activity.”

Newly appointed Mike Furnival added, “I am delighted to be joining GOWIN at such an interesting and important time in the Company’s development. I have been extremely impressed by what GOWIN has achieved thus far and am excited by the prospect of significantly contributing to its future success which I believe will be to the benefit of customers and partners alike.”

About GOWIN Semiconductor Corp.
Founded in 2014, Gowin Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide.

Ever-growing data generation driven by mobile devices, the cloud, the IoT , and big data, as well as novel AI applications, all part of the megatrends, requires continuous advancements in memory technologies. Emerging NVM takes benefit of this dynamic ecosystem.

After more than 15 years in development, PCM, one of the emerging NVM technologies, has finally taken off thanks to the strong involvement of two leading companies, Micron and Intel, announces Yole Développement (Yole). The growth mainly arises from stand-alone applications. “Although momentum is building around emerging NVM for embedded applications, stand-alone memories will be the dominant market, which will be mainly driven by SCM enterprise and client applications,” comments Simone Bertolazzi, PhD, Technology & Market Analyst at Yole.

The market research and strategy consulting company Yole proposes today a technology & market survey dedicated to the emerging non-volatile memory technologies and markets, Emerging Non-Volatile Memory.

Yole and its partners System Plus Consulting and Knowmade, deeply investigate the memory business. The Group set up this year valuable memory services and reports to deliver world class research, data and insight. The emerging NVM report is part of them.

“With our memory activities including a dedicated webcasts program covering DRAM & NAND and emerging NVM, Yole Group of Companies provides valuable expertise and knowledge to its clients and allow them to understand the evolution of this competitive industry,” asserts Emilie Jolivet, Director, Semiconductor & Software from Yole.

The emerging NVM report is a comprehensive analysis of the semiconductor memory ecosystem with the following technologies (STT-) MRAM, RRAM and PCM, plus an introduction to standard memory, flash NAND, DRAM, NVDIMMs. It provides a deep understanding of the NVM applications and details the related market forecasts until 2023. NVM technologies are well described with the companies involved. In this new report, Yole’s Semiconductor & Software team highlights the competitive landscape with supply chain, market positioning and market shares analysis.
What is the status of the emerging NVM business? Yole Group of Companies invite you to enter in the memory world.

Since its latest edition, Yole’s analysts point out today market evolution and technical innovations. According to Yann de Charentenay, Senior Technology & Market Analyst at Yole, DRAM scaling will continue in the next five years, though at slower pace. NAND density will keep increasing thanks to continuous advancements in 3D integration approaches. And emerging NVM will not replace NAND and DRAM but they will rather complement them in “combined” memory solutions. In addition, SCM will be the main emerging NVM market and will be dominated by 3DXPoint for the next 5 years.
From a technology point of view, (STT-) MRAM is gaining momentum for embedded MCU applications since all big foundries are getting involved in this area. Stand-alone RRAM will try to catch market share to PCM on SCM applications. And emerging NVM sales will grow by more than one order of magnitude in the next three years, thanks to SCM applications.

In parallel, Yole’s team identified an increased foundry involvement in (STT-) MRAM and RRAM market segment. Key players such as GlobalFoundries, TSMC, UMC, SMIC and Samsung Foundry Services develop a strong expertise with related capabilities to offer attractive services. This trend is showing a growing foundries’ interest in memory business. As an example, the leading semiconductor company, TSMC announced possible acquisition of a memory company. Moreover, analysts point out the growing number of players including Chinese companies.

In the stand-alone business, emerging NVMs will not replace DRAM and NAND but will be used in combination with them inside memory modules, e.g. SSDs, DIMMs, and NVDIMMs. In 2023, PCM will maintain its lead in the stand-alone memory market thanks to the increasing adoption of 3D XPoint as an enterprise and client SCM. It is worth noting that Samsung and Toshiba took a different strategic path by developing 3D NAND-based SCM solutions such as Z-NAND (Samsung) and XL-Flash (Toshiba, showcased in August 2018). However, these technologies will be used in enterprise SSDs and will not compete with DDR4-compatible Optane DIMMs, which we expect will represent more than 50% of overall 3D XPoint sales.

RRAM was expected to be the first stand-alone technology to compete with 3D XPoint, but it has suffered repeated delays due to technical challenges. We presume that RRAM could return in the race for SCM after 2020, and possibly start competing with NAND for mass storage applications. STT-MRAM, thanks to its high speed and high endurance, is promising for enterprise storage SCM. However, its success will be much lower compared to stand-alone PCM due to higher costs, greater fabrication complexity, and challenging scalability.

Compared to stand alone, the embedded emerging NVM market is relatively small, representing ~3% of the emerging NVM market in 2017. The market is dominated today by RRAM, since only a few RRAM based MCUs are available on the market. However, all top foundries are now getting ready with 28/22nm technology processes for STTMRAM whereas RRAM adoption has been delayed by approximately two years by SMIC and UMC.

Therefore, we expect that STT-MRAM will be the first to take-off in the coming years and will lead the embedded emerging NVM market, especially MCUs, which represent the most important embedded segment. Emerging memory will first replace eFlash, which is facing major scaling challenges due to rising fabrication complexity/costs for technology nodes ≤ 28nm. The adoption of STT-MRAM as an embedded cache memory (SRAM or eDRAM) in high-end processors and mobile application processors (AP) will occur later due to more strict scalability requirements (≤ 14nm).

AI on the edge is the most innovative application for embedded emerging NVM. Crossbar recently demonstrated various AI applications, i.e. face recognition, through the use of RRAM chips. We expect that such RRAM-based AI devices will enter the market after 2021.

Yole Group of Companies leverage decades of industry experience while partnering with its clients to make sure they are consistently well-informed on this dynamic memory market. These years were indeed impressive, not only in terms of revenues, but also in pricing and capital expenditure. Mike Howard, VP of DRAM & Memory Research and Walt Coon, VP of NAND & Memory Research at Yole describe in a dedicated interview published last week, the memory ecosystem and its players, highlighting the latest technology advancements and the future evolutions of the market: click Memory business: what’s next?.

Synopsys, Inc. (Nasdaq: SNPS) announced today another milestone in its longstanding partnership with imec, a research and innovation hub in nanoelectronics and digital technologies, with the successful completion of the first comprehensive sub-3 nanometer (nm) parasitic variation modeling and delay sensitivity study of complementary FET (CFET) architectures. With the potential to significantly reduce area versus traditional FinFETs, CFET is a promising option to maintain area scaling beyond 3nm technology.

In 3-nm and 2-nm process technologies, the magnitude of variation increases significantly for middle of line (MOL) parameters, as well as interconnect, due to high resistance of metal lines, vias, and surface scattering. Therefore, modeling parasitic variation and sensitivity is a critical factor in bringing CFET to mainstream production.

Prediction at early stages of process development will allow foundries to create more robust and variation-tolerant transistors, standard cells, and methodologies for metal interconnect. Using the QuickCap® NX 3D field solver, in a close collaboration between Synopsys R&D and imec research teams, allowed for fast and accurate modeling of parasitics for a variety of device architectures and to identify the most critical device dimensions and properties. This allowed the optimization of CFET devices for better power/performance trade-offs. As part of a comprehensive set of tools that includes Raphael™ TCAD extraction to StarRC™ parasitic extraction for the largest system-on-chips (SoCs), QuickCap NX effectively helps process engineers understand the sensitivity of circuit performance to variations in process parameters and improves modeling accuracy by establishing golden reference values.

“This work has allowed us to accurately model and analyze cell and interconnect variation at advanced processes and architectures, such as Complementary FET,” said Anda Mocuta, director, Technology Solutions and Enablement at imec. “Our collaboration with Synopsys continues a legacy of successful collaborations that enable us to search for technological breakthroughs below 3 nanometers. The capabilities of Synopsys tools, such as QuickCap NX, have been key to our joint research on variability.”

“Imec is at the forefront of research into semiconductor technology. Our collaboration with imec to develop variation-aware solutions down to 2 nanometer processes will benefit the entire semiconductor industry,” said Antun Domic, chief technology officer at Synopsys. “Utilizing the flexibility of Synopsys’ QuickCap NX 3D parasitic extraction interface, engineers can better target and significantly reduce the number of trials needed to optimize circuit performance in the presence of process variation and reduce circuit sensitivity. This significantly reduces the overall turnaround time for device and circuit optimization.”

Billions of tiny transistors supply the processing power in modern smartphones, controlling the flow of electrons with rapid on-and-off switching.

But continual progress in packing more transistors into smaller devices is pushing toward the physical limits of conventional materials. Common inefficiencies in transistor materials cause energy loss that results in heat buildup and shorter battery life, so researchers are in hot pursuit of alternative materials that allow devices to operate more efficiently at lower power.

Now, an experiment conducted at the U.S. Department of Energy’s Lawrence Berkeley National Laboratory (Berkeley Lab) has demonstrated, for the first time, electronic switching in an exotic, ultrathin material that can carry a charge with nearly zero loss at room temperature. Researchers demonstrated this switching when subjecting the material to a low-current electric field.

The team, which was led by researchers at Monash University in Australia and included Berkeley Lab scientists, grew the material from scratch and studied it with X-rays at the Advanced Light Source (ALS), a facility at the U.S. Department of Energy’s Lawrence Berkeley National Laboratory (Berkeley Lab).

The material, known as sodium bismuthide (Na3Bi), is one of two materials that is known to be a “topological Dirac semimetal,” meaning it has unique electronic properties that can be tuned to behave in different ways – in some cases more like a conventional material and in other cases more like a topological material. Its topological properties were first confirmed in earlier experiments at the ALS.

Topological materials are considered promising candidates for next-generation transistors, and for other electronics and computing applications, because of their potential to reduce energy loss and power consumption in devices. These properties can exist at room temperature – an important distinction from superconductors that require extreme chilling – and can persist even when the materials have structural defects and are subject to stress.

Materials with topological properties are the focus of intense research by the global scientific community (see a related article), and in 2016 the Nobel Prize in physics was awarded for theories related to topological properties in materials.

The ease in switching the material studied at the ALS from an electrically conducting state to an insulating, or non-conducting state, bode well for its future transistor applications, said Sung-Kwan Mo, a staff scientist at the ALS who participated in the latest study. The study is detailed in the Dec. 10 edition of the journal Nature.

Another key aspect of the latest study is that the team from Monash University found a way to grow it extremely thin, down to a single layer arranged in a honeycomb pattern of sodium and bismuth atoms, and to control the thickness of each layer they create.

“If you want to make a device, you want to make it thin,” Mo said. “This study proves that it can be done for Na3Bi, and its electrical properties can easily be controlled with low voltage. We are a step closer to a topological transistor.”

Michael Fuhrer, a physicist at Monash University who participated in the study, said, “This discovery is a step in the direction of topological transistors that could transform the world of computation.”

He added, “Ultra-low energy topological electronics are a potential answer to the increasing challenge of energy wasted in modern computing. Information and communications technology already consumes 8 percent of global electricity, and that’s doubling every decade.”

In the latest study, researchers grew the material samples, measuring several millimeters on a side, on a silicon wafer under ultrahigh vacuum at the ALS Beamline 10.0.1 using a process known as molecular beam epitaxy. The beamline allows researchers to grow samples and then conduct experiments under the same vacuum conditions in order to prevent contamination.

This beamline is specialized for an X-ray technique known as angle-resolved photoemission spectroscopy, or ARPES, which provide information about how electrons travel in materials. In typical topological materials, electrons flow around the edges of the material, while the rest of the material serves as an insulator that prevents this flow.

Some X-ray experiments on similar samples were also performed at the Australian Synchrotron to demonstrate the ultrathin Na3Bi was free-standing and did not chemically interact with the silicon wafer it was grown on. Researchers had also studied samples with a scanning tunneling microscope at Monash University that helped to confirm other measurements.

“In these edge paths, electrons can only travel in one direction,” said Mark Edmonds, a physicist at Monash University who led the study. “And this means there can be no ‘back-scattering,’ which is what causes electrical resistance in conventional electrical conductors.”

In this case, researchers found that the ultrathin material became fully conductive when subjected to the electric field, and could also be switched to become an insulator across the entire material when subjected to a slightly higher electric field.

Mo said that the electrically driven switching is an important step to realizing applications for materials – some other research efforts have pursued mechanisms like chemical doping or mechanical strain that are more challenging to control and to perform the switching operation.

The research team is pursuing other samples that can be switched on and off in a similar way to guide the development of a new generation of ultralow-energy electronics, Edmonds said.

Microtronic, Inc., a maker of high-speed full-wafer semiconductor macro defect inspection systems, wants to shed new light on a topic that is frequently misunderstood in the industry: macro vs. micro inspection. The company is releasing a new series of free informational tech bulletins entitled Macro Intelligence, addressing the often-underutilized capabilities of macro defect wafer inspection and how fabs can best use them to improve their total wafer defect management. Anyone may request to receive the new bulletins.

“In today’s fabs we still see confusion about the relative roles of macro and micro wafer inspection,” said Reiner Fenske, Microtronic’s CEO. “Many people still think that macro and micro are basically trying to do the same job, when actually they’re doing two very differentjobs — each very important and each complementary to the other.”

“Here’s the fundamental challenge,” said Fenske. “As critical dimensions and killer defects get smaller, micro inspection requires ever increasing magnification and resolution — and longer inspection times. Which is why micro inspections are usually limited to just a small part of the semiconductor wafer and on a small sampling of wafers, perhaps only one or two from a lot. Unfortunately, that leaves a great deal of wafer real estate uninspected!”

“And that’s the big void that automated macro wafer inspection can fill,” said Errol Akomer, Applications Director at Microtronic. “Today’s generation of ultra high-speed semiconductor macro defect wafer inspection systems, such as our EagleView, can now capture full-wafer, high-resolution images of every wafer in the lot within a few minutes, without needing recipes. So fabs can now do 100% macro defect wafer inspections after many more process steps, to catch defects that otherwise would have been missed — random defects, intermittent process or tool issues and a great deal more.”

Akomer noted that automated macro inspection not only detects more defects, it also recordswafer images and defect information in a database that can be reviewed long after the wafers have shipped. This database can supply extremely valuable information to each subsequent processing step and inspection, and it provides a way to find root causes of infrequent issues and excursions. And, importantly, it can also integrate defect data from manual microscopic as well as automated micro inspections — to become an extremely valuable resource for end-of-line inspection. This can significantly improve the quality and completeness of final inspections and reduce the number of hidden defects that escape into the field.

The first of the new Macro Intelligence e-bulletins dealt with the issue of “disappearing” latent defects that can get covered over by subsequent processing steps and become difficult to detect at later inspections. The second bulletin discussed the problem of partially compromised die that can slip through final electrical testing and become reliability problems in the field.

“Bottom line, these new e-mail tech bulletins aim to provide useful information,” said Akomer. “They’re about helping fabs to optimize their defect inspection protocols and improve yields. Each e-bulletin is intentionally brief, to the point, and a quick read. So far, people are telling us they like them!”

The Global Semiconductor Alliance (GSA) is proud to announce the award recipients honored at the 2018 GSA Awards Dinner Celebration that took place last evening in Santa Clara, California. For almost a quarter century, the GSA Awards have recognized the achievements of top performing semiconductor companies in several categories ranging from outstanding leadership to financial accomplishments, as well as overall respect within the industry.

Individual Awards:

Dr. Morris Chang Exemplary Leadership Award
The GSA’s most prestigious award recognizes individuals, such as its namesake, Dr. Morris Chang, for their exceptional contributions to drive the development, innovation, growth and long-term opportunities for the semiconductor industry. This year’s recipient is Dr. Lisa Su, President and CEO of Advanced Micro Devices (AMD).

Rising Women of Influence Award
This newly initiated award recognizes and profiles the next generation of women leaders in the semiconductor industry that are believed to be rising to top executive roles within their organizations. This year’s award was presented to Vanitha Kumar, Vice President of Software Engineering at Qualcomm Technologies, Inc.

Company Awards:

Most Respected Public Semiconductor Companies
GSA members identified the winners in this category by casting ballots for the industry’s most respected companies, judged for their vision, technology and market leadership. Below are this year’s recipients:

Most Respected Public Semiconductor Company Achieving Greater than $5 Billion in Annual Sales:

NVIDIA Corporation

Most Respected Public Semiconductor Company Achieving $1 Billion to $5 Billion in Annual Sales:

Marvell Semiconductor

Most Respected Public Semiconductor Company Achieving $500 Million to $1 Billion in Annual Sales:

Silicon Labs

Most Respected Emerging Public Semiconductor Company Achieving $100 Million to $500 Million in Annual Sales:

Nordic Semiconductor

Most Respected Private Company:

SiFive Inc.

Best Financially Managed Semiconductor Companies
T

hese awards are derived from a broad evaluation of the financial health and performance of public fabless and IDM semiconductor companies. Below are this year’s recipients:

Best Financially Managed Company Achieving up to $1 Billion in Annual Sales:

Holtek Semiconductor Inc.

Best Financially Managed Semiconductor Company Achieving Greater than $1 Billion in Annual Sales:

Micron Technology, Inc.

Start-Up to Watch
GSA’s Private Awards Committee, comprised of successful executives, entrepreneurs and venture capitalists, chose the winner by identifying a promising startup that has demonstrated the potential to positively change its market or the industry through innovation and market application. This year’s winner is Movandi.

As a global organization, the GSA recognizes outstanding companies headquartered in the Europe/Middle East/Africa and Asia-Pacific regions having a global impact and demonstrating a strong vision, portfolio and market leadership. Two awards were presented in this category:

Outstanding Asia-Pacific Semiconductor Company

Samsung Electronics Co., Ltd.

Outstanding EMEA Semiconductor Company

Infineon Technologies AG

Analyst Favorite Semiconductor Company
Two analyst pick awards were presented based on technology and financial performance as well as future projections:

NVIDIA Corporation was chosen by Rajvindra Gill, Managing Director at Needham & Company, LLC

Advanced Micro Devices (AMD) was chosen by Mark Lipacis, Managing Director at Jefferies, LLC
This year’s ceremony was attended by close to 1500 global executives in the semiconductor and technology industries.

There is often a pronounced symmetry when you look at the lattice of crystals: it doesn’t matter where you look – the atoms are uniformly arranged in every direction. This behavior was also to be expected by a crystal, which physicists at the Helmholtz-Zentrum Dresden-Rossendorf (HZDR), the University of Warsaw and the Polish Academy of Sciences produced, using a special process: a compound from an indium arsenide semiconductor, spiked with some iron. The material, however, did not adhere to perfect symmetry. The iron formed two-dimensional, lamellar-shaped structures in the crystal that lent the material a striking property: it became magnetic. In the long term, the result could be vital in understanding superconductors.

By using lasers, scientists from Germany and Poland were able to create a remarkable compound of indium arsenide and iron. Surprisingly, the compound — the black stripes in this image — formed lamellar-shaped structures in the surface of the crystal along one crystalline axis. Credit: HZDR / S. Zhou

“Using the possibilities of our Ion Beam Center, we fired fast iron ions at a crystal made of indium arsenide, a semiconductor made of indium and arsenic,” says Dr. Shengqiang Zhou, physicist at the HZDR Institute of Ion Beam Physics and Materials Research. “The iron penetrated approximately one hundred nanometers deep into the crystal surface.” The iron ions remained in the minority – they constituted only a few percent in the surface. The researchers then fired light pulses at the crystal using a laser. The flashes were ultra-short so that only the surface melted. “For much less than a microsecond, the top one hundred nanometers were a hot soup, whereas the crystal underneath remained cold and well ordered,” Zhou says, describing the result.

The crystal surface cooled again just a blink of an eye after the laser bombardment. Something unusual had happened: the surface had essentially reverted back to the indium arsenide lattice structure. The cooling, however, was so rapid that the iron atoms did not have sufficient time to find and occupy a regular lattice state in the crystal. Instead, the metal atoms joined forces with their peers to form remarkable structures – small two-dimensional lamellae, arranged in parallel.

“It came as a surprise that the iron atoms were arranged in this manner,” says Zhou. “We were thus able to create such a lamellar structure for the first time globally.” When the experts examined the newly created material more closely, they determined that it had become magnetic due to the influence of iron. The researchers from Poland and Germany also managed to theoretically describe the process and simulate it on the computer. “The iron atoms arranged themselves into a lamellar structure because this was energetically the most favorable state they could take in the brief period of time,” says Prof. Tomasz Dietl from the International Research Center MagTop at the Polish Academy of Sciences, summarizing the result of the calculations.

The result could be relevant in, for example, understanding superconductors – a class of materials that can conduct electricity entirely without loss. “Lamellae-like structures can also be found in many superconducting materials,” explains Zhou. “Our compound could therefore serve as a model system and help in better understanding superconductor behavior.” This could perhaps also serve to optimize their properties: in order for superconductors to work, they must currently be cooled to comparatively low temperatures of, for example, minus two hundred degrees Celsius. The aim of many experts is to increase these temperatures gradually – until they find a dream material, which loses its electrical resistance even at normal ambient temperatures.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $41.8 billion for the month of October 2018, an increase of 12.7 percent from the October 2017 total of $37.1 billion and 1.0 percent more than last month’s total of $41.4 billion. Monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. Additionally, a newly released WSTS industry forecast was revised upward and now projects annual global market growth of 15.9 percent in 2018 and 2.6 percent in 2019.

“The global semiconductor industry posted solid year-to-year growth in October and is on pace for its highest-ever annual sales in 2018, but growth has moderated in recent months,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Although strong sales of DRAM products continue to boost overall market growth, sales in all other major product categories also increased year-to-year in October, and all major regional markets posted year-to-year gains. Double-digit annual growth is expected in 2018, with more modest growth projected for 2019.”

Regionally, year-to-year sales increased in China (23.3 percent), the Americas (14.1 percent), Europe(7.0 percent), Japan (5.5 percent), and Asia Pacific/All Other (3.7 percent). Compared with last month, sales were up in the Americas (2.8 percent), Asia Pacific/All Other (1.8 percent), Japan (0.4 percent), and Europe (0.2 percent), but down slightly in China (-0.4 percent).

Additionally, SIA today endorsed the WSTS Autumn 2018 global semiconductor sales forecast, which projects the industry’s worldwide sales will be $477.9 billion in 2018. This would mark the industry’s highest-ever annual sales, a 15.9 percent increase from the 2017 sales total of $412.2 billion. WSTS projects year-to-year increases across all regional markets for 2018: the Americas (19.6 percent), Asia Pacific (16.0 percent), Europe (13.2 percent), and Japan (9.6 percent). In 2019, growth in the semiconductor market is expected to moderate, with annual sales projected to increase by 2.6 percent. WSTS tabulates its semi-annual industry forecast by convening an extensive group of global semiconductor companies that provide accurate and timely indicators of semiconductor trends.