Category Archives: Semiconductors

Silvaco, Inc. today announced the opening of a second Christian Doppler Laboratory (CDL) in partnership with the Institute for Microelectronics, TU Wien. The new CDL, officially opened November 12th will develop new device simulation solutions for MRAM, a novel non-volatile memory technology.

“The fact that memory components are constantly becoming smaller and smaller is driven by the constant need for devices with lower power and higher capacity,” said Dr. Siegfried Selberherr, Professor at the Institute for Microelectronics, TU Wien. “Conventional technologies are now reaching the limits of miniaturization and new technologies are being developed to replace them. The new CD lab will make an important contribution by exploring the foundations of possible memory alternatives and harnessing this new knowledge to the advantage of semiconductor businesses and their customers.”

Magnetoresistive random-access memory (MRAM) is a non-volatile memory technology with the potential to become a dominant alternative to DRAM and SRAM, and the future possibility to become a universal memory for digital devices. MRAM has the operation speed close to SRAM while using lower power and less area for an equivalent memory density. This characteristic makes MRAM suitable for a large number of applications, such as automotive and industrial where both performance and non-volatile memory are required.

“New digital device technologies will enable the next generation of smart components for consumer and industrial applications,” said Dr. Viktor Sverdlov from the Institute for Microelectronics, TU Wien, and who heads the new Christian Doppler Laboratory. “MRAM has the potential to deliver both more memory density and much lower power consumption extending memory beyond the current solutions. TCAD device simulation of this new device technology is an essential step in making this change possible for the industry.”

“TCAD simulation always plays a significant role launching, supporting and optimizing new technologies and this is also true for novel memories such as MRAM,” said Dr. Eric Guichard, VP and GM of the TCAD Division at Silvaco. “Silvaco has a long history pioneering new technologies and this new CDL is the latest addition to Silvaco’s TCAD development which is also progressing on high speed TCAD, atomistic simulation for advanced logic and cryogenic simulation for supercomputing. We are pleased to undertake this second technology partnership with the Institute for Microelectronics, TU Wien, and together we will continue to deliver research at the leading edge of semiconductor design.”

Professor Michelle Simmons’ team at UNSW Sydney has demonstrated a compact sensor for accessing information stored in the electrons of individual atoms – a breakthrough that brings us one step closer to scalable quantum computing in silicon.

The research, conducted within the Simmons group at the Centre of Excellence for Quantum Computation and Communication Technology (CQC2T) with PhD student Prasanna Pakkiam as lead author, was published today in the prestigious journal Physical Review X (PRX).

Quantum bits (or qubits) made from electrons hosted on single atoms in semiconductors is a promising platform for large-scale quantum computers, thanks to their long-lasting stability. Creating qubits by precisely positioning and encapsulating individual phosphorus atoms within a silicon chip is a unique Australian approach that Simmons’ team has been leading globally.

But adding in all the connections and gates required for scale up of the phosphorus atom architecture was going to be a challenge – until now.

“To monitor even one qubit, you have to build multiple connections and gates around individual atoms, where there is not a lot of room,” says Professor Simmons. “What’s more, you need high-quality qubits in close proximity so they can talk to each other – which is only achievable if you’ve got as little gate infrastructure around them as possible.”

Compared with other approaches for making a quantum computer, Simmons’ system already had a relatively low gate density. Yet conventional measurement still required at least 4 gates per qubit: 1 to control it and 3 to read it.

By integrating the read-out sensor into one of the control gates the team at UNSW has been able to drop this to just two gates: 1 for control and 1 for reading.

“Not only is our system more compact, but by integrating a superconducting circuit attached to the gate we now have the sensitivity to determine the quantum state of the qubit by measuring whether an electron moves between two neighbouring atoms,” lead author Pakkiam states.

“And we’ve shown that we can do this real-time with just one measurement – single shot – without the need to repeat the experiment and average the outcomes.”

“This represents a major advance in how we read information embedded in our qubits,” concludes Simmons. “The result confirms that single-gate reading of qubits is now reaching the sensitivity needed to perform the necessary quantum error correction for a scalable quantum computer.”

Australia’s first quantum computing company

Since May 2017, Australia’s first quantum computing company, Silicon Quantum Computing Pty Limited (SQC), has been working to create and commercialise a quantum computer based on a suite of intellectual property developed at the Australian Centre of Excellence for Quantum Computation and Communication Technology (CQC2T).

Co-located with CQC2T on the UNSW Campus in Sydney, SQC is investing in a portfolio of parallel technology development projects led by world-leading quantum researchers, including Australian of the Year and Laureate Professor Michelle Simmons. Its goal is to produce a 10-qubit demonstration device in silicon by 2022 as the forerunner to a commercial scale silicon-based quantum computer.

SQC believes that quantum computing will ultimately have a significant impact across the global economy, with possible applications in software design, machine learning, scheduling and logistical planning, financial analysis, stock market modelling, software and hardware verification, climate modelling, rapid drug design and testing, and early disease detection and prevention.

Created via a unique coalition of governments, corporations and universities, SQC is competing with some of the largest tech multinationals and foreign research laboratories.

As well as developing its own proprietary technology and intellectual property, SQC will continue to work with CQC2T and other participants in the Australian and International Quantum Computing ecosystems, to build and develop a silicon quantum computing industry in Australia and, ultimately, to bring its products and services to global markets.

SEMI, the global industry association serving the global electronics manufacturing supply chain, today announced the industry’s first worldwide fab data for power and compound semiconductors. The new report, Power and Compound Fab Outlook, provides comprehensive front-end semiconductor fab information and a forecast to 2022 for global manufacturing capabilities of power and compound semiconductors.

Power devices are rising in importance as energy-efficiency standards tighten to meet growing demand for power-thrifty high-end consumer electronics, wireless communications, electric vehicles, green energy, data centers, and both industrial and consumer IoT (Internet of Things) applications. Semiconductor fabs around the globe have responded with improvements to power usage in every aspect of electronics including power harvesting, delivery, transformation, storage, and consumption. Cost structure and performance are critical in power electronics, dictating the pace of market growth and technology adoption.

With compound materials driving significant gains in the energy efficiency of power devices, the Power and Compound Fab Outlook highlights particular compound materials that have been adopted in semiconductor fabs. The report is an essential business tool for anyone interested in related tool and material markets as well as power and compound materials capacity in fabs by region and wafer sizes.

Figure 1

North America-based manufacturers of semiconductor equipment posted $2.06 billion in billings worldwide in October 2018 (three-month average basis), according to the October Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI. The billings figure is 0.9% percent lower than the final September 2018 level of $2.07 billion, and is 2.0 percent higher than the October 2017 billings level of $2.02 billion.

“October billings of North American equipment suppliers reflect near-term weakening of demand for PC, mobile phones and servers,” said Ajit Manocha, president and CEO of SEMI. “Additionally, memory manufacturers have pulled back investments in response to recent softening of memory pricing.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.
Billings
(3-mo. avg.)
Year-Over-Year
May 2018
$2,702.3
19.0%
June 2018
$2,484.3
8.0%
July 2018
$2,377.9
4.8%
August 2018
$2,236.8
2.5%
September 2018 (final)
$2,078.6
1.2%
October 2018 (prelim)
$2,059.1
2.0%

Source: SEMI (www.semi.org), November 2018

SEMI publishes a monthly North American Billings report and issues the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ). The WWSEMS report currently reports billings by 24 equipment segments and by seven end market regions. SEMI also has a long history of tracking semiconductor industry fab investments in detail on a company-by-company and fab-by-fab basis in its World Fab Forecast and SEMI FabView databases.

By Jay Chittooran

Meeting Attended by More than 100 Tech Company Representatives

Over the past decade, China has become a central market for the semiconductor industry. China is now home to more than 30 percent of semiconductor end users worldwide. All semiconductor companies, regardless of size, operate in China. The rise of China’s semiconductor market has been enabled by global commerce and a vast network of supply chains that span the globe.

With China now a prominent player in the industry, it has become critically important for semiconductor companies to effectively engage with China. In order to help our member companies better understand the challenges and opportunities and navigate what can be a complex landscape, SEMI hosts annual trade compliance conferences in China for trade professionals. This year, SEMI, with CompTIA and U.S. Information Technology Office (USITO), hosted two global trade seminars in China, one in Shanghai on October 30th and the other in Beijing on November 1st.

Over 120 representatives from more than two dozen technology companies attended the 2018 trade compliance seminars. Over the course of the two sessions, speakers from government, business, and law firms highlighted the most pressing trade issues in China. Speakers included thought leaders, trade practitioners and senior Chinese government officials.

Sessions included a deep dive on China’s draft customs reform law, a panel discussion on U.S. export controls, and a briefing on how best to engage with China Customs and how China’s products are classified. Another well-received session focused on the status of China’s export control law, which has been in the drafting process for years.

However, the overarching question for many attendees was U.S.-China economic relations, which are undergoing a sea change, with the U.S. having imposed or threatened tariffs on all imports from China – totaling more than $500 billion in goods – over the past six months. As a speaker noted during a session on the U.S.-China tensions and the surrounding broader geopolitical impacts, the environment is becoming increasingly complex and volatile. In fact, on the morning of the first session, Fujian Jinhua Integrated Circuit was added to the U.S. Commerce Department’s entity list, which effectively restricts exports to the company.

As a result of the trade actions, ranging from tariffs to enhanced export controls, U.S. semiconductor companies are beginning to increase prices, reduce research and development (R&D) budgets, restructure supply chains and take other mitigation actions that will ultimately slow innovation. Certain export controls and other regulations that prohibit U.S.-companies from conducting business with targeted companies will put the U.S. at a competitive disadvantage.

In fact and as we speak, some companies with China-based operations have cancelled orders from U.S. companies and shifted to suppliers that are not subject to U.S. actions to reduce the associated risks of supply interruption and cost increases. Ultimately, U.S. trade policy could backfire, threatening jobs, curbing growth, cutting U.S. R&D investments and compromising the competitiveness of U.S. firms.

SEMI will begin planning next year’s Global Trade Seminar in the coming months. If you would like to be involved in the planning, or would simply like more information about the seminar, please contact Jay Chittooran, Public Policy Manager at SEMI, at [email protected].

SUNY Polytechnic Institute (SUNY Poly) announced today that two professors have been selected to receive a total of $330,000 via the awarding of two separate nanoscience and nanoengineering-focused grants:

  • Professor of Nanoscience Dr. Serge Oktyabrsky has been awarded $200,000 from the U.S. Department of Energy (DOE) for research aiming to demonstrate a novel type of scintillation detector that upon detection of small particles, can emit measurable light with unsurpassed speed and yield. This greater sensitivity and speed is essential for several DOE High Energy Physics areas of research, and could help to detect the interaction of quantum particles to better understand their properties and actions, for example, in addition to the potential for medical and nuclear security applications; and
  • Assistant Professor of Nanoengineering Dr. Spyros Gallis (Spyridon Galis) was awarded $130,000 by the National Science Foundation (NSF) — Directorate of Engineering for research which will help develop critical physical properties and provide a fundamental understanding of new silicon carbide photonic nanostructures that have erbium ions added to them for the realization of high-temperature CMOS-compatible quantum emitters at telecommunications wavelengths. The emission from erbium ions at telecommunication wavelengths can be controlled and amplified by these photonic nanostructures and can improve light-based devices, with applications in areas such as biological imaging and sensing, quantum storage of single-photons, and long-distance quantum communications.

“I am proud to congratulate Professors Serge Oktyabrsky and Spyros Gallis for being awarded these grants which will support research that could help us to better understand the behavior of fundamental particles through improved detection capabilities, in addition to providing us with further knowledge about how photonic nanostructures, combined with erbium ions, can be used to improve a variety of quantum-based applications,” said SUNY Poly Interim President Dr. Grace Wang. “We are thankful to the Department of Energy and National Science Foundation for recognizing the exciting potential of these research projects being led by our outstanding faculty members who continue to push the boundaries of knowledge as they provide hands-on educational opportunities for our students.”

Both research projects will provide hands-on learning opportunities to SUNY Poly students. In Dr. Oktyabrsky’s lab, a graduate student will build the scintillation detector and perform its initial testing, along with support from two SUNY Poly staff scientists. Dr. Gallis’ research project will provide first-hand laboratory experience for both undergraduate and graduate students at SUNY Poly, as well as summer interns, who will simulate with numerical calculations the theoretical behavior of erbium emissions in the photonic nanostructures.

“These two grants are the latest example of how SUNY Poly’s faculty are driving research that can impact a wide range of applications and enhance our understanding of the world around us,” said SUNY Poly Interim Provost Dr. Steven Schneider. “The DOE and NSF grants will allow SUNY Poly students to take an active, hands-on role in these important areas of research, and I congratulate Drs. Oktyabrsky and Gallis on this news.”

Dr. Oktyabrsky Research Grant—”Performance of scintillation detectors based on quantum dots in a semiconductor matrix”

The DOE award supports the development of quantum dots (QD’s), semiconducting Indium Arsenide (InAs) particles approximately 10 nanometers in size, embedded into a Gallium Arsenide (GaAs) matrix. This arrangement enables the QD’s to act as artificial luminescence centers, which, when struck by gamma rays or other particles, emit luminescence, thereby acting as a measurable detector of such particles. If successful, the research will lead to the development of scintillation detectors with unsurpassed speed and light yield.

The main goal of the proposed research is to develop and test a novel scientific approach and technology for a QD semiconductor scintillation detector, develop a physical understanding of the underlying processes, and establish credible performance parameters of the detector. As supported by the DOE, Office of Science, High Energy Physics (HEP) Program, the technology would mostly be focused on HEP applications, such as using the detectors to identify multiple primary interactions, for example, at the Tevatron or Large Hadron Collider. In addition, the development of an ultra-high rate photon counting detector could be used for muon-to-electron conversion experiments, and because they are expected to have unprecedented energy resolution at high counting rates, the QD semiconductor scintillators could also be useful for non-accelerator dark matter searches and searches for new physics phenomena.

Eventually, by taking advantage of the picosecond-range timing (one trillionth of a second) and energy resolution of single X-ray photons, these detectors could also be used to reduce the radiation doses that patients receive via medical imaging/tomography applications, such as those used in X-ray computed tomography, or CT Scans, as well as positron emission tomography, or PET scans, in addition to improving spectroscopic accuracy in nuclear security applications.

“I am thrilled to congratulate Dr. Oktyabrsky, whose research, supported by the Department of Energy, can lay a strong foundation for being able to detect and measure quantum particle behavior through this enhanced scintillation detector. This can enable a more detailed understanding of high-energy physics, with ramifications for how we comprehend the universe around us. Dr. Oktyabrsky’s research is just one great example of what our faculty are working on each day in collaboration with students, who are able to engage by using SUNY Poly’s world-class capabilities to design and deploy new tools for obtaining new information,” said SUNY Poly Interim Dean of the College of Nanoscale Sciences; Empire Innovation Professor of Nanoscale Science; and Executive Director, Center for Nanoscale Metrology Dr. Alain Diebold.

“I am thankful to the Department of Energy for this grant which will support Quantum Dot semiconductor scintillators that could provide about 5x higher light yield and 20x faster decay time, potentially opening a pathway for the development of very low mass tracking detectors with picosecond-scale time-of-flight resolution, along with gamma detectors with energy resolution close to 1% at 1 million electron volts and room temperature, which would be capable of sustaining counting rates greater than 100 megahertz, or one million cycles per second,” said Dr. Oktyabrsky. “In addition to my gratitude for this DOE award, I am also thankful to Fermi National Accelerator Laboratory (Fermilab) for providing inspirational guidance in high-energy physics applications and support with detectors testing.”

Dr. Spyros Gallis Research Grant—“EAGER: On-Demand Silicon Carbide Photonic Nanostructures for Quantum Optoelectronics at Telecom Wavelengths”

Dr. Gallis’ research project aims to address fundamental questions pertaining to the material and physical behaviors of erbium-doped silicon carbide (SiC) photonic nanostructures. By deterministically integrating rare-earth erbium ions and by being able to engineer the ion’s emission properties in these photonic nanostructures, Dr. Gallis expects to develop potentially disruptive advances in single-photon emission at low-loss telecom C-band wavelength region ~1540 nm. The light emitted by a single-photon emitter is fundamentally different from laser or thermally produced light. The key distinction relates to the time intervals between the emitted photons in the light beam. Photons can either cluster together in bunches or they can have regular gaps between them. In the latter case, an ion cannot emit two photons at once, which can lead to a non-classical light (single-photon emission) source. This is a required property for the development of future quantum optoelectronics and long-distance quantum communication applications using existing fiber-optical-based infrastructures. Applications that could also benefit include, for example, telecom quantum memories and repeaters, to enable the storage of information based on quantum bits, which are the more complex version of today’s bits that can have more than an on (1) or off (0) state.

“I am proud to congratulate Dr. Gallis on this NSF research grant, which can drive advancements in the burgeoning quantum computing and communication space, with opportunities to develop these cutting-edge technologies while allowing our students to gain first-hand skills that can serve them well for a lifetime of learning,” said SUNY Poly Interim Dean of the College of Nanoscale Engineering and Technology Innovation and Associate Professor of Nanoengineering Dr. Michael Carpenter.

“I am grateful to the NSF Electronics, Photonics and Magnetic Devices (EPMD) Program for the support of this research, which can pave pathways in the uncharted territories of quantum optoelectronics and communication at telecom C-band wavelengths, empowering me and my research team to innovate and educate,” said Dr. Gallis. “I am also excited that this research can further attract students to our globally recognized College of Nanoscale Engineering and Technology Innovation, inspiring them to work in new quantum photonics research programs that can lead to game-changing technological developments.”

News of these latest grants follows other recent research funding announcements by SUNY Poly, including:

  •  Associate Professor of Nanoengineering Dr. Woongje Sung was selected to receive $2,078,000 in total federal funding from the U.S. Army Research Laboratory (ARL) for advancing the “MUSiC,” or the Manufacturing of Ultra-high-voltage Silicon Carbide devices for more robust power electronics chips with a range of military and commercial applications;
  •   Professor of Nanobioscience Dr. Nate Cady was recently awarded $500,000 in funding from the National Science Foundation to develop advanced computing systems based on a novel approach to the creation of non-volatile memory architecture;
  • Associate Professor of Nanobioscience Dr. Janet Paluh was recently awarded more than $970,000 from the New York State Health Department—Spinal Cord Injury Research Board (NYSCIRB) for collaborative research using nanotechnology and human stem cell-derived neural cell therapies to create an effective treatment platform for spinal cord injuries in patients, in addition to a $162,000 sub-award from the New York State Health Department—NYSTEM Innovative, Developmental, or Exploratory Activities (IDEA) program for collaborative research with the University at Albany to identify new types of injury and repair biomarkers based on cell communication to benefit prognosis or diagnosis of traumatic brain injuries; and
  • Associate Professor of Nanobioscience Dr. Michael Fasullo was awarded $446,000 by the National Institutes of Health National Institute of Environmental Health Sciences (NIH-NIEHS) to investigate with a number of partners how genetics can increase the risk of diet-associated colon cancer.

Researchers at RMIT University have engineered a new type of transistor, the building block for all electronics. Instead of sending electrical currents through silicon, these transistors send electrons through narrow air gaps, where they can travel unimpeded as if in space.

The nano-gap transistors operating in air. As gaps become smaller than the mean-free path of electrons in air, there is ballistic electron transport. Credit: RMIT University

The device unveiled in material sciences journal Nano Letters, eliminates the use of any semiconductor at all, making it faster and less prone to heating up.

Lead author and PhD candidate in RMIT’s Functional Materials and Microsystems Research Group, Ms Shruti Nirantar, said this promising proof-of-concept design for nanochips as a combination of metal and air gaps could revolutionise electronics.

“Every computer and phone has millions to billions of electronic transistors made from silicon, but this technology is reaching its physical limits where the silicon atoms get in the way of the current flow, limiting speed and causing heat,” Nirantar said.

“Our air channel transistor technology has the current flowing through air, so there are no collisions to slow it down and no resistance in the material to produce heat.”

The power of computer chips – or number of transistors squeezed onto a silicon chip – has increased on a predictable path for decades, roughly doubling every two years. But this rate of progress, known as Moore’s Law, has slowed in recent years as engineers struggle to make transistor parts, which are already smaller than the tiniest viruses, smaller still.

Nirantar says their research is a promising way forward for nano electronics in response to the limitation of silicon-based electronics.

“This technology simply takes a different pathway to the miniaturisation of a transistor in an effort to uphold Moore’s Law for several more decades,” Shruti said.

Research team leader Associate Professor Sharath Sriram said the design solved a major flaw in traditional solid channel transistors – they are packed with atoms – which meant electrons passing through them collided, slowed down and wasted energy as heat.

“Imagine walking on a densely crowded street in an effort to get from point A to B. The crowd slows your progress and drains your energy,” Sriram said.

“Travelling in a vacuum on the other hand is like an empty highway where you can drive faster with higher energy efficiency.”

But while this concept is obvious, vacuum packaging solutions around transistors to make them faster would also make them much bigger, so are not viable.

“We address this by creating a nanoscale gap between two metal points. The gap is only a few tens of nanometers, or 50,000 times smaller than the width of a human hair, but it’s enough to fool electrons into thinking that they are travelling through a vacuum and re-create a virtual outer-space for electrons within the nanoscale air gap,” he said.

The nanoscale device is designed to be compatible with modern industry fabrication and development processes. It also has applications in space – both as electronics resistant to radiation and to use electron emission for steering and positioning ‘nano-satellites’.

“This is a step towards an exciting technology which aims to create something out of nothing to significantly increase speed of electronics and maintain pace of rapid technological progress,” Sriram said.

Sales of automotive electronic systems are forecast to increase 7.0% in 2018 and 6.3% in 2019, the highest growth rate in both years among the six major end-use applications for semiconductors.  Figure 1 shows that sales of automotive-related electronic systems are forecast to increase to $152 billion in 2018 from $142 billion in 2017, and are forecast to rise to $162 billion in 2019.  Furthermore, automotive electronic systems are expected to enjoy a compound annual growth rate (CAGR) of 6.4% from 2017 through 2021, again topping all other major system categories, based on recent findings by IC Insights.

Figure 1

Overall, the automotive segment is expected to account for 9.4% of the $1.62 trillion total worldwide electronic systems market in 2018 (Figure 2), a slight increase from 9.1% in 2017. Automotive has increased only incrementally over the years, and is forecast to show only marginal gains as a percent of the total electronic systems market through 2021, when it is forecast to account for 9.9% of global electronic systems sales.  Though accounting for a rather small percentage of total electronic system marketshare in 2018, (larger only than the government/military category), automotive is expected to be the fastest-growing segment through 2021.

Figure 2

Technology features that are focused on self-driving (autonomous) vehicles, ADAS, vehicle-to-vehicle (V2V) communications, on-board safety, convenience, and environmental features, as well as ongoing interest in electric vehicles, continues to lift the market for automotive electronics systems, despite some highly publicized accidents involving self-driving vehicles this year that were at least partly blamed on technology miscues.

New advancements are more widely available onboard mid range and entry-level cars and as aftermarket products, which has further raised automotive system growth in recent years.  In the semiconductor world, this is particularly good news for makers of analog ICs, MCUs, and sensors since a great number of all of these devices are required in most of these automotive systems. It is worth noting that the Automotive—Special Purpose Logic category is forecast to increase 29% this year—second only to the DRAM market, and the Automotive—Application-Specific Analog market is forecast to jump 14% this year—as backup cameras, blind-spot (lane departure) detectors, and other “intelligent” systems are mandated or otherwise being added to more vehicles.  Meanwhile, memory (specifically, DRAM and flash memory) is increasingly playing a more critical role in the development of new automotive system solutions used in vehicles.

SiFive, a provider of commercial RISC-V processor IP, today announced the appointment of Mohit Gupta as vice president of SoC IP. Mohit will play a key role in leadership and business development of the company’s SoC IP portfolio, including the DesignShare program, an IP ecosystem which has been instrumental in lowering the cost of bringing chips from design to silicon realization. He will report to Shafy Eltoukhy, senior vice president and general manager of SiFive’s Custom SoC Division.

“SiFive’s SoC IP, and its popular DesignShare program, has contributed significantly to the entire semiconductor ecosystem by leveling the playing field and democratizing access to custom silicon, which previously was not possible due to upfront IP cost,” said Mohit. “I’m very proud to be joining this team as we work toward expanding innovation through shared knowledge and innovation.”

Mohit has extensive expertise in semiconductor IP across product marketing, business development and engineering. He recently served as senior director of product marketing for the high speed SerDes and interface IP cores portfolio at Rambus. Prior to that, he was the director of ASIC IP development at Open-Silicon, a SiFive company, where he was instrumental in managing various SoC/ASIC and IP projects. Mohit has also held various positions in design and applications engineering at Infineon Technologies and STMicroelectronics.

“Mohit brings a deep understanding of the SoC IP ecosystem, as well as a reputation for business development and strong IP partner engagement,” said Shafy Eltoukhy SVP and GM of SiFive’s Custom SoC Division. “His experience and leadership will be instrumental in fostering the continued growth and expansion of our DesignShare program and continuing the mission of our SoC IP growth to meet the high quality and reliability expectations of our customers and ecosystem partners.”

Mohit earned an executive MBA degree from the Indian Institute of Management in Calcutta, India. He also holds a master’s degree in microelectronics from the Birla Institute of Technology and Science in India, and a bachelor’s degree in electronics and communication from Thapar University in India.

Applied Materials, Inc. today announced plans for the Materials Engineering Technology Accelerator (META Center), a major expansion of the company’s R&D capabilities aimed at creating new ways for Applied and its customers to drive innovation as classic Moore’s Law scaling becomes more challenging.

The primary goal of the META Center is to speed customer availability of new chipmaking materials and process technologies that enable breakthroughs in semiconductor performance, power and cost. The new center will complement and extend the capabilities of Applied’s Maydan Technology Center in Silicon Valley.

The META Center will be a hub for innovation, delivering on a call to action by Applied CEO Gary Dickerson for increased collaboration and speed across the technology ecosystem.

“Realizing the full potential of Artificial Intelligence and Big Data will require significant improvements in performance, power consumption and cost both at the edge and in the cloud,” said Gary Dickerson, president and CEO of Applied Materials. “The industry needs new computing architectures and chips enabled by innovative materials and scaling approaches. The META Center creates a new platform for working with customers to accelerate innovation from materials to systems.”

Scheduled to open in 2019, the META Center will be a first-of-its kind facility, spanning 24,000 square feet of cleanroom. It will be furnished with a broad suite of Applied’s most advanced process systems along with complementary technologies needed for new chip materials and structures to be piloted for high-volume production at customer sites.

To be located at the State University of New York Polytechnic Institute (SUNY Poly) campus in Albany, New York, the META Center will be created under agreements to be entered into with New York State, The Research Foundation for The State University of New York and SUNY Poly, that have been approved by the Empire State Development Board of Directors and are subject to further approval by The New York State Public Authorities Control Board.

“SUNY Poly provides an ideal combination of infrastructure, capabilities and talent in a thriving academic and entrepreneurial setting with deep roots in the semiconductor industry,” said Steve Ghanayem, senior vice president of New Markets and Alliances at Applied Materials. “The technology ecosystem will benefit from the acceleration of materials innovation through collaboration at the META Center.”

According to Samsung R&D, “We value our collaboration with Applied Materials on process development. The industry needs new innovations beyond traditional device scaling including the exploration of new materials. We are very pleased to see Applied Materials’ effort to expand its advanced R&D capabilities to provide added resources to customers and accelerate chip development.”

“TSMC welcomes closer collaboration with critical suppliers like Applied Materials in both equipment and materials,” said J.K. Lin, TSMC’s Vice President of Information Technology and Risk Management & Materials Management. “Working together to accelerate the industry’s innovation and address high-growth opportunities is very much in the spirit of TSMC’s Grand Alliance, the largest ecosystem in the semiconductor industry.”

“IBM and Applied Materials have a long history of collaboration in materials engineering to advance semiconductor industry breakthroughs,” said Dr. Mukesh V. Khare, IBM Research Vice President. “AI is one of the biggest opportunities of our time and will require innovations across materials, devices and architectures. We are pleased to see Applied expanding its capabilities to support the industry through the AI journey with its new META Center in Albany, New York.”

“As complexity increases and costs rise, traditional device scaling is slowing for the latest technology nodes,” said Tom Caulfield, CEO GLOBALFOUNDRIES. “It’s great to see Applied Materials investing in a broad range of advanced R&D capabilities to bring new and new combinations of materials into chip manufacturing, and I look forward to our continued collaborative efforts as we develop more differentiated solutions for our clients.”

“Delivering the improvements in performance and efficiency that allow Arm partners to continue to advance compute will mean overcoming the challenges presented by scaling transistors and interconnect in the deep nanometer process nodes,” said Greg Yeric, fellow, Arm. “There are many novel ideas being explored in this area, but the timeline from concept to production needs to be accelerated, and the expansion of Applied Materials’ R&D capabilities will help enable this research to advance at a faster pace.”

“Applied Materials is the world leader in semiconductor process and tools,” said Kurt Busch, CEO of Syntiant Corp. “We strongly value our relationship with Applied Materials and look forward to the benefits their latest technology will bring to breakthrough edge device machine learning products.”