Category Archives: Semiconductors

A team of semiconductor researchers based in France has used a boron nitride separation layer to grow indium gallium nitride (InGaN) solar cells that were then lifted off their original sapphire substrate and placed onto a glass substrate.

Ph.D. Student Taha Ayari measures the photovoltaic performance of the InGaN solar cells with a solar simulator. (Credit: Ougazzaden laboratory)

By combining the InGaN cells with photovoltaic (PV) cells made from materials such as silicon or gallium arsenide, the new lift-off technique could facilitate fabrication of higher efficiency hybrid PV devices able to capture a broader spectrum of light. Such hybrid structures could theoretically boost solar cell efficiency as high as 30 percent for an InGaN/Si tandem device.

The technique is the third major application for the hexagonal boron nitride lift-off technique, which was developed by a team of researchers from the Georgia Institute of Technology, the French National Center for Scientific Research (CNRS), and Institut Lafayette in Metz, France. Earlier applications targeted sensors and light-emitting diodes (LEDs).

“By putting these structures together with photovoltaic cells made of silicon or a III-V material, we can cover the visible spectrum with the silicon and utilize the blue and UV light with indium gallium nitride to gather light more efficiently,” said Abdallah Ougazzaden, director of Georgia Tech Lorraine in Metz, France and a professor in Georgia Tech’s School of Electrical and Computer Engineering (ECE). “The boron nitride layer doesn’t impact the quality of the indium gallium nitride grown on it, and we were able to lift off the InGaN solar cells without cracking them.”

The research was published August 15 in the journal ACS Photonics. It was supported by the French National Research Agency under the GANEX Laboratory of Excellence project and the French PIA project “Lorraine Université d’Excellence.”

The technique could lead to production of solar cells with improved efficiency and lower cost for a broad range of terrestrial and space applications. “This demonstration of transferred InGaN-based solar cells on foreign substrates while increasing performance represents a major advance toward lightweight, low cost, and high efficiency photovoltaic applications,” the researchers wrote in their paper.

“Using this technique, we can process InGaN solar cells and put a dielectric layer on the bottom that will collect only the short wavelengths,” Ougazzaden explained. “The longer wavelengths can pass through it into the bottom cell. By using this approach we can optimize each surface separately.”

The researchers began the process by growing monolayers of boron nitride on two-inch sapphire wafers using an MOVPE process at approximately 1,300 degrees Celsius. The boron nitride surface coating is only a few nanometers thick, and produces crystalline structures that have strong planar surface connections, but weak vertical connections.

The InGaN attaches to the boron nitride with weak van der Waals forces, allowing the solar cells to be grown across the wafer and removed without damage. So far, the cells have been removed from the sapphire manually, but Ougazzaden believes the transfer process could be automated to drive down the cost of the hybrid cells. “We can certainly do this on a large scale,” he said.

The InGaN structures are then placed onto the glass substrate with a backside reflector and enhanced performance is obtained. Beyond demonstrating placement atop an existing PV structure, the researchers hope to increase the amount of indium in their lift-off devices to boost light absorption and increase the number of quantum wells from five to 40 or 50.

“We have now demonstrated all the building blocks, but now we need to grow a real structure with more quantum wells,” Ougazzaden said. “We are just at the beginning of this new technology application, but it is very exciting.”

In addition to Ougazzaden, the research team includes Georgia Tech Ph.D. students Taha Ayari, Matthew Jordan, Xin Li and Saiful Alam; Chris Bishop and Simon Gautier from Institut Lafayette; Suresh Sundaram, a researcher at Georgia Tech Lorraine; Walid El Huni and Yacine Halfaya from CNRS; Paul Voss, an associate professor in the Georgia Tech School of ECE; and Jean Paul Salvestrini, a professor at Georgia Tech Lorraine and adjunct professor in the Georgia Tech School of ECE.

CITATION: Taha Ayari, et al., “Heterogeneous Integration of Thin-Film InGaN-Based Solar Cells on Foreign Substrates with Enhanced Performance,” (ACS Photonics 2018) https://pubs.acs.org/doi/abs/10.1021/acsphotonics.8b00663

According to data compiled by Inkwood Research, the global semiconductor market is projected to grow at a CAGR of 7.67% during the forecast period from 2017 to 2024. Data reflects that the market is driven by rising demand for consumer electronics, the growing automotive semiconductor market, the emerging internet of things (IoT) market and investments into New Product Development and R&D. Consumer electronics are primarily fueling the market due to demand for products such as tablets, smartphones, laptops and wearable devices. As semiconductor technology begins to advance, new segments are swiftly being integrated into the market, such as Machine Learning. Squire Mining Ltd. (OTC: SQRMF), Intel Corporation (NASDAQ: INTC), Texas Instruments Incorporated (NASDAQ: TXN), NXP Semiconductors N.V. (NASDAQ: NXPI), Skyworks Solutions, Inc. (NASDAQ: SWKS)

According to data by MarketsandMarkets, the global machine learning sector is expected to grow from USD 1.41 Billion in 2017 to USD 8.81 Billion in 2022 while registering a CAGR of 44.1% during the forecast period. The segment is rapidly growing due to many businesses adopting machine learning to gather intelligence for security and consumer interaction benefits, which can help eliminate human errors. However, machine learning is also being integrated into modern day technology, such as the automotive industry, to build autonomous vehicles. In a report by Forbes, Daniel Newman Principal Analyst and Founding Partner of Futurum Research, explained, “When dealing with a technology as advanced as machine learning, there simply isn’t an industry that would not benefit. I mean how could a business not take advantage of a technology that would make them more successful? In the next year, there will be multiple new uses for machine learning in all of these industries available for the taking and I’m not just talking about in marketing and sales.”

Squire Mining Ltd. (OTCQB: SQRMF) is also listed on the Canadian Securities Exchange under the ticker (CSE: SQR). Yesterday, the Company announced breaking news that, “to report on its prototype ASIC chip testing event held in Seoul, South Korea. With executives and board members from Squire, Future Farm, CoinGeek, Gaonchips and Samsung Electronics in attendance, Peter Kim, President of Squire’s subsidiary AraCore Technology Corp. (“Aracore”), and his team of front-end microchip engineers and programmers, unveiled and tested a working prototype mining system comprised of a newly engineered FPGA (field programmable gate array) ASIC microchip that will be converted into AraCore’s first ASIC chip utilizing 10 nanometer technology for mining Bitcoin Cash, Bitcoin and other associated cryptocurrencies. The test results confirm Aracore’s original design specifications indicating that the ASIC chip, once mass manufactured by Samsung Electronics, will be capable of delivering a projected hash rate of 18 to 22 terahash per second (TH/s) with an energy consumption of between 700 and 800 watts.

Taras Kulyk, Chief Executive Officer of CoinGeek Mining and Hardware, said ‘The CoinGeek team is very pleased with the progress of our strategic partners; Squire Mining and Aracore. With this next generation technology, CoinGeek will continue to pull the blockchain industry out of the proverbial basement and into the boardroom.’

Stefan Matthews, Chairman of nChain, one of the industry leaders in blockchain research and development, and a director of Squire Mining added, ‘The early results indicate that this ASIC microchip has the potential to be the next generation leader in providing hash power for enterprise mining of Bitcoin Cash and other associated crypto currencies. It has also demonstrated the potential to rapidly process consensus protocols across the blockchain faster whilst utilizing less energy than anything currently in this sector.’

Hash rate speed and microchip efficiency are the two most important measuring criteria in the crypto-mining industry to enable end-users to maximize profitability and ROI in their day to day mining operations.

Simon Moore, Executive Chairman and CEO of Squire Mining, stated, ‘Aracore’s time and investment to date have been validated by the impressive results of this new microchip. Once completed, we believe the speed and efficiency of our ASIC microchip combined with our respective mining systems powered by this Samsung manufactured microchip together have the potential to substantially increase the profitability of enterprise mining facilities around the globe. We look forward to releasing our mining system to the market in the first half of next year through our exclusive distribution partners CoinGeek, and competing for a significant piece of this multi-billion-dollar enterprise mining market.’

ANSYS (NASDAQ: ANSS) announced TSMC certified ANSYS solutions for the 7 nanometer FinFET Plus (N7+) process node with extreme ultraviolet lithography (EUV) technology and validated the reference flow for the latest Integrated Fan-Out with Memory on Substrate (InFO_MS) advanced packaging technology. The certifications and validations are vital for fabless semiconductor companies that require their simulation tools to pass rigorous testing and validation for new process nodes and packaging technologies.

ANSYS® RedHawk™ and ANSYS® Totem™ are certified for TSMC N7+ process technology that provides EUV-enabled features. Certification for N7+ includes extraction, power integrity and reliability, signal electromigration (EM) and thermal reliability analysis.

Industry-leading TSMC InFO advanced packaging technology is extended to integrate memory subsystem with logic die. TSMC and ANSYS enhanced the existing InFO design flow to support the new InFO_MS packaging technology, and validated the reference flow using ANSYS SIwave-CPA, ANSYS® RedHawk-CPA™, ANSYS® RedHawk-CTA™, ANSYS® CMA™ and ANSYS® CSM™ with the corresponding chip models. The InFO_MS reference flow includes die and package co-simulation and co-analysis for extraction, power and signal integrity analysis, power and signal electromigration analysis and thermal analysis.

“TSMC and ANSYS’ latest N7+ certification and InFO_MS enablement empowers customers to address growing performance, reliability and power demands for their next generation of chips and packages,” said Suk Lee, Senior Director of Design Infrastructure Marketing Division at TSMC.

“The number of smart, connected electronic devices continues to grow and manufacturers must keep pace to design power efficient, high-performing and reliable products at a lower cost and with a smaller footprint,” said John Lee, General Manager at ANSYS. “ANSYS semiconductor solutions address complex multi-physics challenges such as power, thermal, reliability and impact of process variation on product performance. ANSYS’ comprehensive Chip Package System solutions for chip aware system and system aware chip signoff help mutual customers accelerate design convergence with greater confidence.”

In its September Update to The 2018 McClean Report, IC Insights discloses that over the past two years, DRAM manufacturers have been operating their memory fabs at nearly full capacity, which has resulted in steadily increasing DRAM prices and sizable profits for suppliers along the way.  Figure 1 shows that the DRAM average selling price (ASP) reached $6.79 in August 2018, a 165% increase from two years earlier in August of 2016. Although the DRAM ASP growth rate has slowed this year compared to last, it has remained on a solid upward trajectory through the first eight months of 2018.

Figure 1

The DRAM market is known for being very cyclical and after experiencing strong gains for two years, historical precedence now strongly suggests that the DRAM ASP (and market) will soon begin trending downward.  One indicator suggesting that the DRAM ASP is on the verge of decline is back-to-back years of huge increases in DRAM capital spending to expand or add new fab capacity (Figure 2). DRAM capital spending jumped 81% to $16.3 billion in 2017 and is expected to climb another 40% to $22.9 billion this year. Capex spending at these levels would normally lead to an overwhelming flood of new capacity and a subsequent rapid decline in prices.

Figure 2

However, what is slightly different this time around is that big productivity gains normally associated with significant spending upgrades are much less at the sub-20nm process node now being used by the top DRAM suppliers as compared to the gains seen in previous generations.

At its Analyst Day event held earlier this year, Micron presented figures showing that manufacturing DRAM at the sub-20nm node required a 35% increase in the number of mask levels, a 110% increase in the number of non-lithography steps per critical mask level, and 80% more cleanroom space per wafer out since more equipment—each piece with a larger footprint than its previous generation—is required to fabricate ≤20nm devices. Bit volume increases that previously averaged around 50% following the transition to a smaller technology node, are a fraction of that amount at the ≤20nm node.  The net result is suppliers must invest much more money for a smaller increase in bit volume output.  So, the recent uptick in capital spending, while extraordinary, may not result in a similar amount of excess capacity, as has been the case in the past.

As seen in Figure 2, the DRAM ASP is forecast to rise 38% in 2018 to $6.65, but IC Insights forecasts that DRAM market growth will cool as additional capacity is brought online and supply constraints begin to ease. (It is worth mentioning that Samsung and SK Hynix in 3Q18 reportedly deferred some of their expansion plans in light of expected softening in customer demand.)

Of course, a wildcard in the DRAM market is the role and impact that the startup Chinese companies will have over the next few years.  It is estimated that China accounts for approximately 40% of the DRAM market and approximately 35% of the flash memory market.

At least two Chinese IC suppliers, Innotron and JHICC, are set to participate in this year’s DRAM market. Although China’s capacity and manufacturing processes will not initially rival those from Samsung, SK Hynix, or Micron, it will be interesting to see how well the country’s startup companies perform and whether they will exist to serve China’s national interests only or if they will expand to serve global needs.

 

SMART Global Holdings, Inc. (“SMART” or the “Company”) (NASDAQ: SGH), parent company of SMART Modular Technologies, Inc., today announced the appointment of Bryan Ingram, Senior Vice President and General Manager of the Wireless Semiconductor Division of Broadcom Inc., to its board of directors and its Compensation Committee, effective October 2, 2018.

“Bryan brings significant operating skills and an extensive network of relationships with industry leaders in all parts of the electronics and semiconductor supply chain, including the largest handset manufacturers in the world,” said Ajay Shah, Chairman of the Board, President & CEO of SMART. “Bryan is responsible for one of the largest divisions within Broadcom, and his long history of executive leadership in the global semiconductor industry will be of great benefit to SMART as we continue to execute our expansion strategy.”

Mr. Ingram currently leads the Wireless Semiconductor Division at Broadcom Inc. and has served in various executive roles for over 13 years, at Broadcom Inc. and its predecessor Avago Technologies Limited, which acquired Broadcom Corp. in 2015. Mr. Ingram also held executive positions at the predecessor to Avago within Agilent Technologies. From 1986 to 1999 Mr. Ingram held various management positions at Hewlett Packard and Westinghouse. Mr. Ingram holds a Bachelor of Science in Electrical Engineering from the University of Illinois and a Master of Science in Electrical Engineering from Johns Hopkins University.

With the appointment of Mr. Ingram, the board of SMART Global Holdings now has four independent directors and a total of nine members.

HEIDENHAIN announces a new series of angle encoders called the ERP 1000 with the design criteria of exceptionally high resolution, high speed, and high contamination resistance.  These new unique encoders are particularly useful for highly accurate measurement and positioning applications within semiconductor and metrology equipment.

Consisting of a glass disk bonded to a hub and a scanning unit that scans the fine graduation on the surface of the disk, these ERP 1000s are offered with four different size disks and segments.   The disks can have up to 63,000 lines with accuracy to +/- 0.9 arc seconds and up to 2600 RPM.  A reference mark is included, and multiple scanning units could be used to increase accuracy even further.

The scanning units also have the new custom ASIC HSP 1.0 which is HEIDENHAIN Signal Processing and forces the stabilization of the signals through an advanced LED brightness control. When the scanning unit detects contamination, the LED intensity is increased to help increase the reflectivity and therefore reducing amplified noise. The end result is a super stable encoder output that ensures high reliability. The scanning unit cable exit can also be ordered with either a straight-out configuration, or a 90-degree exit, both having left or right options as well, so squeezing into tight spaces is possible.

The scanning units come with either an analog 1Volt peak to peak or TTL electrical interface. The TTL versions can have up to 1000x interpolation, yielding an unprecedented 252 million counts of resolution per 360 degrees on the largest disk.

By Julian West

Process power and reactive gas subsystems for semiconductor manufacturing equipment have grown at a CAGR of 21% since 2013. The segment growth is considerably above the critical subsystems industry average of 9.5% and is attributable to higher demand for vacuum processing equipment over the period.

Process power and reactive gas subsystems now account for approximately 12% of all expenditures on critical subsystems used on semiconductor manufacturing equipment, up from 7% in 2013. The main driver of this exceptional growth has been the rise in vacuum processing steps (deposition and etch) during the manufacturing processes of both logic and memory devices. Most deposition and etch processes require an RF generator to provide a plasma energy source in the chamber, increasing demand for tools with power subsystems such as RF power supplies and matching networks.

Multiple patterning and the advent of 3D NAND in high-volume manufacturing have significantly increased the number of deposition and etch processing steps and, in the case of 3D NAND, longer and more difficult etch processes are requiring a wider range of power solutions. Further analysis shows that 3D NAND has been the principle growth catalyst, with the total share of power subsystems going to memory applications increasing 8 percentage points since 2013. Memory applications now account for almost half of all power subsystems demand in 2018.

Interestingly, investigation of power subsystems by tool type reveals that a clear majority of power subsystems (60%) find their way on to etch tools with only 40% on deposition tools. This can be explained by the fact that more delicate etch processes can require multiple RF power solutions per tool, whereas deposition does always use plasma energy sources, for example in thermal deposition processes.

Despite the staggering growth performance of the power subsystems segment over the past five years, we expect the growth rate to moderate significantly in the run-up to 2023. Now that 3D NAND has been adopted in high-volume manufacturing, we expect the rate of increase in vacuum/plasma processing steps to slow down. The introduction of EUV also has the potential to taper demand for vacuum processing equipment. However, it is not expected the reverse the trend as multiple patterning techniques will still be needed in conjunction with EUV to achieve the desired improvements in device density and performance. The future growth trend for power and reactive gas subsystems is forecast to be in line with the critical subsystems industry average at approximately 2.0% CAGR until 2023.

Originally published on the SEMI blog.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, to day announced worldwide sales of semiconductors reached $40.16 billion for the month of August 2018, an increase of 14.9 percent compared to the August 2017 total of $34.96 billion. Global sales in August 2018 were 1.7 percent higher than the July 2018 total of $39.49 billion. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Global semiconductor sales continued to bound upward in August, easily outperforming sales from last August and narrowly surpassing last month’s total,” said John Neuffer, president and CEO, Semiconductor Industry Association. “While year-to-year growth has moderated somewhat in recent months, sales remain strong across every major semiconductor product category and regional market, with the China and Americas markets standing out with the largest year-year growth.”

Regionally, sales increased compared to August 2017 in China (27.3 percent), the Americas (15.0 percent), Europe (9.5 percent), Japan (8.4 percent), and Asia Pacific/All Other (4.7 percent). Sales were up compared to last month in China (2.1 percent), the Americas (3.6 percent), and Asia Pacific/All Other (1.3 percent), and decreased slightly inJapan (-0.1 percent), and Europe (-1.4 percent).

For comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, consider purchasing the WSTS Subscription Package. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2018 SIA Databook.

By Jay Chittooran

Last week, SEMI joined a coalition of business groups in calling for Ambassador Robert Lighthizer, U.S. Trade Representative, to enact an exclusion process for the most recent tranche of tariffs on $200 billion in goods imported from China.

While an exclusion process was provided for in the previous tariff lists, which cover about $50 billion in goods, the administration has said that no similar process will be provided on the most recent tariffs on $200 billion (List 3), which took effect Monday. SEMI members will face millions of dollars in additional duties as a result of these tariffs. This action will also curb growth, stifle innovation, and introduce significant uncertainty in the semiconductor industry.

Americans for Free Trade is a diverse coalition, which includes hundreds of companies across the United States, to illustrate the impacts of tariffs on American businesses, consumers and manufacturers. SEMI is a member of this coalition. The full text of the letter can be found here.

Any SEMI members with questions should contact Jay Chittooran, Public Policy Manager at SEMI, at [email protected].

Originally published on the SEMI blog.

Applied Energy Systems (AES), provider of high and ultra high purity gas systems, services, and solutions – including design, manufacturing, testing, installation, and expert field services – has announced the acquisition of Advanced Research Manufacturing (ARM), Inc., a specialty provider of gas purification systems based in Colorado Springs, CO. ARM, Inc. has been manufacturing high and ultra high purity gas purifiers and gas handling equipment for 20 years and boasts a worldwide installed base of point-of-use, micro-bulk and bulk gas purifiers. AES is a long-time leader in the manufacturing of high and ultra high purity gas and liquid delivery systems, and ARM’s portfolio of solutions will now be offered through AES to supplement and further expand its gas delivery equipment offerings and bring new benefits to customers seeking quality gas handling solutions.

“ARM brings getter, catalyst, and absorber purification technology to Applied Energy Systems that will complement our existing product offerings, allowing AES to provide a more complete and unique solution at a very competitive price,” said Steve Buerkel, President of Applied Energy Systems.

ARM, Inc.’s ultra high purity gas purifiers and associated gas handling equipment are used across the industrial, semiconductor, energy, medical, and pharmaceutical markets both in the U.S. and internationally – the same verticals where AES has a proven track record of enabling safe, precise gas delivery. “There is already a great deal of synergy between the AES and ARM teams in terms of our knowledge of gas handling requirements for innovative processes and applications,” said Jim Murphy, General Manager of AES.  “ARM’s products are a natural extension of our equipment offerings, and together we’ll offer customers our collective expertise to benefit their projects – whether they require gas purification or gas delivery solutions, or both.”

Brian Warrick, ARM, Inc.’s Director of Technology, added: “With AES’ and ARM’s combined resources, the research of new technologies and subsequent development of new products can occur at a more rapid pace. This will enable us to efficiently add to ARM’s existing portfolio of offerings that include purifiers as well as field engineering support.”

“We are extremely pleased to become a part of AES, and look forward to growing our market share in the purification of high and ultra high purity gas,” said Dan Spohn, Director of Global Sales and Market Development at ARM.