Canon Marketing Japan Inc. (CEO: Masahiro Sakata) has signed an exclusive distribution agreement in Japan with ClassOne Technology Inc. (CEO: Byron Exarcos) and it will start receiving orders for ECD tool Solstice® in 2018.
ClassOne Technology Inc. is a supplier of wet process equipment for the 200mm and smaller semiconductor industry. The Solstice® platform delivers the highest quality plating of Au, Ni, and Cu at low cost, as well as variety of wet process functionality, such as metal lift off, resist strip, Au de-plating, UBM etch, and anodization.
Solstice® is available in 2-, 4-, and 8-chamber variants, and provides industry-leading uniformity and throughput with the smallest footprint, automation capability, controllability, and lowest cost of ownership. Solstice® is ideally suited to growing customers who need to move from ≤200mm wet bench processing to high-volume automated single-wafer production.
The agreement with ClassOne Technology will assist CMJ in expanding its business in the high-growth segment of high speed optical communication, 3D sensing including ToF, high frequency power devices, and related device markets. CMJ offers extensive experience in introducing the highest quality equipment from around the world and will provide world-class technical and field support for ClassOne products after system delivery.
Category Archives: Semiconductors
IC Insights’ September Update to The McClean Report shows that as a result of a 51% forecasted increase in the China pure-play foundry market this year (Figure 1), China’s total share of the 2018 pure-play foundry market is expected to jump by five percentage points to 19%, exceeding the share held by the rest of the Asia-Pacific region. Overall, China is forecast to be responsible for 90% of the $4.2 billion increase in the total pure-play foundry market in 2018.
Figure 1
With the recent rise of the fabless IC companies in China, the demand for foundry services has also risen in that country. In total, pure-play foundry sales in China jumped by 26% last year to $7.5 billion, almost triple the 9% increase for the total pure-play foundry market. Moreover, in 2018, pure-play foundry sales to China are forecast to surge by an amazing 51%, more than 6x the 8% increase expected for the total pure-play foundry market this year.
Although all of the major pure-play foundries are expected to register double-digit sales increases to China this year, the biggest increase by far is forecast to come from pure-play foundry giant TSMC. Following a 44% jump in 2017, TSMC’s sales into China are forecast to surge by another 79% in 2018 to $6.7 billion. As a result, China is expected to be responsible for essentially all of TSMC’s sales increase this year with China’s share of the company’s sales more than doubling from 9% in 2016 to 19% in 2018.
As shown in Figure 2, much of TSMC’s sales surge into China has come over the past year, with 2Q18 sales into the country being almost double what they were in 3Q17. A great deal of the company’s recent sales surge into China has been driven by increased demand for custom devices going into the cryptocurrency market. It turns out that many of the large cryptocurrency fabless design firms are based in China and most of them have been turning to TSMC to produce their advanced chips for these applications. It should be noted that TSMC includes its cryptocurrency business as part of its High-Performance Computing segment.
Figure 2
While TSMC has enjoyed a great ramp up in sales for its cryptocurrency business over the past year, the company has indicated that a slowdown is expected for this business in the second half of this year. It appears that the demand for cryptocurrency devices is highly dependent upon the price for the various cryptocurrencies (the most popular of which is Bitcoin). As a result, the recent plunge in the price for Bitcoins (going from over $15K per Bitcoin in January of this year to less than $7K in September), and other cryptocurrencies as well, is lowering the demand for these ICs. Moreover, since TSMC realized from the beginning that the cryptocurrency market was going to be volatile, the company did not adjust its capacity plans based on the recent strong cryptocurrency demand and does not incorporate cryptocurrency business assumptions into its forecasts for future long-term growth.
WIN Semiconductors Corp. (TPEx:3105), the world’s largest pure-play compound semiconductor foundry, is driving the development and deployment of 5G user equipment and network infrastructure in the sub-6GHz and mmWave frequency bands. Front-end semiconductor technology has a significant influence on battery life and total power consumption of mobile devices and active antenna arrays employed in mmWave network infrastructure. GaAs is the technology of choice for front-ends used in LTE mobile devices and satisfies stringent linearity and efficiency requirements providing high quality of service while maximizing battery life. 5G user equipment and MIMO access points will impose more difficult linearity/power consumption specifications than LTE, and WINs portfolio of high performance GaAs technologies is well positioned to meet these new requirements and provide best value front-end solutions.
The fundamental performance advantages of GaAs make it the dominant semiconductor technology for cellular and Wi-Fi RF front-ends used in mobile devices. The technical and manufacturing demands of these large and highly competitive markets have driven significant advances in GaAs technology, and now offers best-in-class front-end performance in all 5G bands and multifunction integration necessary for complex mmWave active antenna systems. WINs advanced GaAs platforms integrate best-in-class transmit and receive amplifier technologies with high performance switch, logic and ESD protection functions to realize compact high performance, single chip, front-ends for mobile devices and MIMO access points operating in the sub-6GHz and mmWave 5G bands.
WIN Semiconductors innovative GaAs technologies, such as PIH1-10, can now monolithically integrate a high efficiency Tx power amplifier (PA), ultra-low Fmin Rx low-noise amplifier (LNA) and low loss PIN switch in a single chip mmWave front-end. In addition, this highly integrated GaAs technology provides optional linear Schottky diodes for power detectors and mixers, low capacitance PIN diodes for ESD protection and optimized E/D transistors for logic interfaces. This suite of capabilities comes in a humidity-rugged back-end, available with a copper redistribution layer and copper pillar bumps to reduce die size and allow flip chip assembly, enabling GaAs front-ends to fit within 28 and 39 GHz antenna lattice spacing.
Last week, more than a dozen senior semiconductor executives traveled to Washington, DC for the first-ever Fall Washington Forum. The SEMI Washington Forum, a venue for SEMI members to educate lawmakers about the industry, focused on action against China, both in the form of tariffs and export controls.
Our industry is global, and companies rely heavily on trade. In 2017, more than 90 percent of equipment made in the United States was exported. Because of this dynamic, the United States holds a nearly $9 billion trade surplus in this industry. SEMI is supportive of trade policies that open foreign markets.
In the meetings, the executives expressed deep concern that the tariffs would inflict deep damage to the U.S. economy, including to SEMI members. Estimates suggest that the Sec. 301 tariffs (and the Chinese retaliatory tariffs) will cost semiconductor companies more than $700 million annually, dramatically increasing the cost of doing business. These tariffs also threaten U.S. technological leadership. The United States has led innovation for decades. However, by pursuing policies that limit market access opportunities, company-led R&D and innovation will slow, which, in turn, will curb further export potential.
SEMI companies also stressed that because of the blunt application of these tariffs, this action will actually hurt U.S. companies as much as it hurts their Chinese competitors. Indeed, about 40 percent of imports in our sector from China are from U.S. or other non-Chinese companies. Further, the semiconductor industry relies on a vast network of supply chains, which have been built and qualified over the course of years. A fundamental revamp of supply chains is simply not feasible. This would be expensive, time-consuming, and resource-intensive.
With a growing number of policy issues that are central to and could have significant impact for semiconductor companies, SEMI hosted its first ever Fall Washington Forum for members of its North American Advisory Board (NAAB). SEMI also invited several other industry executives. In total, 14 senior industry executives, including representatives from equipment manufacturers, component suppliers, and materials providers, attended the Fall Forum.
During the two days of meetings, SEMI met with several senior Administration officials to better the policies being enacted and considered as well as encourage all parties to not impose barriers to commerce, which would severely impact the semiconductor industry. SEMI also met with Members of Congress and their staffs on this issue.
All told, attendees at the Fall Forum had more than 15 meetings with policymakers, reflecting the great impact of public policy on SEMI members companies. At a time when the stakes for the industry could not be higher, direct engagement with lawmakers is critical. The Washington Forum offers an incredible opportunity for members to better understand the impact of key public policy issues and gain firsthand experience in influencing policy and helping lawmakers better understand the industry.
If you are interested in learning more about the SEMI Washington Forum or SEMI’s public policy program, please contact Jay Chittooran by email at [email protected].
U.S. Government Imposes Tariffs on $200 Billion of Goods and China Retaliates on $60 Billion of Goods
Earlier this week, the U.S. Trade Representative (USTR) released a 10 percent tariff on $200 billion in imports from China, including more than 90 tariff lines central to the semiconductor industry.
The 10 percent tariff will take effect on September 24, 2018, and rise to 25 percent on January 1. These tariff lines will cost SEMI’s 400 U.S. members tens of millions of dollars annually in additional duties. However, counting the products included in the previous rounds of tariffs, the total estimated impact exceeds $700 million annually. China has already announced that it will respond with tariffs on $60 billion worth of U.S. goods. In his notice, President Trump said the U.S. will impose tariffs on $267 billion worth of goods if China retaliates.
The U.S. government removed 279 total tariff lines, including three lines that impact our industry: silicon carbide, tungsten, and network hubs used in the manufacturing process.
As we’ve noted, intellectual property is critical to the semiconductor industry, and SEMI strongly supports efforts to better protect valuable IP. However, we believe that these tariffs will ultimately do nothing to address the concerns with China’s trade practices. This sledgehammer approach will introduce significant uncertainty, impose greater costs, and potentially lead to a trade war. This undue harm will ultimately undercut our companies’ ability to sell overseas, which will only stifle innovation and curb U.S. technological leadership.
Product Exclusion Process – List 2
USTR formally published the details for the product exclusion process for products subject to the List 2 China 301 tariffs (the $16 billion tariff list). If your company’s products are subject to tariffs, you can request an exclusion.
In evaluating product exclusion requests, the USTR will consider whether a product is available from a source outside of China, whether the additional duties would cause severe economic harm to the requestor or other U.S. interests, and whether the product is strategically important or related to Chinese industrial programs (such as “Made in China 2025”)
The request period ends on December 18, 2018, and approved exclusions will be effective for one year, applying retroactively to August 23, 2018. Because exclusions will be made on a product basis, a particular exclusion will apply to all imports of the product, regardless of whether the importer filed a request.
More information, including the process for submitting the product exclusion request and details what information should be included in your submission can be found here.
Please let me know if your company plans on filing an exclusion. SEMI has prepared a document that includes guidelines for your exclusion filing, an explainer on how to submit, and links to official government info. SEMI is glad to assist your companies file exclusion requests for your products.
SEMI will continue tracking ongoing trade developments. Any SEMI members with questions should contact Jay Chittooran, Public Policy Manager at SEMI, at [email protected].
Mark Lipacis, Managing Director of Jefferies Group LLC and a leading analyst in identifying semiconductor industry trends and opportunities, will present a featured keynote during the GSA Silicon Summit – East, being held Tuesday, October 9 in Saratoga Springs, NY.
The inaugural conference is presented by the Saratoga County Prosperity Partnership (Saratoga Partnership), Saratoga County, NY’s economic development agency; the Global Semiconductor Alliance (GSA), a leading voice for the worldwide semiconductor industry; and the Center for Economic Growth (CEG), a regional economic and business development organization.
A top executive with the world’s only independent full-service global investment banking firm, Lipacis will discuss “The 4th Tectonic Shift in Computing – The Next Growth Opportunity for Semis.” Highlighting the technical innovations that translate to tectonic shifts in computing, his remarks will focus on the current evolution to a parallel processing/Internet of Things (IoT) model, driven by improvements in parallel processing and Artificial Intelligence (AI) technologies.
“Mark Lipacis is a thought leader with a deep market research expertise in edge computing and IoT. We look forward to Mark’s closing keynote and the important insights that he will share on the 4th tectonic shift in computing and the new opportunities it brings for the semiconductor industry and end markets,” said Dr. Shrikant Lohokare, Executive Director and Senior Vice President, GSA. “As rapid innovation continues to disrupt computing, and the impact of the semiconductor industry ripples through the world of business, his outlook will be of particular significance in addressing challenges and harnessing opportunities.”
“With the presence of GLOBALFOUNDRIES marking Saratoga County as a global leader in advanced semiconductor manufacturing, Silicon Summit – East is the ideal venue for Mark Lipacis to present a worldview of the latest industry evolution in computing,” said Marty Vanags, President of the Saratoga County Prosperity Partnership. “We are eager to hear his vision for the future, and in the process, to connect companies throughout the supply chain with opportunites to locate and grow high-tech business in Saratoga County.”
Lipacis has 18 years of experience in equity research, having joined Jefferies Group LLC in 2011 from Morgan Stanley, where he spent four years as a senior semiconductor analyst, and most recently as a managing director. In 2010, he was a runner-up in the institutional investor analyst survey, ranked number three in the Greenwich Associates poll, and ranked highly in previous Wall Street Journal and Starmine Polls – including being recognized as the number one semiconductor stock picker by Starmine in 2009. Previously, he was a first vice president and senior semiconductor analyst at Prudential, and prior to that a director and lead communicatons semiconductor analyst at Merrill Lynch.
Scheduled to deliver the opening keynote is Dr. Gary Patton, Chief Technology Officer and Senior Vice President of Worldwide Research and Development at GLOBALFOUNDRIES. A well-recognized industry leader in semiconductor technology R&D with over 30 years of semiconductor experience, Patton is responsible for GLOBALFOUNDRIES’ semiconductor technology R&D roadmap, operations and execution. His address will discuss “Market Drivers for Moore and Beyond Moore Semiconductor Technologies.”
The Networking Break Sponsor for GSA Silicon Summit – East is Micron. Gold Sponsors are Analog Devices, BBL and National Grid. Complete information about the event, including the program and sponsorship opportunities, can be found at https://www.gsaglobal.org/2018sse/.
GSA Silicon Summit – East was created through a strategic alliance established last year by the Saratoga Partnership and GSA. The event, with a theme of “Harnessing Emerging Semiconductor Market Opportunities,” is designed to promote partnerships and drive efficiencies that advance semiconductor technology and business, while also informing the regional ecosystem on growth opportunities.
For the first time ever, an international team of scientists from NUST MISIS, the Hungarian Academy of Sciences, the University of Namur (Belgium), and Korea Research Institute for Standards & Science has managed to trace in details the structural changes of two-dimensional molybdenum disulfide under long-term environmental impact. The new data narrows the scope of its potential application in microelectronics and at the same time opens up new prospects for the use of two-dimensional materials as catalysts. The research results have been published in the international scientific journal Nature Chemistry.
Pavel Sorokin, head of the research team and leading researcher at the NUST MISIS Laboratory of Inorganic Nanomaterials. Credit: Sergey Gnuskov/NUST MISIS
Molybdenum disulfide (MoS2) is considered a promising basis for a variety of ultra-small electronic devices such as high-frequency detectors, rectifiers, and transistors, so research teams around the world are actively studying its two-dimensional format, nanofilm. However, the new research conducted by NUST MISIS scientists has demonstrated that when this two-dimensional material is significantly oxidized in air, it turns into another connection.
Any electronic device using MoS2, without proper protection would simply stop working relatively quickly. To potentially use MoS2 in microelectronics, the devices would have to be encapsulated.
«For the first time ever, we have managed to experimentally prove that a single-layer molybdenum disulfide strongly degrades under environmental conditions, oxidizing and turning into a solid solution MoS2-xOx,. The functions of a two-dimensional semiconductor without defects and losses can be implemented with molybdenum diselenides, another material with a similar structure», said Pavel Sorokin, head of the research team and leading researcher at the NUST MISIS Laboratory of Inorganic Nanomaterials.
In the experiments, two-dimensional layers of molybdenum disulfide obtained as a result of the stratification of molybdenum disulfide crystals by ultrasound, were maintained in environmental conditions at normal room temperature and lighting for long periods (more than a year and a half), during which scientists observed the changes in the structure of its surface.
«Thanks to the use of tunneling microscopy, we were able to track the structural changes of crystals of two-dimensional sulfur disulfide at the atomic level during long-term exposure to environmental conditions. We have discovered that the material previously considered stable is actually subject to spontaneous oxidation, but at the same time, the original crystal structure of MoS2 monolayers retains formations of MoS2-xOx solid solutions. Our simulations have allowed us to propose a mechanism of forming such solid solutions, and the results of the theoretical calculations are in complete agreement with our experimental measurements» – said Zakhar Popov, one of the co-authors of the study and a senior researcher at the NUST MISIS Laboratory of Inorganic Nanomaterials.
«The study’s second key discovery is the new material that the monolayer of the molybdenum disulfide turns into is a two-dimensional crystal of a solid solution MoS2-xOx, which is an effective catalyst for electromechanical processes», concluded Sorokin.
The ConFab – an exclusive conference and networking event targeted to semiconductor manufacturing and design executives from leading device makers, OEMs, OSATs, fabs, suppliers and fabless/design companies – is proud to announce its opening Keynote speaker, the distinguished Dr. Jeffrey J. Welser from IBM Research – Almaden. Being held at The Cosmopolitan of Las Vegas from May 14-17, Pete Singer, The ConFab Conference Chair and Editor in Chief of Solid State Technology, will welcome Dr. Welser to the stage on May 15.
In what promises to bring the audience valuable insights, Dr. Welser will continue on the theme established at The ConFab in 2018: Artificial Intelligence. AI, which represents a market opportunity $2 trillion on top of the existing $1.5-2B information technology industry, is seen as a huge game changer in the semiconductor industry. In addition to AI chips from traditional IC companies such as Intel, IBM and Qualcomm, more than 45 start-ups are working to develop new AI chips, with VC investments of more than $1.5B. Tech giants such as Google, Facebook, Microsoft, Amazon, Baidu and Alibaba are also developing AI chips. Dr. Welser will describe how making AI semiconductor engines will require a wildly innovative range of new materials, equipment, and design methodologies. To get to the next level in performance/Watt, innovations being researched at the AI chip level – at IBM and elsewhere — include: low precision computing, analog computing and resistive computing.
“Dr. Welser has great insight into how AI will be used to analyze the vast amounts of unstructured data being generated today, the various approaches to AI, and the kinds of innovations that will be needed at the chip level,” said Pete Singer. “We did a deep dive into AI in 2018 with speakers from IBM, Google, Nvidia, HERE Technologies, Silicon Catalyst, TechInsights, Siemens and Qorvo, among others. We’re delighted that Dr. Welser will build upon that in 2019 with his kickoff keynote.”
As Vice President and Lab Director at IBM Research – Almaden, Dr. Welser oversees exploratory and applied research. Home of the relational database and the world’s first hard disk drive, Almaden today continues its legacy of advancing data technology and analytics for Cloud and AI systems and software, and is increasingly focused on advanced computing technologies for AI, neuromorphic devices and quantum computing. After joining IBM Research in 1995, Dr. Welser has worked on a broad range of technologies, including novel silicon devices, high performance CMOS and SOI device design, and next generation system components. He has directed teams in both development and research as well as running industrial, academic and government consortiums, including the SRI Nanoelectronics Research Initiative.
Additional industry experts adding to The ConFab 2019 Agenda will be announced soon.
The Semiconductor Industry Association (SIA), in collaboration with the Semiconductor Research Corporation (SRC), today announced the winners of its 2018 University Research Awards: Dr. Judy Hoyt, professor of electrical engineering and computer science at the Massachusetts Institute of Technology (MIT), and Dr. Naresh Shanbhag, professor of electrical and computer engineering at the University of Illinois at Urbana-Champaign. Professors Hoyt and Shanbhag will receive the awards in conjunction with the SIA Annual Award Dinner on Nov. 29, 2018 in San Jose, Calif.
“Research is the lifeblood of innovation, spurring new technologies that drive growth in the semiconductor industry and throughout the U.S. economy,” said John Neuffer, president and CEO of SIA, which represents U.S. leadership in semiconductor manufacturing, design, and research. “Throughout their distinguished careers, Professors Hoyt and Shanbhag have advanced groundbreaking scientific research, driven breakthroughs in semiconductor technology, and helped strengthen America’s global technological leadership. We are pleased to recognize Dr. Hoyt and Dr. Shanbhag for their tremendous accomplishments.”
Neuffer also highlighted the importance of government investments in semiconductor research funded through agencies such as the National Science Foundation, the National Institute of Standards and Technology, the U.S. Department of Energy, and the Defense Department’s Defense Advanced Research Projects Agency. He expressed SIA’s readiness to work with the Trump administration and Congress to prioritize these investments in scientific research.
“The University Research Award was established to recognize lifetime achievements in semiconductor research by university faculty,” said Ken Hansen, president & CEO of SRC. “Drs. Shanbhag and Hoyt have repeatedly advanced the state-of-the-art semiconductor design and technology in their respective fields. These esteemed professors’ influence on their students has produced new leaders and contributors in the semiconductor industry. The research output from universities tackling industry relevant challenges plays an integral role in next-generation innovations. It is with great appreciation and admiration that the entire SRC team congratulates Dr. Shanbhag and Dr. Hoyt.”
Dr. Hoyt will receive the honor for excellence in semiconductor technology research. She is being recognized for her contributions in pioneering development of strained Si MOSFET devices. Dr. Hoyt’s work helped to break the 10nm barrier and is broadly adopted by companies such as Intel, TSMC, IBM, and others. From 1988-1999, Dr. Hoyt was a senior research scientist in electrical engineering at Stanford University. In January 2000, she joined the faculty at MIT in the Department of Electrical Engineering and Computer Science. She currently serves as associate director within the Microsystems Technology Laboratories (MTL). Dr. Hoyt received a Ph.D. in Applied Physics from Stanford University.
Dr. Shanbhag will receive the award for excellence in semiconductor design research. Specifically, he is being honored for pioneering an Information-Theoretic approach for computing by fusing Claude Shannon’s theory for communications with Turing machines. After designing DSL chip-sets at AT&T Bell Laboratories (1993-1995), he joined the faculty at the University of Illinois at Urbana-Champaign in the Department of Electrical and Computer Engineering where he now holds the Jack S. Kilby Professorship. He co-founded Intersymbol Communications, Inc., and served as CTO (2000-2007), bringing electronic dispersion compensation chip-sets for OC-192 ultra long-haul fiber optic links. In January 2013, Dr. Shanbhag became the founding director of the Systems On Nanoscale Information fabriCs (SONIC) Center, a five-year, multi-university center funded by DARPA and SRC. Dr. Shanbhag received a Ph.D. from the University of Minnesota in Electrical Engineering.
MagnaChip Semiconductor Corporation (“MagnaChip”) (NYSE: MX), a designer and manufacturer of analog and mixed-signal semiconductor products, announced today that it will hold a Foundry Technology Symposium at the Shangri-La in Shenzhen, China, on November 27, 2018. After holding a successful Foundry Technology symposium in Shenzhen, China in 2015, this second technology symposium in Shenzhen is part of MagnaChip’s global foundry targeted geographic strategy to increase MagnaChip’s brand awareness in China.
Major topics to be discussed are MagnaChip’s current Foundry service offerings and future business roadmap, specialty technology processes, target applications and end-markets. This symposium is being conducted as a direct response to the increased interest and demand from current fabless customers in China for advanced analog and mixed-signal specialized foundry technologies.
During the symposium in Shenzhen, MagnaChip will highlight its technology portfolio along with discussions focused on mixed-signal, low-power technologies in the Internet of Things (IoT) sector, Bipolar-CMOS-DMOS (BCD) for high-performance analog and power management applications, Ultra-High Voltage (UHV) and Non-Volatile Memory (NVM). In addition, MagnaChip will present technologies used in applications including smartphones, tablet PCs, automotive, LED lighting, consumer wearables and IoT.
“We hope that this Foundry Technology Symposium in Shenzhen will better position us to understand our customers’ needs in China,” said YJ Kim, Chief Executive Officer of MagnaChip. “With our technology symposiums held in United States, Taiwan and now in Shenzhen, China, we strongly believe that we will be able to better serve our global customers with our long history of providing successful foundry services and with our deep technological expertise.”
A multitude of fabless companies, IDMs (Integrated Device Manufacturers) and other semiconductor companies are expected to attend MagnaChip’s Shenzhen technology symposium.
To sign up for the event, and to receive more detailed information regarding the symposium, please visit www.magnachip.com or ifoundry.magnachip.com.