Category Archives: Semiconductors

A new study by scientists at the National Institute of Standards and Technology (NIST) has uncovered a source of error in an industry-standard calibration method that could lead microchip manufacturers to lose a million dollars or more in a single fabrication run. The problem is expected to become progressively more acute as chipmakers pack ever more features into ever smaller space.

The error occurs when measuring very small flows of exotic gas mixtures. Small gas flows occur during chemical vapor deposition (CVD), a process that occurs inside a vacuum chamber when ultra-rarefied gases flow across a silicon wafer to deposit a solid film. CVD is widely used to fabricate many kinds of high-performance microchips containing as many as several billion transistors. CVD builds up complex 3D structures by depositing successive layers of atoms or molecules; some layers are only a few atoms thick. A complementary process called plasma etching also uses small flows of exotic gases to produce tiny features on the surface of semiconducting materials by removing small amounts of silicon.

The exact amount of gas injected into the chamber is critically important to these processes and is regulated by a device called a mass flow controller (MFC). MFCs must be highly accurate to ensure that the deposited layers have the required dimensions. The potential impact is large because chips with incorrect layer depths must be discarded.

“Flow inaccuracies cause nonuniformities in critical features in wafers, directly causing yield reduction,” said Mohamed Saleem, Chief Technology Officer at Brooks Instrument, a U.S. company that manufactures MFCs among other precision measurement devices. “Factoring in the cost of running cleanrooms, the loss on a batch of wafers scrapped due to flow irregularities can run around $500,000 to $1,000,000. Add to that cost the process tool downtime required for troubleshooting, and it becomes prohibitively expensive.”

Modern nanofabrication facilities cost several billion dollars each, and it is generally not cost-effective for a company to constantly fine tune CVD and plasma etching. Instead, the facilities rely on accurate gas flows controlled by MFCs. Typically, MFCs are calibrated using the “rate of rise” (RoR) method, which makes a series of pressure and temperature measurements over time as gas fills a collection tank through the MFC.

“Concerns about the accuracy of that technique came to our attention recently when a major manufacturer of chip-fabrication equipment found that they were getting inconsistent results for flow rate from their instruments when they were calibrated on different RoR systems,” said John Wright of NIST’s Fluid Metrology Group, whose members conducted the error analysis.

Wright was particularly interested because for many years he had seen that RoR readings didn’t agree with results obtained with NIST’s “gold standard” pressure/volume/temperature/time system. He and colleagues developed a mathematical model of the RoR process and conducted detailed experiments. The conclusion: conventional RoR flow measurements can have significant errors because of erroneous temperature values. “The gas is heated by flow work as it is compressed in the collection tank, but that is not easily accounted for: it is difficult to measure the temperature of nearly stationary gas.”

Wright and colleagues found that without corrections for these temperature errors, RoR readings can be off by as much as 1 percent, and perhaps considerably more. That might not seem like a lot, but low uncertainty is critical to attaining uniformity and quality in the chip manufacturing process. And the challenge is growing. Current low-end flow rates in the semiconductor industry are in the range of one standard cubic centimeter (1 sccm)–about the volume of a sugar cube–per minute, but they will soon shrink by a factor of 10 to 0.1 sccm.

Precise flow measurement is a particularly serious concern for manufacturing processes that use etching of deposited layers to form trench-like features. In that case, the MFC is often open for no more than a few seconds.

“A tiny amount of variation in the flow rate has a profound effect on the etch rate and critical dimensions of the structures” in very large-scale integrated circuits, said Iqbal Shareef of Lam Research, a company headquartered in California that provides precision fabrication equipment to microchip manufacturers.

“So, we are extremely concerned about flow rates being accurate and consistent from chamber to chamber and wafer to wafer,” Shareef said. “Our industry is already headed toward very small flow rates.”

“We are talking about wafer uniformity today on the nanometer and even subnanometer scale,” Shareef said.

That’s very small. But it’s what the complexity of three-dimensional chip manufacturing increasingly demands. Not so long ago, “a 3D integrated circuit used to have four layers of metals,” said William White, Director of Advanced Technology at HORIBA Instruments Incorporated, a global firm that provides analytical and measurement systems. “Now companies are regularly going to 32 layers and sometimes to 64. Just this year I heard about 128.” And some of those chips have as many as 3,000 process steps.

“Each 300 mm wafer can cost up to $400, and contains 281 dies for a die size of 250 to 300 mm2,” Brooks’ Saleem said. “Each die in today’s high-end integrated circuits consists of about three to four billion transistors. Each wafer goes through 1 or 2 months of processing that includes multiple runs of separate individual processes,” including chemical vapor deposition, etch, lithography and ion implantation. All those processes use expensive chemicals and gases.

Many companies are already re-examining their practices in light of the NIST publication, which provides needed theoretical explanations for the source of RoR flow measurement errors. The theory guides designers of RoR collection tanks and demonstrates easy-to-apply correction methods. RoR theory shows that different temperature errors will occur for the different gases used in CVD processes. The NIST publication also provides a model uncertainty analysis that others can use to know what level of agreement to expect between MFCs calibrated on different RoR systems.

“NIST serves as a reliable reference for knowledge and measurement where industry can assess agreement between their systems,” Wright said. “As manufacturers’ measurement needs push to ever lower flows, so will NIST calibration standards.”

ClassOne Technology, a supplier of new electroplating and wet process tools to the 200mm and smaller semiconductor manufacturing industry, today announced a multi-tool sale of its flagship Solstice® CopperMax™ electroplating system to China’s premier compound semiconductor manufacturer. As the largest such supplier in China—among the largest Gallium Arsenide (GaAs) fabs in the world—ClassOne’s new client will use CopperMax™ to anchor the production of highly-advanced power chips with breakthrough designs suitable for a variety of leading-edge semiconductor markets.

“ClassOne has emerged as the supplier of choice for the exacting requirements of the Compound Semiconductor industry,” says ClassOne CEO Byron Exarcos. “ClassOne has presence in each of the leading Compound Semiconductor fabs around the world, now including a global leader in the development and manufacture of semiconductors based on GaAs substrates. This sale further confirms ClassOne’s leadership status in electroplating technology worldwide.”

ClassOne expects multiple similar sales in the coming months, as semiconductor manufacturing facilities throughout Asia expand their processing capabilities for advanced applications such as 3D Sensing, Autonomous Vehicles, and 4G/5G Communications—applications that require highly-advanced Compound Semiconductor chip technology.

Global semiconductor industry revenue grew 4.4 percent, quarter over quarter, in the second quarter of 2018, reaching a record $120.8 billion. Semiconductor growth occurred in all application markets and world regions, according to IHS Markit (Nasdaq: INFO).

“The explosive growth in enterprise and storage drove the market to new heights in the second quarter,” said Ron Ellwanger, senior analyst and component landscape tool manager, IHS Markit. “This growth contributed to record application revenue in data processing and wired communication markets as well as in the microcomponent and memory categories.”

Due to the ongoing growth in the enterprise and storage markets, sequential microcomponent sales grew 6.5 percent in the second quarter, while memory semiconductor revenue increased 6.4 percent. “Broadcom Limited experienced exceptional growth in its wired communication division, due to increased cloud and data-center demand,” Ellwanger said.

Memory component revenue continued to rise in the second quarter, compared to the previous quarter, reaching $42.0 billion dollars. “This is the ninth consecutive quarter of rising revenue from memory components, and growth in the second quarter of 2018 was driven by higher density in enterprise and storage,” Ellwanger said. “This latest uptick comes at a time of softening prices for NAND flash memory. However, more attractive pricing for NAND memory is pushing SSD demand and revenue higher.”

Semiconductor market share

Samsung Electronics continued to lead the overall semiconductor industry in the second quarter with 15.9 percent of the market, followed by Intel at 13.9 percent and SK Hynix at 7.9 percent. Quarter-over-quarter market shares were relatively flat, with no change in the top-three ranking. SK Hynix achieved the highest growth rate and record quarterly sales among the top three companies, recording 16.4 percent growth in the second quarter.

A team of researchers led by the University of Minnesota has developed a new material that could potentially improve the efficiency of computer processing and memory. The researchers have filed a patent on the material with support from the Semiconductor Research Corporation, and people in the semiconductor industry have already requested samples of the material.

The findings are published in Nature Materials, a peer-reviewed scientific journal published by Nature Publishing Group.

This cross-sectional transmission electron microscope image shows a sample used for the charge-to-spin conversion experiment. The nano-sized grains of less than 6 nanometers in the sputtered topological insulator layer created new physical properties for the material that changed the behavior of the electrons in the material. Credit: Wang Group, University of Minnesota

“We used a quantum material that has attracted a lot of attention by the semiconductor industry in the past few years, but created it in unique way that resulted in a material with new physical and spin-electronic properties that could greatly improve computing and memory efficiency,” said lead researcher Jian-Ping Wang, a University of Minnesota Distinguished McKnight Professor and Robert F. Hartmann Chair in electrical engineering.

The new material is in a class of materials called “topological insulators,” which have been studied recently by physics and materials research communities and the semiconductor industry because of their unique spin-electronic transport and magnetic properties. Topological insulators are usually created using a single crystal growth process. Another common fabrication technique uses a process called Molecular Beam Epitaxy in which crystals are grown in a thin film. Both of these techniques cannot be easily scaled up for use in the semiconductor industry.

In this study, researchers started with bismuth selenide (Bi2Se3), a compound of bismuth and selenium. They then used a thin film deposition technique called “sputtering,” which is driven by the momentum exchange between the ions and atoms in the target materials due to collisions. While the sputtering technique is common in the semiconductor industry, this is the first time it has been used to create a topological insulator material that could be scaled up for semiconductor and magnetic industry applications.

However, the fact that the sputtering technique worked was not the most surprising part of the experiment. The nano-sized grains of less than 6 nanometers in the sputtered topological insulator layer created new physical properties for the material that changed the behavior of the electrons in the material. After testing the new material, the researchers found it to be 18 times more efficient in computing processing and memory compared to current materials.

“As the size of the grains decreased, we experienced what we call ‘quantum confinement’ in which the electrons in the material act differently giving us more control over the electron behavior,” said study co-author Tony Low, a University of Minnesota assistant professor of electrical and computer engineering.

Researchers studied the material using the University of Minnesota’s unique high-resolution transmission electron microscopy (TEM), a microscopy technique in which a beam of electrons is transmitted through a specimen to form an image.

“Using our advanced aberration-corrected scanning TEM we managed to identify those nano-sized grains and their interfaces in the film,” said Andre Mkhoyan, a University of Minnesota associate professor of chemical engineering and materials science and electron microscopy expert.

Researchers say this is only the beginning and that this discovery could open the door to more advances in the semiconductor industry as well as related industries, such as magnetic random access memory (MRAM) technology.

“With the new physics of these materials could come many new applications,” said Mahendra DC (Dangi Chhetri), first author of the paper and a physics Ph.D. student in Professor Wang’s lab.

Wang agrees that this cutting-edge research could make a big impact.

“Using the sputtering process to fabricate a quantum material like a bismuth-selenide-based topological insulator is against the intuitive instincts of all researchers in the field and actually is not supported by any existing theory,” Wang said. “Four years ago, with a strong support from Semiconductor Research Corporation and the Defense Advanced Research Projects Agency, we started with a big idea to search for a practical pathway to grow and apply the topological insulator material for future computing and memory devices. Our surprising experimental discovery led to a new theory for topological insulator materials.

“Research is all about being patient and collaborating with team members. This time there was a big pay off,” Wang said.

Sanan Integrated Circuit Co., a pure-play compound semiconductor foundry, today announces its entry into the North American, European, and Asia Pacific (APAC) markets with their advanced III-V technology platform. With their broad portfolio of gallium arsenide (GaAs) HBT, pHEMT, BiHEMT, integrated passive device (IPD), filters, gallium nitride (GaN) power HEMT, silicon carbide (SiC), and indium phosphide (InP) DHBT process technologies, they cover a wide range of applications among today’s active microelectronics and photonics markets. Sanan IC is strongly focused on high performance, large scale, and high quality III-V semiconductor manufacturing and on serving the RF, millimeter wave, power electronics, and optical markets.

Founded in 2014, headquartered in Xiamen City, in the Fujian province of south China, Sanan IC is subsidiary of Sanan Optoelectronics Co., Ltd., the leading LED chip manufacturing company, based on GaN and GaAs technologies. Leveraging high volume production and years of investment in numerous epitaxial wafer reactors of its parent company for the LED lighting and solar photovoltaic markets, Sanan IC is expanding their go-to-market strategy beyond the Greater China region as their process technologies and patent portfolio mature, with a vision to fulfill the needs of independent design manufacturers (IDM’s) and fabless design houses for high volume compound semiconductor fabrication.

“We see tremendous opportunity in serving the world-wide demand for large scale production of 6-inch III-V epitaxial wafers, driven by continual growth of the RF, millimeter wave, power electronics, and optical markets,” said Raymond Cai, Chief Executive Officer of Sanan IC. “Our vertically integrated manufacturing services over our broad compound semiconductor technology platform, with in-house epitaxy and substrate capabilities, make us an ideal foundry partner. Given the capital investments made on state-of-the art equipment and facilities, with full support from our parent company, Sanan Optoelectronics, combined with strategic partnerships, and a world-class team of scientists and technologists, Sanan IC is well positioned for success in this active compound semiconductor market”.

As cellular mobility and wireless connectivity proliferates in the Internet-of-Things (IoT), and 5G sub-6GHz evolves into millimeter wave, III-V technologies become even more critical to support the infrastructure and client device deployments by carriers worldwide. According to Yole Développement (Yole), a leading technology market research firm, part of Yole Group of Companies, the GaAs wafer market, comprised of RF, photonics, photovoltaics, and LEDs, is expected to grow to over 4 million units in 2023, with photonics having the highest growth at 37% CAGR1. GaN and SiC for power electronics, such as for data centers, electric vehicles (EVs), battery chargers, power supplies, LiDAR, and audio, are predicted to ramp up, with GaN reaching up to $460M shipments by 2022 with a CAGR of 79%2 while SiC projects to reach $1.4B at 29% CAGR by 20233. Optical components continue to be in high demand for datacom, telecom, consumer, automotive and industrial markets, leading to increased revenues for photodectors, laser diodes, and especially VCSELs with expected shipments of $3.5B in 20234. As these applications emerge, Sanan IC is poised to support the industry’s needs.

Sources:
1GaAs Wafer & Epiwafer Market: RF, Photonics, LED & PV Applications Report, Yole Développement (Yole), 2018
2,3Power SiC 2018: Materials, Devices and Applications Report, Yole Développement (Yole), 2018
4Source: VCSELs – Technology, Industry & Market Trends report, Yole Développement (Yole), 2018

SiFive, a provider of commercial RISC-V processor IP, today announced that ASIC Design Services, a design house, IP provider, and a distributor for FPGA and EDA software, has joined the DesignShare ecosystem. Through this partnership, ASIC Design Services will provide its Core Deep Learning (CDL) technology that accelerates Convolutional Neural Networks (CNNs) on power-constrained embedded hardware platforms.

ASIC Design Services’ CDL technology optimizes its CNN accelerator FPGA core for performance, logic resources, and low power – making CDL suitable for IoT edge and node applications. The CDL Coldbrew software stack performs quantization and compression of CNNs, design space exploration, and generates a solution optimized for performance, resources, and low power. Coldbrew is built on the Caffe deep learning framework, and provides a simple user interface to bridge the gap between high-level CNN specification and FPGA design.

“We are excited about the increased performance and energy efficiency offered by FPGAs,” said Tony Dal Maso, CEO of ASIC Design Services. “Today, we can achieve 100 Gops/s/Watt on a low-power FPGA solution. By partnering with SiFive we enable the global community of embedded designers to accelerate deep learning solutions on embedded platforms.”

The availability of ASIC Design Services’ CDL IP through the DesignShare program shortens the time to market and removes common barriers to entry that have traditionally prevented smaller companies from developing custom silicon. Companies like SiFive, ASIC Design Services and other DesignShare partners provide low- or no-cost IP to emerging companies, minimizing the upfront engineering costs needed to bring a custom chip from design to realization.

“Adding artificial intelligence and neural networks to edge devices is increasingly in demand,” said Shafy Eltoukhy, vice president of operations and head of DesignShare for SiFive. “With ASIC Design Services addition to the DesignShare ecosystem, we continue to expand the range of IP available to designers looking to bring prototype devices to life.”

Since DesignShare launched in 2017, the program has grown to include a wide range of IP solutions, from complete ASIC solutions and trace technology to embedded memory and precision PLL. For more information on DesignShare and to see the complete list of available technologies, visit www.sifive.com/designshare.

TowerJazz, the global specialty foundry, today announced its participation at the 44th European Conference on Optical Communication (ECOC) being held in Rome, Italy on September 23-27, 2018. The Company will showcase its advanced SiGe (Silicon Germanium) process, with speeds in excess of 300GHz, and its newest production SiPho (Silicon Photonics) process built into data center high-speed optical data links.

TowerJazz has a significant foundry share of the 100Gb/s transceiver market served by its SiGe Terabit Platform and will showcase even higher SiGe transistor speeds and patented features appropriate for 200 and 400Gb/s communication ICs such as  transimpedance amplifiers (TIAs), laser and modulator drivers, and clock and data recovery circuits.

TowerJazz’s SiPho production platform enables high bandwidth photo diodes, together with waveguides and modulators, with a roadmap to allow InP components on the same die and permit a high-level of optical integration for next-generation data center optical links.  An open design kit is available to all customers and supported by prototyping and shuttle runs.

To set up a meeting or see a demo with TowerJazz technical experts at the TowerJazz ECOC booth (#569), or for more information, please click here or inquire at: [email protected].

Soitec (Euronext Paris), a designer and manufacturer of semiconductor materials, and MBDA, announce the joint acquisition of Dolphin Integration.

Dolphin Integration is an industry recognized provider of semiconductor design, silicon IP and SoC (System-On-Chip) solutions for low power applications. Headquartered in Grenoble, Dolphin Integration was founded in 1985. It currently employs 155 people, including 130 design engineers. For the fiscal year ended March 31th, 2018, the company generated revenues of 17 million Euros.

The joint venture formed by Soitec and MBDA acquires Dolphin Integration, including all employees. The resulting ownership of the joint venture is as follows: Soitec at 60% and MBDA at 40%.

The transaction was authorized today by the Commercial Court of Grenoble. It comes as a prompt and positive outcome of Dolphin Integration insolvency proceedings. The company went into receivership on July 24, 2018.

Soitec and MBDA each provide complementary strategic support to Dolphin Integration.

Soitec brings its engineered substrates expertise and unique low-power design methodology (body biasing) to accelerate Dolphin Integration design activities in low-power electronic devices, where a growing number of critical chips are built on FD-SOI technology. In addition, Soitec will strengthen Dolphin Integration’s position within the entire semiconductor ecosystem, to develop and promote products and services in several strategic markets, including mobile devices and infrastructure, data centers, and space and industrial applications.

MBDA, a strategic customer of Dolphin Integration for defense applications since 2004, strengthens its existing industrial collaboration and long-term commercial pipeline for ASIC (Application Specific Integrated Circuit) and SoC (System on Chip) products. With the support of MBDA, Dolphin Integration will be able to advance its positions in aerospace and defense design.

Soitec and MBDA confident in Dolphin Integration profitable growth.

Soitec and MBDA together committed to a financial investment of around 6 million Euros including the acquisition of most of Dolphin Integration’s assets, the payment of certain liabilities and a significant cash injection to finance Dolphin Integration’s working capital requirements.

Soitec and MBDA are confident in their ability to turnaround the financial position of Dolphin Integration. Dolphin Integration is expected to be fully consolidated into Soitec’s financial statements as of September 2018.

“Dolphin Integration represents a strategic opportunity for Soitec to reinforce a full IP and service offering related to energy efficient solutions for chip design on FD-SOI. This is a major differentiating factor for FD-SOI and a key accelerator of FD-SOI adoption in major market segments,” highlighted Paul Boudre, CEO of Soitec.

“MBDA investment will strengthen the French defense industrial base since it will provide Dolphin Integration with a more stable flow of defense related revenues and a closer technological collaboration that will allow it to enhance the access of its specialized microelectronics offering to the entire French and European defense industry,” said Antoine Bouvier, CEO of MBDA.

In the last few years, biggies in the Vacuum Pump Market have set different business goals to attain a dominant market position. Their approach toward improving their current stance has been remarkably influencing the quality and design performance of vacuum pumps, which has positively impacted the shelf life and cost-effectiveness of the products. The optimized approach of players toward new product developments and business expansions is certainly poised to push vacuum pump market size. Some of the recent instances witnessed across vacuum pump market that are likely to etch a positive growth path for this industry are described below.

How Leybold, Atlas Copco, and Edwards combinedly contributed toward vacuum pump market expansion

Of late, it has been observed that reliability and cleanliness are becoming highly important in most of the production processes. Having recognized that efficient vacuum technology development could fulfill these industrial requirements, a few days before, Leybold, a subsidiary of the Atlas Copco Group, unveiled an oil-free vacuum pump with two variants of speed, which are designed to be useful in dusty and moist processes. Through in-depth R&D, the product manufacturers have successfully reduced the operating noise and maintenance cost associated with the Oil-Free VARODRY Vacuum Pump. In addition, the compact design helps users to integrate this product into existing systems very easily.

Speaking more about this product launch, the speed variants have made it ideal for industrial vacuum requirement with low investment and operating costs. This innovative product prevents oil leaks and particle emissions in a vacuum chamber, which will turn out to be a tremendous help to speed up industrial processes. It is thus rather overt, that with the launch of this maintenance-free and robust pump, Leybold has set a new benchmark ahead for the giants in vacuum pump market.

Prior to this launch, the parent company of Leybold, Atlas Copco unveiled its new product – a multiple dry claw vacuum pump system which is ideally suited for the industries operating in dry and hot working environments. This newly developed vacuum pump aims to provide high energy efficiency and better operational performance. The future deployment of this product for performing numerous dry pumping applications comprising pneumatic pumping, packaging lines, and drying processes is certain to fuel vacuum pump market trends over the years ahead.

With the development of a next-generation oil sealed rotary vane vacuum pump, the UK headquartered vacuum engineering company, Edwards had aimed to expand its customer base. This subsidiary of Atlas Copco designed a safe, stable, and compact size vacuum pump which could be suitable for applications in explosive environments especially in chemical processing industries. While developing this variant of vacuum pump, the designers of Edwards focused on customary requirements mainly across the U.S. and European belts. Post the launch, analysts deem that this approach could help Edwards considerably extend its customer base across North America and Europe. In addition, the deployment of these new products across the chemical, automotive, degassing, and pharmaceutical sectors has helped giants in vacuum pump market to extend their application scope across most of the industries.

It is rather overt that with the launch of a novel pumping system portfolio, core companies are looking forward to achieving competitive benefits ahead. The increasing need of highly efficient and environment-friendly pumping systems is considerably encouraging giants in vacuum pump market to carry out intensive research programs as well. The recent R&D outcomes such as improved lifecycle and cost-effectiveness will prove to be game-changing for the biggies in vacuum pump market, which is predicted to generate a revenue of over USD 6.5 billion by the end of 2025.

  • Key Industry participants for Vacuum Pump Market are –
  • Atlas Copco
  • Pfeiffer Vacuum Technology AG
  • Gardner Denver
  • Agilent Technologies Inc.
  • ULVAC Inc.
  • Ebara Corporation
  • Leybold GmbH
  • Busch Vacuum Pumps and Systems
  • Shimadzu Corporation
  • Kashiyama Industries Ltd.
  • KNF Neuberger GmbH
  • Gast Manufacturing Inc.
  • Becker GmbH
  • DEKKER Vacuum Technologies, Inc.
  • PPI Pumps Pvt. Ltd.

Powered by a widespread application scope and ongoing technological advancements, vacuum pump market trends have undergone a tremendous transformation since the last few years. The extensive involvement of industry players in research and development activities has been paving the way for remarkable breakthroughs in futuristic vacuum technology requirements. Having recognized the significance of frequent product launches, vacuum pump market contenders have been focusing lately on the development of customized solutions to strengthen their customer base.

Speaking of advancements in vacuum technology, the end-users across myriad sectors ranging from solar manufacturing to scientific instrumentation and flat panel display to semiconductors have been going the whole hog to tap the benefits of modern vacuum mechanisms. The subsequent deployment of modern vacuum pumps for pumping services across numerous industrial applications is thus poised to boost vacuum pump market share.

Browse key industry insights report, “Vacuum Pump Market Size By Lubrication (Dry, Wet), By Technology (Gas Capture/Binding Pumps, Gas Transfer Pumps [Positive Displacement Pumps, Kinetic Pumps]), By Product (Low Vacuum, Medium Vacuum, High Vacuum), By End-user (Chemical & Pharmaceutical, Semiconductor & Electronics, Oil & Gas, Food & Beverages, Wood, Paper & Pulp), Industry Analysis Report, Regional Outlook (U.S., Canada, Germany, UK, France, Spain, Italy, Russia, China, India, Japan, Australia, Indonesia, Malaysia, South Korea, Brazil, Mexico, South Africa, Saudi Arabia, UAE, Kuwait), Application Growth Potential, Price Trends, Competitive Market Share & Forecast, 2018 – 2025”

https://www.gminsights.com/industry-analysis/vacuum-pump-market

SiFive, a provider of commercial RISC-V processor IP, today announced the first open-source RISC-V-based SoC platform for edge inference applications based on NVIDIA’s Deep Learning Accelerator (NVDLA) technology.

The demo will be shown this week at the Hot Chips conference and consists of NVDLA running on an FPGA connected via ChipLink to SiFive’s HiFive Unleashed board powered by the Freedom U540, the world’s first Linux-capable RISC-V processor. The complete SiFive implementation is well suited for intelligence at the edge, where high-performance with improved power and area profiles are crucial. SiFive’s silicon design capabilities and innovative business model enables a simplified path to building custom silicon on the RISC-V architecture with NVDLA.

NVIDIA open-sourced its leading deep learning accelerator over a year ago to spark the creation of more AI silicon solutions. Open-source architectures such as NVDLA and RISC-V are essential building blocks of innovation for Big Data and AI solutions.

“It is great to see open-source collaborations, where leading technologies such as NVDLA can make the way for more custom silicon to enhance the applications that require inference engines and accelerators,” said Yunsup Lee, co-founder and CTO, SiFive. “This is exactly how companies can extend the reach of their platforms.”

“NVIDIA open sourced its NVDLA architecture to drive the adoption of AI,” said Deepu Talla, vice president and general manager of Autonomous Machines at NVIDIA. “Our collaboration with SiFive enables customized AI silicon solutions for emerging applications and markets where the combination of RISC-V and NVDLA will be very attractive.”