Category Archives: Semiconductors

Broadcom Inc. (NASDAQ: AVGO), a semiconductor device supplier to the wired, wireless, enterprise storage, and industrial end markets, and CA Technologies (NASDAQ: CA), one of the world’s leading providers of information technology (IT) management software and solutions, today announced that the companies have entered into a definitive agreement under which Broadcom has agreed to acquire CA to build one of the world’s leading infrastructure technology companies.

Under the terms of the agreement, which has been approved by the boards of directors of both companies, CA’s shareholders will receive $44.50 per share in cash. This represents a premium of approximately 20% to the closing price of CA common stock on July 11, 2018, the last trading day prior to the transaction announcement, and a premium of approximately 23% to CA’s volume-weighted average price (“VWAP”) for the last 30 trading days. The all-cash transaction represents an equity value of approximately $18.9 billion, and an enterprise value of approximately $18.4 billion.

Hock Tan, President and Chief Executive Officer of Broadcom, said, “This transaction represents an important building block as we create one of the world’s leading infrastructure technology companies. With its sizeable installed base of customers, CA is uniquely positioned across the growing and fragmented infrastructure software market, and its mainframe and enterprise software franchises will add to our portfolio of mission critical technology businesses. We intend to continue to strengthen these franchises to meet the growing demand for infrastructure software solutions.”

“We are excited to have reached this definitive agreement with Broadcom,” said Mike Gregoire, CA Technologies Chief Executive Officer. “This combination aligns our expertise in software with Broadcom’s leadership in the semiconductor industry. The benefits of this agreement extend to our shareholders who will receive a significant and immediate premium for their shares, as well as our employees who will join an organization that shares our values of innovation, collaboration and engineering excellence. We look forward to completing the transaction and ensuring a smooth transition.”

The transaction is expected to drive Broadcom’s long-term Adjusted EBITDA margins above 55% and be immediately accretive to Broadcom’s non-GAAP EPS. On a combined basis, Broadcom expects to have last twelve months non-GAAP revenues of approximately $23.9 billion and last twelve months non-GAAP Adjusted EBITDA of approximately $11.6 billion.

As a global leader in mainframe and enterprise software, CA’s solutions help organizations of all sizes develop, manage, and secure complex IT environments that increase productivity and enhance competitiveness. CA leverages its learnings and development expertise across its Mainframe and Enterprise Solutions businesses, resulting in cross enterprise, multi-platform support for customers. The majority of CA’s largest customers transact with CA across both its Mainframe and Enterprise Solutions portfolios. CA benefits from predictable and recurring revenues with the average duration of bookings exceeding three years. CA operates across 40 countries and currently holds more than 1,500 patents worldwide, with more than 950 patents pending.

Electrical circuits are constantly being scaled down and extended with specific functions. A new method now allows electrical contact to be established with simple molecules on a conventional silicon chip. The technique promises to bring advances in sensor technology and medicine, as reported in the journal Nature by chemists from the University of Basel and researchers from IBM Research – Zurich in Rüschlikon.

To further develop semiconductor technology, the field of molecular electronics is seeking to manufacture circuit components from individual molecules instead of silicon. Because of their unique electronic properties, molecules are suited to applications that cannot be implemented using conventional silicon technology. However, this requires reliable and inexpensive methods for creating electrical contacts at the two ends of a molecule.

The ability to produce thousands of elements

Researchers from the University of Basel and IBM Research – Zurich have now developed a technique that allows electrical contact to individual molecules to be established. Thousands of stable metal-molecule-metal components can be produced simultaneously by depositing a film of nanoparticles onto the molecules, without compromising the properties of the molecules. This approach was demonstrated using alkane-dithiol compounds, which are made up of carbon, hydrogen, and sulfur.

Tiny pores were filled with molecules and brought into electrical contact via a platinum electrode from below and a gold nanoparticle electrode from above. Credit: IBM Research – Zurich

The researchers used a type of sandwich construction in which an interlayer of molecules is brought into contact with metallic electrodes from above and below. The lower electrode consists of a layer of platinum, which is coated with a layer of non-conducting material. Tiny pores are then etched into this layer to produce arbitrary patterns of compartments of different sizes, inside which there is an electrical contact with the platinum electrode.

Self-assembled monolayers

The researchers then took advantage of the ability of certain molecules to self-assemble. Onto the pattern of pores, they applied a solution containing alkane-dithiol molecules, which self-assemble into the pores, forminga densely packed monolayer film. Within this film, the individual molecules exhibit a regular arrangement and an electrical connection with the lower platinum electrode. Electrical contact with the molecular layer is established via an upper electrode made of gold nanoparticles.

The new technique largely resolves the issues that previously hampered the creation of electrical contacts to molecules – such as high contact resistance or short circuits by filaments penetrating the film. Building blocks fabricated by this method can be operated under standard conditions and provide long-term stability. Moreover, the method can be applied to a variety of other molecular systems and opens up new avenues for integrating molecular compounds into solid-state devices. Its applications could include new types of instruments in the fields of sensor technology and medicine.

“Our approach will help speed up the development of chemically fabricated and controllable electronic and sensor components,” says Professor Marcel Mayor of the Department of Chemistry at the University of Basel. The project received significant funding from the National Center of Competence in Research (NCCR) for Molecular Systems Engineering, in which the University of Basel and ETH Zurich are leading houses.

Gases and engineering company The Linde Group (Booth #5644 in the North hall) is investing in expansion of existing products to improve business continuity planning while adding new products with improved purity to meet the growing needs of sub-10nm semiconductor factories and advanced flat panel manufacturers. Linde remains the global leader in rare gas and laser mixture production technology.

Linde has expanded capacity for fluorine/nitrogen mixtures at Medford, Oregon for etching and chamber cleaning applications.

  • This allows both low- and high-pressure fluorine and nitrogen mixture production.
  • On-site high-purity fluorine production minimizes third-party supply issues.
  • The product line is expanding to include fluorine/argon mixtures in place with tri-mix capability(fluorine/argon/nitrogen) later in 2018.
  • This facility complements fluorine mixture production at the Linde Alpha, New Jersey facility.

Linde is also developing deposition precursors and etch gases: silicon precursors, digermanium mixtures, high K and metal gate precursors, isotope gases and etch gases such as CF3I (trifluoroiodomethane)and custom fluorinated silane.

“Linde’s story this year is continued investment for customers,” said Paul Stockman, Linde Electronics’ Head of Market Development. “What we’re doing in the US mirrors what we’re doing globally, which is investing in new materials and new production capabilities and locating them close to where our customers are. We have uniform processes and multiple sites of production, and looking to optimize supply chains for our customers.”

“Linde recognizes that our customers continue to make investments in new processes and technologies.  We are committed to investing with them for the materials they will require now and in the future”, states Matt Adams, Head of Sales and Marketing for Linde Electronics and Specialty Products.

By Ed Korczynski

To fulfill the promise of the Internet of Things (IoT), the world needs low-cost high-bandwidth radio-frequency (RF) chips for 5th-generation (5G) internet technology. Despite standards not being completely defined yet it is clear that 5G hardware will have to be more complex than 4G kit, because it will have to provide a total solution that is ultra-reliable with at least 10 Gb/second bandwidth. A significant challenge remains in developing new high-speed transistor technologies for RF communications with low power to allow IoT “edge” devices to operate reliably off of batteries.

At the most recent Imec Technology Forum in Antwerp, Belgium, Nadine Collaert, Distinguished MTS of imec, discussed recent research results from the consortium’s High-Speed Analog and RF Program. In addition to working on core transistor fabrication technology R&D, imec has also been working on system-technology co-integration (STCO) and design-technology co-integration (DTCO) for RF applications.

Comparing the system specifications needed for mobile handsets to those for base-stations, transmitter power consumption should be 10x lower, while the receiver power consumption needs to be 2x lower. Today using silicon CMOS transistors, four power amplifiers alone consume 65% of a transmitter chip’s power. Heterogeneous Bipolar Transistors (HBT) and High Electron Mobility Transistors (HEMT) built using compound semiconductors such as gallium-arsenide (GaAs), gallium-nitride (GaN), or indium-phosphide (InP) provide excellent RF device results. However, compared to making CMOS chips on silicon, HBT and HEMT manufacturing on compound semiconductor substrates is inherently expensive and difficult.

Heterogeneous Bipolar Transistors (HBT) and High Electron Mobility Transistors (HEMT) both rely upon the precise epitaxial growth of semiconductor layers, and such growth is easier when the underlying substrate material has similar atomic arrangement. While it is much more difficult to grow epi-layers of compound semiconductors on silicon wafers, imec does R&D using 300-mm diameter silicon substrates with a goal of maintaining device quality while lowering production costs. The Figure shows cross-sections of the two “tracks” of III-V and GaN transistor materials being explored by imec for future RF chips.

III-V on Silicon and GaN-on-Silicon RF device cross-sections, showing work on both Heterogeneous Bipolar Transistors (HBT) and High Electron Mobility Transistors (HEMT) for 5G applications. (Source: imec)

Imec’s High-Speed Analog/RF Program objectives include the following:

  • High-speed III-V RF devices using low-cost, high-volume silicon-compatible processes and modules,
  • Co-optimization with advance silicon CMOS to reduce form factor and enable power-efficient systems with higher performance, and
  • Technology-circuit design co-optimization to enable complex RF-FEM modules with heterogeneous integration.

5G technology deployment will start with speeds below 6GHz,  because technologies in that range have already been proven and the costs are known. However, after five years the frequency will change to the “mm-wave” range with the first wavelength band at ~28GHz. GaN material with a wide bandgap and high charge-density has been a base-station technology, and it could be an ideal material for low-power mm-wave RF devices for future handsets.

This R&D leverages the III-V on silicon capability that has been developed by imec for CMOS:Photonic integration. RF transistors could be stacked over CMOS transistors using either wafer- or die-stacking, or both could be monolithically co-integrated on one silicon chip. Work on monolithic integration of GaN-on-Silicon is happening now, and could also be used for photonics where faster transistors can improve the performance of optical links.

The Mid-Year Update to the 2018 McClean Report revises IC Insights’ worldwide economic and IC industry forecasts through 2022 that were originally presented in The 2018 McClean Report issued in January.

The Figure shows that IC Insights forecasts that China-headquartered companies will spend $11.0 billion in semiconductor industry capex in 2018, which would represent 10.6% of the expected worldwide outlays of $103.5 billion.  Not only would this amount be 5x what the Chinese companies spent only three years earlier in 2015, but it would also exceed the combined semiconductor industry capital spending of Japan- and Europe-headquartered companies this year.

Since adopting the fab-lite business model, the three major European producers have represented a very small share of total semiconductor industry capital expenditures and are forecast to account for only 4% of global spending in 2018 after representing 8% of worldwide capex in 2005.  Although there may be an occasional spike in capital spending from European companies (e.g., the surge in spending from ST and AMS in 2017), IC Insights believes that Europe-headquartered companies will represent only 3% of worldwide semiconductor capital expenditures in 2022.

It should be noted that several Japanese semiconductor companies have also transitioned to a fab-lite business model (e.g., Renesas, Sony, etc.).  With strong competition reducing the number and strength of Japanese semiconductor manufacturers, the loss of its vertically integrated businesses and thus missing out on supplying devices for several high-volume end-use applications, and its collective shift toward fab-lite business models, Japanese companies have greatly reduced their investment in new wafer fabs and equipment. In fact, Japanese companies are forecast to represent only 6% of total semiconductor industry capital expenditures in 2018, a big decline from the 22% share they held in 2005 and an even more precipitous drop from the 51% share they held in 1990.

Although China-headquartered pure-play foundry SMIC has been part of the list of major semiconductor industry capital spenders for quite some time, there are four additional Chinese companies that are forecast to become significant semiconductor industry spenders this year and next—memory suppliers XMC/YMTC, Innotron, JHICC, and pure-play foundry Shanghai Huali.  Each of these companies is expected to spend a considerable amount of money equipping and ramping up their new fabs in 2018 and 2019.

Due to the increased spending by startup China-based memory manufacturers, IC Insights believes that the Asia-Pac/Others share of semiconductor industry capital spending will remain over 60% for at least the next couple of years.

By Pete Singer

Nitrous oxide (N2O) has a variety of uses in the semiconductor manufacturing industry. It is the oxygen source for chemical vapor deposition of silicon oxy-nitride (doped or undoped) or silicon dioxide, where it is used in conjunction with deposition gases such as silane. It’s also used in diffusion (oxidation, nitridation, etc.), rapid thermal processing (RTP) and for chamber seasoning.

Why these uses – and more importantly what happens to the gas afterward — may soon becoming under more scrutiny because it is being included for the first time in the IPPC (Intergovernmental Panel on Climate Change) GHG (Greenhouse Gas) guidelines. The IPCC has refined guidelines released in 2006 and expect to have a new revision in 2019. “Refined guidelines are actually up and coming and the inclusion of nitrous oxide in them is a major revision from the 2006 document,” said Mike Czerniak, Environmental Solutions Business development Manager, Edwards. Czerniak is on the IPPC committee and lead author of the semiconductor section.

Although the semiconductor industry uses a very small amount of N2O compared to other applications (dentistry, whip cream, drag racing, scuba diving), it is a concern because after CO2and CH4, N2O is the 3rd most prevalent man-induced GHG, accounting for 7% of emissions. According to the U.S. Environmental Protection Agency, 5% of U.S. N2O originates from industrial manufacturing, including semiconductor manufacturing.

Czerniak said the semiconductor industry been very proactive about trying to offset and reduce its carbon dioxide footprint. “The aspiration set by the world’s semiconductor council to reduce the carbon footprint of a chip to 30 percent of what it was in 2010, which itself was a massive reduction of what it used to be back in the last millennium,” he said. Unfortunately, although that trend had been going down for the first half of the decade, it started going up again in 2016. “although each individual processing step has a much lower carbon footprint than it used to have, the number of processing steps is much higher than they used to be,” Czerniak explain. “In the 1990s, it might take 300-400 processing steps to make a chip. Nowadays you’re looking at 2,000-4,000 steps.”

There are two ways of abating N20 so that it does not pollute the atmosphere: reduce it or oxidize it.  Oxidizing it – which creates NO2and NO (and other oxides know as NOx) — is not the way to go, according to Czerniak. “These oxides have their own problems. NOx is a gas that most countries are trying to reduce emissions of. It’s usually found as a byproduct of fuel combustion, particularly in things like automobiles and it adds to things like acid rain,” he said.

Edwards’ view is that it’s much better to minimize the formation of the NOx in the first place. “The good news is that it is possible inside a combustion abatement system where the gas comes in at the top, we burn a fuel gas and air on a combustor pad and basically the main reactant gas then is water vapor, which we use to remove the fluorine effluent, which is the one we normally try to get rid of from chamber cleans,” Czerniak said.

The tricky part is that information from the tool is required. “We can — when there is nitrous oxide present on a signal from the processing tool — add additional methane fuel into the incoming gas specifically to act as a reducing agent to reduce the nitrous oxide to nitrogen and water vapor,” he explained. “We inject it at just the right flow rate to effectively get rid of the nitrous oxide without forming the undesirable NOx byproducts.”

Figure 1 showshowcareful control of combustion conditions make them reduce rather than oxidizing during the N2O step by the addition of CH4. 30 slm N2O represents two typical process chambers.

“It’s not complicated technology,” Czerniak concluded. “You just have to do it right.”

HEIDENHAIN announced the appointment of David Doyle as CEO of HEIDENHAIN CORPORATION, effective Oct. 1, 2018.  At that time, Doyle will assume full responsibility for the HEIDENHAIN CORPORATION customer-focused operations for the U.S., Canada and Mexico. This change will complete the succession plan for Rick Korte, current CEO of HEIDENHAIN CORPORATION who will be retiring at that time after more than 34 years of service.

“I am happy to announce the next phase of the succession plan for our North American operations, with the promotion of David Doyle to CEO,” said Korte. “I have the utmost confidence in David and trust he will continue to grow our business and support our customers with World Class service in all areas.”

Doyle started with HEIDENHAIN CORPORATION in 2016 as Vice President of Sales & Marketing, bringing with him more than twenty-five years of experience in international capital equipment business and technical support management.  He currently serves as its President and Managing Director.

“I want to thank Rick Korte for leading HEIDENHAIN CORPORATION in tremendous growth over these many years, and for the guidance he has provided to not only myself, but to the many staff members who have called HEIDENHAIN home for so long,” said Doyle.  “I am looking forward to leading the HEIDENHAIN CORPORATION team through the next phase of development and to reaching our growth objectives in North America by continuing to put our Customers First.”

DR. JOHANNES HEIDENHAIN GmbH, headquartered in Traunreut, Germany, develops and supports motion control feedback solutions for the machine tool, semiconductor, electronics assembly and test, metrology, automation, medical, energy, biotechnology and other global markets. HEIDENHAIN employs approximately 6,000 people worldwide in its core business activities.

Leti, a research institute of CEA Tech, and Soitec, a designer and manufacturer of innovative semiconductor materials, today announced a new collaboration and five-year partnership agreement to drive the R&D of advanced engineered substrates, including SOI and beyond. This agreement brings the traditional Leti-Soitec partnership to a whole new dimension and includes the launch of a world-class prototyping hub associating equipment partners to pioneer with new materials, The Substrate Innovation Center will feature access to shared Leti-Soitec expertise around a focused pilot line. Key benefits for partners include access to early exploratory sampling and prototyping, collaborative analysis, and early learning at the substrate level, eventually leading to streamlined product viability and roadmap planning at the system level.

Leading chip makers and foundries worldwide use Soitec products to manufacture chips for consumer applications targeting performance, connectivity, and efficiency with extremely low energy consumption. Applications include smart phones, data centers, automotive, imagers, and medical and industrial equipment, but this list is always growing, along with the need for flexibility to explore new applications starting at the substrate level. At the Substrate Innovation Center, located on Leti’s campus, Leti and Soitec engineers will explore and develop innovative substrate features, expanding to new fields and applications with a special focus on 4G/5G connectivity, artificial intelligence, sensors and display, automotive, photonics, and edge computing.

“Material innovation and substrate engineering make entire new horizons possible. The Substrate Innovation Center will unleash the power of substrate R&D collaboration beyond the typical product road maps, beyond the typical constraints,” said Paul Boudre, Soitec CEO. “The Substrate Innovation Center is a one-of-a-kind opportunity open to all industry partners within the semiconductor value chain.”

Whereas a typical manufacturing facility has limited flexibility to try new solutions and cannot afford to take risks with prototyping, the mission of the Substrate Innovation Center is to become the world’s preferred hub for evaluating and designing engineered substrate solutions to address the future needs of the industry, inclusive of all the key players, from compound suppliers to product designers. Using state of the art, quality-controlled clean room facilities, and the latest industry-grade equipment and materials, Leti and Soitec engineers will conduct testing and evaluation at all levels of advanced substrate R&D.

“Leti and Soitec’s collaboration on SOI and differentiated materials, which extends back to Soitec’s launch in 1992, has produced innovative technologies that are vital to a wide range of consumer and industrial products and components,” said Emmanuel Sabonnadière, Leti CEO. “This new common hub at Leti’s campus marks the next step in this ongoing partnership. By jointly working with foundries, fabless, and system companies, we provide our partners with a strong edge for their future products.”

IC Insights will release its 200+ page Mid-Year Update to the 2018 McClean Report later this month. The Mid-Year Update revises IC Insights’ worldwide economic and IC industry forecasts through 2022 that were originally published in The 2018 McClean Report issued in January of this year.

Figure 1 compares the estimated required capex needed to increase NAND flash bit volume shipments 40% per year, sourced from a chart from Micron’s 2018 Analyst and Investor Event in May of this year, versus the annual capex targeting the NAND flash market segment using IC Insights’ data. As shown, Micron believes that the industry capex needed to increase NAND flash bit volume production by 40% more than doubled from $9 billion in 2015 to $22 billion only two years later in 2017! This tremendous surge in required capital was driven by the move to 3D NAND from planar NAND since 3D NAND requires much more fab equipment and additional cleanroom space to process the additional layers of the device as compared to planar NAND.

Most of the five major NAND flash suppliers have stated that they believe that NAND bit volume demand growth will average about 40% per year over the next few years. Figure 1 shows that the capex needed to support a 40% increase in NAND bit volume shipments was exceeded by 27% last year and is forecast to exceed the amount needed by another 41% this year (NAND bit volume shipments increased 41% in 2017 but 1H18/1H17 bit volume shipments were up only 30%). As a result, it is no surprise that NAND flash prices have already softened in early 2018. Moreover, the pace of the softening is expected to pick up in the second half of this year and continue into 2019.

Historical precedent in the memory market shows that too much spending usually leads to overcapacity and subsequent pricing weakness. With Samsung, SK Hynix, Micron, Intel, Toshiba/Western Digital/SanDisk, and XMC/Yangtze River Storage Technology all planning to significantly ramp up 3D NAND flash capacity over the next couple of years (with additional new Chinese producers possibly entering the market), IC Insights believes that the risk for significantly overshooting 3D NAND flash market demand is very high and growing.

Figure 1

By Pete Singer

The importance of data gathered and analysed in the subfab – the place where vacuum pumps, abatements systems and other supporting equipment operates – is growing. Increasingly, manufacturers are finding that these systems have a direct impact on yield, safety, cost-of-ownership and ultimately capacity and cycle time.

“The subfab is getting recognized evermore as a contributor to the overall fab effectiveness, particularly when the fab is looking to get last fractions of a percentage of performance efficiencies,” notes Alan Ifould, Global Market Sector Manager at Edwards.

There’s also keen interest in tying this data with process data from the fab, the MES (manufacturing execution software) system and ultimately the ERP (enterprise resource planning) system as part of today’s efforts to understand and control the entire data ecosystem.

Subfab data systems provide a volume of data related not only to vacuum and abatement equipment, but also upstream, to the foreline, gate valve and chamber. Of special interest is the monitoring of vacuum faults, which can negatively impact quality, cost and safety. “A vacuum fault is anything that results in a loss of a degradation in vacuum,” said Ifould.

Ideally, faults – and the overall quality of the vacuum system — are proactively managed. Potential faults are detected days or even weeks before they occur and addressed during regularly scheduled tool maintenance, for example. “We’re finding that our ability to detect vacuum faults in the wider vacuum system comes very much to the fore,” Ifould said.

Data seen at the pump or abatement can help determine the size and location of vacuum system leaks. Algorithms based around vacuum science and thermodynamics can lead engineers to problematic leaks that, over time, can have a significant impact on yield.

Often, the first reaction to a loss in chamber pressure is to blame the vaccum pump, Ifould said. Vacuum pumps can be swapped out in about 4 hours, but if the process tool goes down while in operation, it could be in excess of 48 hours to get everything back up and running. Even then, it might be something other than the pump that caused the initial problem, such as a leak in a gate valve or in the foreline. It’s essential to accurately diagnose the problem(s) at the onset, but that can be a challenge: “You only need a small leak in a gate valve, and you immediately have problems with maintaining the base pressure in the chamber. The pump may become overloaded because of the additional gas load caused by leaks,” he said.

Edwards has developed a verity of new data collection and analysis strategies aimed at improving such decision making. The SMA (Site Management Application) is latest addition to data analytics portfolio, focused on subfab. As shown in Figure, SMA is designed to provide insight into maintenance activities, equipment performance and fault resolution. It is implemented in parallel with the company’s VTPS (Vacuum Technique Production System), which drives standard work and behaviors based on LEAN principles and best known methods.

Edwards is also working on what it calls “sensorization” where, for example, the use of vibration analytics can detect anomalies otherwise missed by traditional monitoring techniques.

Ifould said the SMA and sensorization helps improve the stability of fab operations by bringing veracity to the data. “It’s one thing to have a volume of data, but the data itself is of little value unless it’s of good quality,” he said. “When we’re looking at equipment operations and the way you have operators involved, being able to bring discipline to the behaviors of those operators to the task that they perform brings discipline to the data and improves the veracity of the data,” he said.

He said Edwards has been using this approach to “great effect” over the last year. “We can help our customers see where some of their maintenance practices need to be improved to eliminate some of the sources of error that cause some of those vacuum faults,” he said.

More recently, Edwards is looking to move beyond a simple predictive maintenance model (PdM) to a model that include quality (PdMQ). The model includesnot only the condition of the subfab equipment, but of the quality of the vacuum it provides, and therefore the process it supports. “We’re not just considering the condition of the subfab equipment and being able to predict when that may fail, but considering the quality of the vacuum that system actually provides.”

Harnessing data from all parts of the fab ecosystem is essential, Ifould notes, but has its challenges, especially when it comes to IP. “In an ideal world, we would like to receive contextualized data which allows us to relate what’s happening in the vacuum pump into the process itself. That becomes challenging because of the IP sensitivity,” he said.

Site Management Application, the latest addition to Edwards’ data analytics portfolio, is designed to provide insight into maintenance activities, equipment performance and fault resolution.