Category Archives: Semiconductors

FormFactor, Inc. (NASDAQ:FORM), a electrical test and measurement supplier to the semiconductor industry, has extended its Contact Intelligence technology. With Contact Intelligence, FormFactor’s advanced probe systems automatically and autonomously adapt in real time to changes in the testing environment, enabling customers to collect large amounts of RF data faster. As the race to bring 5G devices to market heats up, this addresses the need for higher productivity, to reduce time to market.

FormFactor’s Contact Intelligence technology combines smart hardware design and innovative software algorithms to provide accurate probe-to-pad alignment and electronic recalibrations in engineering labs and many production applications. With the introduction of its new RF solution, FormFactor now has specialized Contact Intelligence applications for RF, DC and Silicon Photonics (SiPh) testing.

FormFactor is best known for it’s probe card business, but with its acquisition of Cascade Microtech in 2016, it became more involved in the design and characterization side of chip-making, including RF and silicon photonic devices (probe cards are primarily used at the end of wafer manufacturing, testing the devices before they are packaged).

Mike Slessor, CEO of FormFactor, said with upcoming infrastructure changes — such as 5G, more mobile communications and IoT — RF is an important place to be. “The Cascade Microtech acquisition gave us an engineering systems business. These are pieces of customized capital equipment that help people very early on in their development and R&D — even early pathfinding — to figure out how their next device is going to perform, to characterize it and to improve its yield,” he said. That systems business grew saw a double digit growth rate last year.

Slessor said the new Contact Intelligence technology is designed to help customers in the systems business get a lot of data faster. He said the push to improve yield, along with new materials and new devices, is driving a tremendous amount of data collection. “What Contact Intelligence really is positioned to do is to help people easily and efficiently collect that data. You can think of it as bringing almost production automation to the engineering lab. We’re helping people do it autonomously over wide ranges of temperatures,” he said. He said it enables engineering tools to be upgraded. Customers can “set it up, push a button and walk away for 48 hours, 96 hours even more and come back and have a hundreds of thousands of individual characterization data points.”

New high frequency ICs, such as 5G (with multiple high frequency bands from sub-6 to more than 70 GHz) and automotive communication devices, need the highest quality process design kits (PDK’s) to ensure working devices at first iteration.

Traditional systems and methods require engineers to invest significant time for recalibration when the system invariably drifts, or to reposition probes with intentional changes in test temperatures. At higher frequencies, calibrations and measurements are more sensitive to probe placement errors and there is more calibration drift, so recalibration is required more often.Over time and temperature, Contact Intelligence automatically makes these adjustments with no operator intervention, resulting in more devices tested in less time, for more accurate PDK’s and faster time to market.

Slessor says the push to 5G brings many design and test challenges due to the significant increase in carrier frequencies – 10 times higher than 4G. “Although there are different bands and the carriers and the countries are still ironing out where they’re going to operate, there are bands as high as 72 gigahertz,” Slessor said. “Electrical signal propagation gets much, much more challenging as you go up in frequency. All kinds of new engineering and physics challenges emerge because you’ve got things that are radiating a good deal of power and there’s a whole bunch of cross talk on the chip. There are all kinds of interesting phenomena that appear that make the designers and the test engineer’s job much more difficult just because of these higher frequencies.”

In an RF front end, instead of modems or radios communicating, a wide variety of a BAW and SAW  filters are used to do the frequency band management and make sure that only the individual bands that are supposed to be used or being effectively used.

In addition to RF, Contact Intelligence is also designed for use in autonomous DC testing and for silicon phototonics.

In DC applications, Contact Intelligence automatically senses preset temperatures, and responds by waiting the correct amount of time until the system is stabilized. This allows lengthy test routines to be conducted over multiple temperatures without an operator present. Contact Intelligence also provides dynamic probe-to-pad alignment, even on pads as small as 25 µm, employing a combination of smart software, probe tip recognition algorithms and advanced programmable positioners.

FormFactor’s integrated SiPh solution allows sub-micron manipulation of optical fibers positioned above the wafer, automatically optimizing fiber coupling position.  Contact Intelligence uses machine vision technology to automate Theta X, Y and Z axis calibrations and alignments enabling measurements out of the box, reducing what used to take days or weeks to a matter of minutes.When combined with autonomous DC and RF, measurement options expand from Optical-Optical to include Photo-Diodes, Optical Modulators and more.

For more information, visit http://www.formfactor.com/contactintelligence.

Cautious optimism


June 15, 2018

By Walt Custer

Updated global GDP forecast

The World Bank just updated its multiyear forecast for GDP growth both globally and by country (Chart 1).

It noted: “Despite recent softening, global economic growth will remain robust at 3.1 percent in 2018 before slowing gradually over the next two years, as advanced-economy growth decelerates and the recovery in major commodity-exporting emerging market and developing economies levels off.

“This outlook is subject to considerable downside risks. The possibility of disorderly financial market volatility has increased, and the vulnerability of some emerging market and developing economies to such disruption has risen. Trade protectionist sentiment has also mounted, while policy uncertainty and geopolitical risks remain elevated.”

Chart 1

Semiconductor growth outlook strong (Chart 2)

The WSTS updated its world semiconductor shipment forecast. This new forecast (endorsed by SIA) projects worldwide semiconductor sales will be a record $463 billion in 2018, a 12.4 percent increase from 2017. WSTS projects year-to-year increases across all regional markets for 2018.

Chart 2

This revised semiconductor forecast coupled with very robust global semiconductor capital equipment sales (Chart 3) paint a positive outlook for 2018.

Chart 3

Very strong end market growth in first quarter (Chart 4)

Based upon the combined 1Q’18 financial reports of 213 large, global OEMs, electronic equipment sales (consolidated into U.S. dollars) increased globally an estimated (and very robust) 10.6 percent in 1Q’18 vs. 1Q’17. While this world growth result is very heartening it was significantly inflated by exchange rate effects as stronger non-dollar currencies were converted into weaker dollars.

Chart 4

Looking at world electronic equipment sales consolidated into both dollars and euros, 1Q’18 growth rates are MUCH different (Chart 5). 1Q’18 vs.1Q’17 electronic equipment sales grew 10.6 percent in dollars but declined 4.3 percent in euros!

Chart 5

Certainly the first quarter was strong globally but the currency chosen for analysis can have a BIG effect.

U.S. supply chain expansion continues

Looking at the U.S. market (in dollars – therefore not distorted by exchange rates) domestic electronic equipment orders rose 6.7 percent in February-April 2018 versus the same three-month period in 2017. The U.S. electronic industry is doing reasonably well at present.

www.census.gov/manufacturing/m3/

Expect the recent exchange rate based amplification of dollar denominated global growth to taper off quickly.

Keep a careful watch on the geopolitical situation.

Walt Custer of Custer Consulting Group is an analyst focused on the global electronics industry.

Originally published on the SEMI blog.

Synopsys, Inc. (Nasdaq: SNPS) today announced that Synopsys’ IC Validator has been certified by Samsung Foundry for signoff of all designs using its 7-nanometer (nm) Low Power Plus (LPP) process with Extreme Ultraviolet (EUV) lithography technology. The signoff-certified runsets, including design rule checking (DRC), layout-versus-schematic (LVS) and metal fill technology files, are available immediately from Samsung Foundry. Samsung Foundry 7LPP customers can now use IC Validator’s modern distributed processing in conjunction with runsets from Samsung Foundry to achieve faster physical verification turnaround time with the highest level of accuracy.

“We are building a customer-friendly design enablement ecosystem for 7LPP, our first EUV-based process technology,” said Ryan Sanghyun Lee, vice president of Foundry Marketing Team at Samsung Electronics. “Synopsys’ IC Validator is a great solution for our mutual customers to make the next generation of SoCs, which will lead the fourth industrial revolution with maximized power and performance benefit based on 7LPP process technology.”

IC Validator, a key component of the Synopsys Design Platform, is a comprehensive and highly scalable physical verification tool suite including DRC, LVS, programmable electrical rule checks (PERC), fill, and DFM enhancement capabilities. IC Validator is architected for high performance and scalability that maximizes utilization of mainstream hardware, using smart memory-aware load scheduling and balancing technologies. It uses both multi-threading and distributed processing over multiple machines to provide scalability benefits that extend to more than a thousand CPUs.

“Our partnership with Samsung Foundry has been focused on delivering high-quality and high-performance physical signoff solutions for today’s leading-edge designs,” said Christen Decoin, senior director of business development, Design Group at Synopsys. “This certification brings the proven benefits of IC Validator physical verification to Samsung Foundry 7LPP customers.”

Synopsys, Inc. (Nasdaq: SNPS) today announced that Samsung Foundry has certified the Synopsys Design Platform with Fusion Technology for 7-nanometer (nm) Low Power Plus (LPP) process with Extreme Ultraviolet (EUV) lithography technology. The Synopsys Design Platform provides comprehensive full-flow 7LPP support for EUV single-exposure-based routing and via stapling to ensure maximum design routability and utilization while minimizing IR-drop. Synopsys’ SiliconSmart® library characterization tool was key to developing the foundation IP used for this certification process and reference flow. Samsung Foundry has certified Synopsys Design Platform tools and the reference flow, which is compatible with the Lynx Design System with scripts for automation and design best practices. The reference flow is available through the Samsung Advanced Foundry Ecosystem (SAFE™) program.

“Built through deep collaboration with Synopsys, this certification and reference flow for our 7LPP process will enable our mutual customers to achieve the best power, performance, and area for their designs,” said Ryan Sanghyun Lee, vice president of Foundry Marketing Team at Samsung Electronics. “Our foundry customers can confidently ramp their designs to volume production on our most advanced EUV-based process using the proven Synopsys Design Platform with Fusion Technology.”

“Our tools and reference flow collaboration with Samsung Foundry is focused on enabling designers to get the optimum quality of results with the highest confidence on Samsung Foundry’s latest 7LPP process with EUV,” said Michael Jackson, corporate vice president of marketing and business development for Synopsys’ Design Group. “This scalable 7LPP reference flow based on the Synopsys Design Platform with Fusion Technology will allow designers to easily achieve their desired design and schedule targets.”

The 64-bit Arm Cortex-A53 processor, based on the ARMv8 architecture, was used for quality of results (QoR) optimization and flow certification. Key tools and features of the Synopsys Design Platform 7LPP reference flow include:

  • IC Compiler II place-and-route: EUV single-exposure-based routing with optimized 7LPP design rule support, and via stapling to ensure maximum design routability and utilization while minimizing IR-drop
  • Design Compiler Graphical RTL synthesis: Correlation, congestion reduction, optimized 7LPP design rule support, and physical guidance for IC Compiler II
  • IC Validator physical signoff: High-performance DRC signoff, LVS-aware short-finder, signoff fill, pattern matching, and unique dirty data analysis with Explorer technology, as well as in-design verification for automated DRC repair and accurate timing-aware metal fill within IC Compiler II
  • PrimeTime timing signoff: Near-threshold ultra-low voltage variation modeling, via variation modeling, and placement rule-aware engineering change order (ECO) guidance
  • StarRC™ parasitic extraction: EUV single pattern-based routing support, and new extraction technologies such as coverage-based via resistance
  • RedHawk™ Analysis Fusion: ANSYS® RedHawk™-driven EM/IR analysis and optimization within IC Compiler II including via insertion and power grid augmentation
  • DFTMAX™ and TetraMAX® II test: FinFET-based, cell-aware, and slack-based transition testing for higher test quality
  • Formality® formal verification: UPF-based equivalence checking with state transition verification

The certified, scalable reference flow compatible with Synopsys’ Lynx Design System is available through the SAFE™ program. The Lynx Design System is a full-chip design environment that includes innovative automation and reporting capabilities to help designers implement and monitor their designs. It includes a production RTL-to-GDSII flow that simplifies and automates many critical implementation and validation tasks, enabling engineers to focus on achieving performance and design goals. The SAFE™ program provides extensively tested process design kits (PDKs) and reference flows (with design methodologies) that are backed by Samsung Foundry’s certification.

WIN Semiconductors Corp (TPEx:3105), the world’s largest pure-play compound semiconductor foundry, has expanded its portfolio of highly integrated GaAs technologies with the release of a new pHEMT technology. The PIH0-03 platform incorporates monolithic PIN and vertical Schottky diodes with WIN’s high performance 0.1um pseudomorphic HEMT process, PP10. This integrated technology, PIH0-03, adds a highly linear vertical Schottky diode with cut-off frequency over 600GHz, as well as multi-function PIN diodes while preserving the state-of-the-art mmWave performance of the PP10 technology. The availability of monolithic PIN and Schottky diodes with a high performance mmWave transistor enables on-chip integration of a wide range of functions, including mixers, temperature/power detecting, limiters, and high frequency switching, and supports power, low noise and optical applications through100 GHz.

This integrated technology provides users with multiple pathways to add on-chip functionality and reduce the overall die count of complex multi-chip modules used in a variety of end-markets. In addition to high frequency switching, the monolithic PIN diodes can be used for low parasitic capacitance ESD protection circuits, and as an on-chip power limiter to protect sensitive LNAs in phased array radars. The vertical Schottky diodes enable numerous detecting and mixing functions and can be combined with the PIN diodes in unique limiter applications.

“Today’s complex systems and highly competitive markets require increased mmWave performance and more functionality per chip. The PIH0-03 platform is the latest example of how WIN Semiconductors is addressing these critical market needs by offering high performance GaAs technologies with new levels of multifunction integration. To meet the ever-increasing demands of next generation mobile user equipment, wireless infrastructure, fiber optics and military applications, WIN Semiconductors continues to commercialize advanced, highly integrated GaAs solutions and provide our customers a clear technology advantage,” said David Danzilio, Senior Vice President of WIN Semiconductors Corp.

Semiconductors N.V. (NASDAQ:NXPI) has expanded its cellular infrastructure portfolio of GaN and silicon laterally diffused metal oxide semiconductor (Si-LDMOS) products that deliver industry leading performance in a compact footprint to enable next-generation 5G cellular networks.

Spectrum expansion, higher order modulation, carrier aggregation, full dimension beam forming, and other enablers of 5G connectivity will require an expanded base of technologies to support enhanced mobile broadband connectivity. With spectrum usage and network footprints, multiple-input, multiple output (MIMO) technologies from four transmit (4TX) antennas to 64 TX and higher will be employed. The future of 5G networks will depend on GaN and Si-LDMOS technologies and NXP is at the forefront in its RF power amplifier development.

“Building on the success of 25 years of LDMOS leadership — NXP released the world’s first LDMOS product in 1992 — today, we are extending our RF leadership with industry leading GaN technology, developed with the highest linear efficiency for cellular applications,” said Paul Hart, senior vice president and general manager of NXP’s RF Power business. “Backed with the best supply chain, global applications support and unparalleled design expertise in the industry, NXP is positioned to be the leading RF partner for 5G solutions.”

At IMS 2018, NXP is introducing new RF GaN wideband power transistors and expanding its Airfast third-generation Si-LDMOS portfolio of macro and outdoor small cell solutions. The new offerings include:

  • A3G22H400-04S: Ideally suited for 40 W base stations, this GaN product yields up to 56.5 percent efficiency and 15.4 dB of gain and covers cellular bands from 1800 MHz to 2200 MHz.
  • A3G35H100-04S: Providing 43.8 percent efficiency and 14 dB of gain, this GaN product enables 16 TX MIMO solutions at 3.5 GHz.
  • A3T18H400W23S: This Si-LDMOS product is leading the way to 5G at 1.8 GHz with Doherty efficiency up to 53.4 percent and gain of 17.1 dB.
  • A3T21H456W23S: Covering the full 90 MHz band from 2.11 GHz to 2.2 GHz, this solution exemplifies NXP’s best-in-class Si-LDMOS performance for efficiency, RF power and signal bandwidth.
  • A3I20D040WN: Within NXP’s family of integrated ultra-wideband LDMOS products, this solution offers peak power of 46.5 dBm with 365 MHz wideband class AB performance of 32 dB of gain, 18 percent efficiency at 10 dB OBO.
  • A2I09VD030N: This offering boasts peak power of 46 dBm with class AB performance of 34.5 dB gain, 20 percent efficiency at 10 dB OBO. The RF bandwidth for this product is 575 MHz to 960 MHz.

The breadth of the company’s RF Power technologies—which include GaN, silicon-LDMOS, SiGe, and GaAs—allows product options for 5G that span frequency and power spectrums with varying levels of integration. This wide array of options, combined with the products that NXP builds for digital computing, and baseband processing, makes NXP a unique supplier of end-to-end 5G solutions.

To learn more, visit NXP at the International Microwave Symposium (IMS 2018) June 10-15 at booth #739 or at www.nxp.com/RF.

pSemi Corporation (formerly Peregrine Semiconductor), a Murata company focused on semiconductor integration, announces the expansion of its digital step attenuator (DSA) portfolio with a family of value, high-performance DSAs. The four value DSAs feature industry-leading attenuation accuracy at an entry-level price point.

“pSemi has a long, successful history of digital step attenuator development,” says Jim Cable, CTO at pSemi. “Our team introduced the world’s first single-chip DSA in 2004, and now, we are further expanding our DSA portfolio with the introduction of the value, high-performance DSAs. These four new DSAs nicely round out our DSA portfolio and complement our RF catalog parts.”

The value DSA family—the PE43620, PE43650, PE43665 and PE43670—are offered in a 2-bit, 5-bit, 6-bit or 7-bit configuration. These high-performance DSAs have excellent attenuation accuracy, low insertion loss and high linearity. The four products are available in compact QFN packages.

For 1K-quantity orders, the PE43620 DSA (2 bit, 50-ohm) is $0.63 each; the PE43650 (5 bit, 50-hm) is $1.44 each. The PE43665 (6-bit, 75-ohm) is $1.23 each, and the PE43670 (7-bit, 50-ohm) is $2.02each. Volume-production parts, samples and evaluation kits will be available in August.

pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission: to enhance Murata’s capabilities with high-performance RF,

The semiconductor industry is nearing a third consecutive year of record equipment spending with projected growth of 14 percent (YOY) in 2018 and 9 percent in 2019, a mark that would extend the streak to a historic fourth consecutive growth year, according to the latest update of the World Fab Forecast report published by SEMI. Over the semiconductor industry’s 71-year history, only once before – in the mid 1990s – has the industry logged four consecutive years of equipment spending growth.

Korea and China are leading the growth, with Samsung dominating global spending and ascendant China on a fast, steep rise, surging ahead of all other markets. See Figure 1.

Figure 1 equipment spending by region (includes new and refurbished)

While Samsung is expected to reduce equipment investments in 2018, the company still accounts for a dominant 70 percent of all investment in Korea. At the same time, SK Hynix is increasing its equipment spending in Korea.

China’s equipment spending is forecast to increase 65 percent in 2018 and 57 percent in 2019.  Notably, 58 percent of investments in China in 2018 and 56 percent in 2019 stem from companies with headquarters in other regions such as Intel, SK Hynix, TSMC, Samsung, and GLOBALFOUNDRIES. Domestic, Chinese-owned companies – backed by large government initiatives – are building a considerable number of new fabs that will start equipping in 2018. The companies are expected to double their equipment investments in 2018 and again in 2019.

Other regions are also ramping up investments. Japan is increasing equipment spending by 60 percent in 2018, with the largest increases by Toshiba, Sony, Renesas and Micron.

The Europe and Mideastern region will boost investments by 12 percent in 2018, with Intel, GLOBALFOUNDRIES, Infineon and STMicroelectronics the largest contributors.

Southeast Asia will boost investments by more than 30 percent in 2018, although total spending is proportionately smaller than in other regions owing to its size. The main contributors are Micron, Infineon and GLOBALFOUNDRIES, though companies including OSRAM and ams are also increasing investments.

The SEMI World Fab Forecast, which also includes information on other companies, covers data and predictions through the end of 2019, including milestones, detailed investments by quarter, product types, technology nodes and capacities down to fab and project level.

Learn more about the SEMI fab databases at:

www.semi.org/en/MarketInfo/FabDatabase and www.youtube.com/user/SEMImktstats.

Quantum bits are now easier to manipulate for devices in quantum computing, thanks to enhanced spin-orbit interaction in silicon.

A silicon quantum computer chip has the potential to hold millions of quantum bits, or qubits, for much faster information processing than with the bits of today’s computers. This translates to high-speed database searches, better cybersecurity and highly efficient simulation of materials and chemical processes.

Now, research groups from Purdue University, the Technological University of Delft, Netherlands and the University of Wisconsin-Madison have discovered that silicon has unique spin-orbit interactions that can enable the manipulation of qubits using electric fields, without the need for any artificial agents.

Researchers are taking advantage of a newly found phenomenon in silicon that makes quantum bits easier to manipulate, leading to faster and longer-lived information processing via quantum computing. Credit: (Purdue University image/Rifat Ferdous)

“Qubits encoded in the spins of electrons are especially long-lived in silicon, but they are difficult to control by electric fields. Spin-orbit interaction is an important knob for the design of qubits that was thought to be small in this material, traditionally,” said Rajib Rahman, research assistant professor in Purdue’s School of Electrical and Computer Engineering.

The strength of spin-orbit interaction, which is the interaction of an electron’s spin with its motion, is an important factor for the quality of a qubit. The researchers found more prominent spin-orbit interaction than usual at the surface of silicon where qubits are located in the form of so-called quantum dots – electrons confined in three dimensions. Rahman’s lab identified that this spin-orbit interaction is anisotropic in nature – meaning that it is dependent on the angle of an external magnetic field – and strongly affected by atomic details of the surface.

“This anisotropy can be employed to either enhance or minimize the strength of the spin-orbit interaction,” said Rifat Ferdous, lead author of this work and a Purdue graduate research assistant in electrical and computer engineering. Spin-orbit interaction then affects qubits.

“If there is a strong spin-orbit interaction, the qubit’s lifetime is shorter but you can manipulate it more easily. The opposite happens with a weak spin-orbit interaction: The qubit’s lifetime is longer, but manipulation is more difficult,” Rahman said.

The researchers published their findings on June 5 in Nature Partner Journals – Quantum Information. The Wisconsin-Madison team fabricated the silicon device, the Delft team performed the experiments and the Purdue team led the theoretical investigation of the experimental observations. This work is supported by the Army Research Office, U.S. Department of Energy, the National Science Foundation and the European Research Council.

Upcoming work in Rahman’s lab will focus on taking advantage of the anisotropic nature of spin-orbit interactions to further enhance the coherence and control of qubits, and, therefore, the scaling up of quantum computer chips.

In the field of photovoltaic technologies, silicon-based solar cells make up 90% of the market. In terms of cost, stability and efficiency (20-22% for a typical solar cell on the market), they are well ahead of the competition.

However, after decades of research and investment, silicon-based solar cells are now close to their maximum theoretical efficiency. As a result, new concepts are required to achieve a long-term reduction in solar electricity prices and allow photovoltaic technology to become a more widely adopted way of generating power.

One solution is to place two different types of solar cells on top of each other to maximize the conversion of light rays into electrical power. These “double-junction” cells are being widely researched in the scientific community, but are expensive to make. Now research teams in Neuchâtel – from EPFL’s Photovoltaics Laboratory and the CSEM PV-center – have developed an economically competitive solution. They have integrated a perovskite cell directly on top of a standard silicon-based cell, obtaining a record efficiency of 25.2%. Their production method is promising, because it would add only a few extra steps to the current silicon-cell production process, and the cost would be reasonable. Their research has been published in Nature Materials.

This scanning electron microscopy image shows Silicon’s pyramids covered with perovskite. Credit: EPFL

Perovskite-on-silicon: a nanometric sandwich

Perovskite’s unique properties have prompted a great deal of research into its use in solar cells over the last few years. In the space of nine years, the efficiency of these cells has risen by a factor of six. Perovskite allows high conversion efficiency to be achieved at a potentially limited production cost.

In tandem cells, perovskite complements silicon: it converts blue and green light more efficiently, while silicon is better at converting red and infra-red light. “By combining the two materials, we can maximize the use of the solar spectrum and increase the amount of power generated. The calculations and work we have done show that a 30% efficiency should soon be possible,” say the study’s main authors Florent Sahli and Jérémie Werner.

However, creating an effective tandem structure by superposing the two materials is no easy task. “Silicon’s surface consists of a series of pyramids measuring around 5 microns, which trap light and prevent it from being reflected. However, the surface texture makes it hard to deposit a homogeneous film of perovskite,” explains Quentin Jeangros, who co-authored the paper.

When the perovskite is deposited in liquid form, as it usually is, it accumulates in the valleys between the pyramids while leaving the peaks uncovered, leading to short circuits.

A key layer ensuring an optimal microstructure

Scientists at EPFL and CSEM have gotten around that problem by using evaporation methods to form an inorganic base layer that fully covers the pyramids. That layer is porous, enabling it to retain the liquid organic solution that is then added using a thin-film deposition technique called spin-coating. The researchers subsequently heat the substrate to a relatively low temperature of 150°C to crystallize a homogeneous film of perovskite on top of the silicon pyramids.

“Until now, the standard approach for making a perovskite/silicon tandem cell was to level off the pyramids of the silicon cell, which decreased its optical properties and therefore its performance, before depositing the perovskite cell on top of it. It also added steps to the manufacturing process,” says Florent Sahli.

Updating existing technologies

The new type of tandem cell is highly efficient and directly compatible with monocrystalline silicon-based technologies, which benefit from long-standing industrial expertise and are already being produced profitably. “We are proposing to use equipment that is already in use, just adding a few specific stages. Manufacturers won’t be adopting a whole new solar technology, but simply updating the production lines they are already using for silicon-based cells,” explains Christophe Ballif, head of EPFL’s Photovoltaics Laboratory and CSEM’s PV-Center.

At the moment, research is continuing in order to increase efficiency further and give the perovskite film more long-term stability. Although the team has made a breakthrough, there is still work to be done before their technology can be adopted commercially.