Category Archives: Semiconductors

SEMI, the global industry association representing the electronics manufacturing supply chain, today announced that the WT | Wearable Technologies Conference 2018 USA will co-locate July 11-12 with SEMICON West 2018 in San Francisco. The electronics industry’s premier U.S. event, SEMICON West — July 10-12 at Moscone North and South — will highlight engines of industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

“We are excited that the WT | Wearables Technologies Conference has joined SEMICON West to co-locate in 2018,” said David Anderson, president of SEMI Americas. “Our strategic partnership brings new content and more value to our extended supply chain. Every day the semiconductor industry makes chips smaller and faster with ever-higher performance. These innovations enable new wearable applications for smart living, smart medtech and healthcare that are continuously improving our lives. The WT | Wearable Technologies Conference speakers at SEMICON West 2018 will demonstrate just how they use semiconductor technology to deliver leading-edge wearables.”

“It is a great pleasure to collaborate with the leading global electronics manufacturing association and its successful SEMICON West event,” said Christian Stammel, CEO of WT | Wearables Technologies. “Since the beginning of our platform in 2006, the semiconductor industry has been a major driver of wearables and IoT innovation. All major developments in the WT application markets like healthcare (smart patches), safety and security (tracking solutions), lifestyle and sport (smartwatches and wristbands) and in the industrial field (AR / VR) were driven by semiconductor and MEMS innovations. Our program of expert speakers at SEMICON West will share the latest insights in the wearables market as the SEMI and WT ecosystems explore collaboration and innovation opportunities.”

IC Insights recently released its May Update to the 2018 McClean Report.  This Update included a look at the top-25 1Q18 semiconductor suppliers, a discussion of the 1Q18 IC industry market results, and an update of the 2018 capital spending forecast by company.

Overall, the capital spending story for 2018 is becoming much more positive as compared with the forecast presented in IC Insights’ March Update to The McClean Report 2018 (MR18).  In the March Update, IC Insights forecast an 8% increase in semiconductor industry capital spending for this year. However, as shown in Figure 1, IC Insights has raised its expectations for 2018 capital spending by six percentage points to a 14% increase.  If this increase occurs, it would be the first time that semiconductor industry capital outlays exceeded $100 billion.  The worldwide 2018 capital spending forecast figure is 53% higher than the spending just two years earlier in 2016.

Although Samsung says it still does not have a full-year capital spending forecast for this year it did say it will spend “less” in semiconductor capital outlays in 2018 as compared to 2017, when it spent $24.2 billion.  However, as of 1Q18, with regard to its capex, its “foot is still on the gas!”  Samsung spent $6.72 billion in capex for its semiconductor division in 1Q18, slightly higher than the average of the previous three quarters.  This figure is almost 4x the amount the company spent just two years earlier in 1Q16!  Over the past four quarters, Samsung has spent an incredible $26.6 billion in capital outlays for its semiconductor group. Wow!

IC Insights has estimated Samsung’s semiconductor group capital spending will be $20.0 billion this year, $4.2 billion less than it spent in 2017.  However, given the strong start to its spending this year, it appears there is currently more upside than downside potential to this forecast.

With the DRAM and NAND flash memory markets still very strong, SK Hynix is expected to ramp up its capital spending this year to $11.5 billion, 42% greater than the $8.1 billion it spent in 2017. The increased spending by SK Hynix this year will primarily focus on bringing on-line two large memory fabs—M15, a 3D NAND flash fab in Cheongju, South Korea and its expansion of its huge DRAM fab in Wuxi, China.  The Cheongju fab is being pushed to open before the end of this year.  The Wuxi fab is also targeted to open by the end of this year, a few months earlier than its original planned start date of early 2019.

Figure 1

After strong year-over-year growth of 24% in 2017, worldwide semiconductor revenue is forecast to grow for the third consecutive year in 2018 to $450 billion, up 7.7% over 2017, according to a new Semiconductor Applications Forecaster (SAF) from International Data Corporation (IDC). The SAF also forecasts that semiconductor revenues will log a compound annual growth rate (CAGR) of 2.9% from 2017-2022, reaching $482 billion in 2022.

The overall memory market was the key story of last year, due to strong demand, limited supply, and product mix constraints. The DRAM and NAND memory markets grew to $73 billion and $49 billion respectively, reflecting year-over-year growth rates of 77% and 52% for 2017. Excluding DRAM and NAND, the overall semiconductor market grew by 12% year over year. For 2018, non-memory semiconductors are forecast to grow $11 billion to $302 billion. Both DRAM and NAND will continue to grow this year, but are expected to decline from 2019-2021 before recovering slightly in 2022.

The strong memory market resulted in Samsung Electronics capturing the top semiconductor manufacturer spot away from Intel and raised the profile of all the memory manufacturers, which now represent three of the top five semiconductor companies compared to only two the previous year. Revenue concentration continued to increase for the overall market with the top 10 companies making up 60% of the semiconductor market compared to 56% in 2016 and 53% in 2015.

“Market consolidation in the semiconductor industry over the past five years continues to shape the competitive landscape for semiconductor suppliers as each company continues to refine its core markets and make acquisitions to find new and emerging sectors for growth. The pace of change and technology is expected to accelerate as machine learning and autonomous systems enable a more diverse set of architectures to address the opportunity. This will fuel the engine of growth for semiconductor technology over the next decade,” said Mario Morales, program vice president, Semiconductors at IDC.

The automotive market and the industrial markets will continue to be the leading areas of growth for the semiconductor market throughout the forecast period, growing at a 9.6% and 6.8% CAGR from 2017-2022. “The key drivers of electrification, connectivity and infotainment, advanced driver assistance (ADAS), and autonomous driving features will continue to drive the growth of semiconductor content on a per vehicle basis,” said Nina Turner, research manager for Semiconductors at IDC.

Other key findings from IDC’s Semiconductor Application Forecaster (excluding memory) include:

  • Semiconductor revenue for the computing industry segment will decline 4.0% this year and will show a negative CAGR of -0.7% for the 2017-2022 forecast period. Two bright spots for the computing segment are computing and enterprise SSDs, growing in high double digits and 9.8% CAGR respectively for 2017-2022.
  • Semiconductor revenue for the mobile wireless communications segment will grow 5.5% year over year this year with a CAGR of 5.8% for 2017-2022. Semiconductor revenue for 4G mobile phones will experience an annual growth rate of 10.9% in 2018 and a CAGR of 3.1% for 2017-2022. 5G will also drive growth in the later part of the forecast as the technology becomes mainstream by the middle of the next decade.
  • Communications infrastructure semiconductors are forecast to grow at a 1.7% CAGR from 2017-2022 with the strongest growth coming from consumer networks.

Micron Technology, Inc. (Nasdaq:MU), and Intel Corporation today announced production and shipment of the industry’s first 4bits/cell 3D NAND technology. Leveraging a proven 64-layer structure, the new 4bits/cell NAND technology achieves 1 terabit (Tb) density per die, the world’s highest-density flash memory.

The companies also announced development progress on the third-generation 96-tier 3D NAND structure, providing a 50 percent increase in layers. These advancements in the cell structure continue the companies’ leadership in producing the world’s highest Gb/mm2 areal density.

Both NAND technology advancements—the 64-layer QLC and 96-layer TLC technologies —utilize CMOS under the array (CuA) technology to reduce die sizes and deliver improved performance when compared to competitive approaches. By leveraging four planes vs the competitors’ two planes, the new Intel and Micron NAND flash memory can write and read more cells in parallel, which delivers faster throughput and higher bandwidth at the system level.

The new 64-layer 4bits/cell NAND technology enables denser storage in a smaller space, bringing significant cost savings for read-intensive cloud workloads. It is also well-suited for consumer and client computing applications, providing cost-optimized storage solutions.

“With introduction of 64-layer 4bits/cell NAND technology, we are achieving 33 percent higher array density compared to TLC, which enables us to produce the first commercially available 1 terabit die in the history of semiconductors,” said Micron Executive Vice President, Technology Development, Scott DeBoer. “We’re continuing flash technology innovation with our 96-layer structure, condensing even more data into smaller spaces, unlocking the possibilities of workload capability and application construction.”

“Commercialization of 1Tb 4bits/cell is a big milestone in NVM history and is made possible by numerous innovations in technology and design that further extend the capability of our Floating Gate 3D NAND technology,” said RV Giridhar, Intel vice president, Non-Volatile Memory Technology Development. “The move to 4bits/cell enables compelling new operating points for density and cost in Datacenter and Client storage.”

Technology trends in backplane technology are driving higher gas demand in display manufacturing. Specific gas requirements of process blocks are discussed, and various supply modes are reviewed.

BY EDDIE LEE, Linde Electronics, Hsinchu, Taiwan

Since its initial communalization in the 1990s, active matrix thin-film-transistor (TFT) displays have become an essential and indispensable part of modern living. They are much more than just televisions and smartphones; they are the primary communication and information portals for our day-to- day life: watches (wearables), appliances, advertising, signage, automobiles and more.

There are many similarities in the display TFT manufacturing and semiconductor device manufacturing such as the process steps (deposition, etch, cleaning, and doping), the type of gases used in these steps, and the fact that both display and semiconductor manufacturing both heavily use gases.

However, there are technology drivers and manufacturing challenges that differentiate the two. For semiconductor device manufacturing, there are technology limitations in making the device increasingly smaller. For display manufacturing, the challenge is primarily maintaining the uniformity of glass as consumers drive the demand for larger and thinner displays.

While semiconductor wafer size has maxed because of the challenges of making smaller features uniformly across the surface of the wafer, the size of the display mother glass has grown from 0.1m x 0.1m with 1.1mm thickness to 3m x 3m with 0.5mm thickness over the past 20 years due to consumer demands for larger, lighter, and more cost-effective devices.

As the display mother glass area gets bigger and bigger,so does the equipment used in the display manufacturing process and the volume of gases required. In addition, the consumer’s desire for a better viewing experience such as more vivid color, higher resolution, and lower power consumption has also driven display manufacturers to develop and commercialize active matrix organic light emitting displays (AMOLED).

Technology

Layers of display device

In general, there are two types of displays in the market today: active matrix liquid crystal display (AMLCD) and AMOLED. In its simplicity, the fundamental components required to make up the display are the same for AMLCD and AMOLED. There are four layers of a display device (FIGURE 1): a light source, switches that are the thin-film-transistor and where the gases are mainly used, a shutter to control the color selection, and the RGB (red, green, blue) color filter.

About backplane/TFT

The thin-film-transistors used for display are 2D transitional transistors, which are similar to bulk CMOS before FinFET. For the active matrix display, there is one transistor for each pixel to drive the individual RGB within the pixel. As the resolution of the display grows, the transistor size also reduces, but not to the sub-micron scale of semiconductor devices. For the 325 PPI density, the transistor size is approximately 0.0001 mm2 and for the 4K TV with 80 PPI density, the transistor size is approximately 0.001 mm2.

Technology trends TFT-LCD (thin-film-transistor liquid-crystal display) is the baseline technology. MO / White OLED (organic light emitting diode) is used for larger screens. LTPS / AMOLED is used for small / medium screens. The challenges for OLED are the effect of < 1 micron particles on yield, much higher cost compared to a-Si due to increased mask steps, and moisture impact to yield for the OLED step.

Mobility limitation (FIGURE 2) is one of the key reasons for the shift to MO and LTPS to enable better viewing experience from higher resolution, etc.

The challenge to MO is the oxidation after IGZO metalization / moisture prevention after OLED step, which decreases yield. A large volume of N2O (nitrous oxide) is required for manufacturing, which means a shift in the traditional supply mode might need to be considered.

Although AMLCD displays are still dominant in the market today, AMOLED displays are growing quickly. Currently about 25% of smartphones are made with AMOLED displays and this is expected to grow to ~40% by 2021. OLED televisions are also growing rapidly, enjoying double digit growth rate year over year. Based on IHS data, the revenue for display panels with AMOLED technol- ogies is expected to have a CAGR of 18.9% in the next five years while the AMLCD display revenue will have a -2.8% CAGR for the same period with the total display panel revenue CAGR of 2.5%. With the rapid growth of AMOLED display panels, the panel makers have accel- erated their investment in the equipment to produce AMOLED panels.

Types of backplanes

There are three types of thin-film-transistor devices for display: amorphous silicon (a-Si), low temperature polysilicon (LTPS), and metal oxide (MO), also known as transparent amorphous oxide semiconductor (TAOS). AMLCD panels typically use a-Si for lower-resolution displays and TVs while high-resolution displays use LTPS transistors, but this use is mainly limited to small and medium displays due to its higher costs and scalability limitations. AMOLED panels use LTPS and MO transistors where MO devices are typically used for TV and large displays (FIGURE 3).

How gases are used

This shift in technology also requires a change in the gases used in production of AMOLED panels as compared with the AMLCD panels. As shown in FIGURE 4, display manufacturing today uses a wide variety of gases.

These gases can be categorized into two types: Electronic Specialty gases (ESGs) and Electronic Bulk gases (EBGs) (FIGURE 5). Electronic Specialty gases such as silane, nitrogen trifluoride, fluorine (on-site generation), sulfur hexafluoride, ammonia, and phosphine mixtures make up 52% of the gases used in the manufacture of the displays while the Electronic Bulk gases–nitrogen, hydrogen, helium, oxygen, carbon dioxide, and argon – make up the remaining 48% of the gases used in the display manufacturing.

Key usage drivers

The key ga susage driver in the manufacturing of displays is PECVD (plasma-enhanced chemical vapor deposition), which accounts for 75% of the ESG spending, while dry etch is driving helium usage. LTPS and MO transistor production is driving nitrous oxide usage. The ESG usage for MO transistor production differs from what is shown in FIGURE 4: nitrous oxide makes up 63% of gas spend, nitrogen trifluoride 26%, silane 7%, and sulfur hexafluoride and ammonia together around 4%. Laser gases are used not only for lithography, but also for excimer laser annealing application in LTPS.

Silane: SiH4 is one of the most critical molecules in display manufacturing. It is used in conjunction with ammonia (NH3) to create the silicon nitride layer for a-Si transistor, with nitrogen (N2) to form the pre excimer laser anneal a-Si for the LTPS transistor, or with nitrous oxide (N2O) to form the silicon oxide layer of MO transistor.

Nitrogen trifluoride: NF3 is the single largest electronic material from spend and volume standpoint for a-Si and LTPS display production while being surpassed by N2O for MO production. NF3 is used for cleaning the PECVD chambers. This gas requires scalability to get the cost advantage necessary for the highly competitive market.

Nitrous oxide: Used in both LTPS and MO display production, N2O has surpassed NF3 to become the largest electronic material from spend and volume standpoint for MO production. N2O is a regional and localized product due to its low cost, making long supply chains with high logistic costs unfeasible. Averaging approximately 2 kg per 5.5 m2 of mother glass area, it requires around 240 tons per month for a typical 120K per month capacity generation 8.5 MO display production. The largest N2O compressed gas trailer can only deliver six tons of N2O each time and thus it becomes both costly and risky
for MO production.

Nitrogen: For a typical large display fab, N2 demand can be as high as 50,000 Nm3/hour, so an on-site generator, such as the Linde SPECTRA-N® 50,000, is a cost-effective solution that has the added benefit of an 8% reduction in CO2 (carbon dioxide) footprint over conventional nitrogen plants.

Helium: H2 is used for cooling the glass during and after processing. Manufacturers are looking at ways to decrease the usage of helium because of cost and availability issues due it being a non-renewable gas.

Gas distribution at the fab

N2 On-site generators: Nitrogen is the largest consumed gas at the fab, and is required to be available before the first tools are brought to the fab. Like major semiconductor fabs, large display fabs require very large amounts of nitrogen, which can only be economically supplied by on-site plants.

Cryogenic liquid truck trailers: Oxygen, argon, and carbon dioxide are produced at off-site plants and trucked short distances as cryogenic liquids in specialty vacuum-insulated tankers.
Compressed gas truck trailers: Other large volume gases like hydrogen and helium are supplied over longer distances in truck or ISO-sized tanks as compressed gases.

Individual packages: Specialty gases are supplied in individual packages. For higher volume materials like silane and nitrogen trifluoride, these can be supplied in large ISO packages holding up to 10 tons. Materials with smaller requirements are packaged in standard gas cylinders.

Blended gases: Laser gases and dopants are supplied as blends of several different gases. Both the accuracy and precision of the blended products are important to maintain the display device fabrication operating within acceptable parameters.

In-fab distribution: Gas supply does not end with the delivery or production of the material of the fab. Rather, the materials are further regulated with additional filtration, purification, and on-line analysis before delivery to individual production tools.

Conclusion

The consumer demand for displays that offer increas- ingly vivid color, higher resolution, and lower power consumption will challenge display makers to step up the technologies they employ and to develop newer displays such as flexible and transparent displays. The transistors to support these new displays will either be LTPS and / or MO, which means the gases currently being used in these processes will continue to grow. Considering the current a-Si display production, the gas consumption per area of the glass will increase by 25% for LTPS and ~ 50% for MO productions.

To facilitate these increasing demands, display manufacturers must partner with gas suppliers to identify which can meet their technology needs, globally source electronic materials to provide customers with stable and cost- effective gas solutions, develop local sources of electronic materials, improve productivity, reduce carbon footprint, and increase energy efficiency through on-site gas plants. This is particularly true for the burgeoning China display manufacturing market, which will benefit from investing in on-site bulk gas plants and collaboration with global materials suppliers with local production facilities for high-purity gas and chemical manufacturing.

Nanostructures are the holy grail of new materials.

The wonder material graphene, for example, is a single layer of carbon atoms arranged in a hexagonal pattern that, because of its conductivity, flexibility, transparency and strength, has the potential to create more efficient solar cells, smaller and faster electric circuits and microchips, transparent displays, and high density capacitors and batteries.

According to Xiaoji Xu (https://chemistry.cas2.lehigh.edu/faculty/xiaoji-xu-0), assistant professor in the Department of Chemistry at Lehigh University, another quality that makes nanomaterials like graphene so special is their ability to generate a physics phenomenon called a polariton.

Polaritons are quasiparticles resulting from a strong coupling of electromagnetic waves with an electric or magnetic dipole-carrying excitation–referred to by some as a light-matter coupling. Polaritons make it possible for nanostructures to confine–and compress–light around the material.

The ability to compress light is key to scaling down devices for future optical communications and computing. It could also lead to sensing at a scale below one nanometer, important for achieving biomedical advances in disease detection, prevention and treatment.

The challenge for people studying these materials, says Xu, is how to reveal–and characterize–the polaritons at the nanoscale because no conventional microscope can do that.

Now Xu and his team (https://xu-lab.com/) have found a way to reveal the 3-D shape of the polariton interaction around a nanostructure. Their technique improves upon the common spectroscopic imaging technique known as scattering-type scanning near-field optical microscopy (s-SNOM). The team’s method, called peak force scattering-type scanning near-field optical microscopy (PF-SNOM), works through a combination of peak force tapping mode and time-gated light detection. The researchers have detailed their work in an article called: “Tomographic and multimodal scattering-type scanning near-field optical microscopy with peak force tapping mode” (DOI: 10.1038/s41467-018-04403-5) published online on May 21st 2018 in Nature Communications. In addition to Xu, the paper’s co-authors include Haomin Wang, Le Wang and Devon S. Jakob, PhD students in Xu’s lab.

In the paper, the authors state: “PF-SNOM enables direct sectioning of vertical near-field signals from a sample surface for both three-dimensional near-field imaging and spectroscopic analysis. Tip-induced relaxation of surface phonon polaritons are revealed and modeled by considering tip damping.”

According to the researchers, PF-SNOM also offers an improved spatial resolution of five nanometers, rather than the typical ten nanometers offered by the traditional s-SNOM.

“Our technique could be beneficial to scientists studying nanostructures enabling them to better understand how the electrical field is distributed around a given nanostructure,” says Xu.

Their PF-SNOM characterization method is not only more direct than existing techniques, it can also simultaneously obtain the polaritonic, mechanical and electrical information.

With one measurement, explains Xu, multiple modes of information can be obtained–a unique advantage.

The development of PF-SNOM grew out of the team’s study of gap mode, when two plasmonic structures approach within a few nanometers there is a huge enhancement of the plasmon intensity in the gap between the two structures as energy is transferred from one structure to the other. With their ability to narrow this gap mode response in simulations, the researchers decided to try to extend it to non-gap mode – when increasing the distance between the atomic force microscopy (AFM) probe tip and the sample.

“Using an AFM tip, we measured the scattered light as a function of tip-sample distance,” explains Wang, a PhD student in Xu’s lab and a co-author on the paper. “We then gathered information at different tip-sample distances and combined all this layered information together to obtain the tomographic image and reveal the 3-D polariton structure.”

Interestingly, when the team began their experiments they expected a different outcome. However, during the simulations, they observed a special shape of light scattering and saw there was an obvious gap mode enhancement.

“It turned out that we could section the light in different tip-samples distances and use those signals to view the near-field response at different layers and in vertical directions,” says Wang.

He adds: “Though this work was done with infrared, in principle it could also be extended to other frequencies, such as visible and terahertz.”

Technavio projects the global semiconductor glass wafer market to post a CAGR of more than 6% during the forecast period. The emergence of advanced and compact consumer electronic devices is a key driver, which is expected to impact market growth.

Consumer electronic devices have witnessed a massive transformation over the last five years. Feature phones have been replaced by smartphones, PCs by laptops, and now laptops are being replaced by tablets. Cathode ray tube (CRT) TVs are being replaced by light-emitting diode (LED) TVs and organic LED (OLED) TVs. Due to increase in unit shipments of tablets and smartphones over the last five years, the demand for ICs (including MEMS devices and CMOS image sensors) used in these devices is on the rise. As semiconductor glass wafers are integral to ICs, rising demand for ICs will generate strong demand for semiconductor glass wafers over the forecast period.

In this report, Technavio highlights the growing proliferation of IoT and connected devices as one of the key emerging trends to drive the global semiconductor glass wafer market:

Growing proliferation of IoT and connected devices

IoT is a network of interrelated computing devices comprising mechanical and digital machines or objects that possess the ability to transfer data over a network without human-to-computer interaction. More than 30 billion IoT devices, generating about 50 trillion GBs of data, are expected to be connected through IoT by 2022. IoT enables devices to collect data using sensors and actuators and transmits data to a centralized location on a real-time basis, which empowers the user to take an informed decision. Thus, the adoption of IoT is increasing in several market segments, such as consumer electronics, automotive, and medical.

According to a senior analyst at Technavio for semiconductor equipment research, “Sensors and MEMS are an integral part of IoT devices and are manufactured from semiconductor glass wafers. It is projected that a total of one trillion sensors will be produced in 2020 to support the demand for IoT devices. This will require a significant production of semiconductor glass wafers, which can be met by several fabs. Growing applications of IoT will drive the construction of fabs.”

Inorganic semiconductors such as silicon are indispensable in modern electronics because they possess tunable electrical conductivity between that of a metal and that of an insulator. The electrical conductivity of a semiconductor is controlled by its band gap, which is the energy difference between its valence and conduction bands; a narrow band gap results in increased conductivity because it is easier for an electron to move from the valence to the conduction band. However, inorganic semiconductors are brittle, which can lead to device failure and limits their application range, particularly in flexible electronics.

Inorganic semiconducting crystals generally tend to fail in a brittle manner. This is true for zinc sulfide (ZnS); ZnS crystals (A) show catastrophic fracture after mechanical tests under ordinary light-exposure environments (B). However, we found out that ZnS crystals can be plastically deformed up to a deformation strain of εt = 45 % when deformed along the [001] direction in complete darkness even at room temperature (C). Moreover, the optical band gap of the deformed ZnS crystals decreased by 0.6 eV after deformation. Credit: Atsutomo Nakamura

Inorganic semiconducting crystals generally tend to fail in a brittle manner. This is true for zinc sulfide (ZnS); ZnS crystals (A) show catastrophic fracture after mechanical tests under ordinary light-exposure environments (B). However, we found out that ZnS crystals can be plastically deformed up to a deformation strain of εt = 45 % when deformed along the [001] direction in complete darkness even at room temperature (C). Moreover, the optical band gap of the deformed ZnS crystals decreased by 0.6 eV after deformation. Credit: Atsutomo Nakamura

A group at Nagoya University recently discovered that an inorganic semiconductor behaved differently in the dark compared with in the light. They found that crystals of zinc sulfide (ZnS), a representative inorganic semiconductor, were brittle when exposed to light but flexible when kept in the dark at room temperature. The findings were published in Science.

“The influence of complete darkness on the mechanical properties of inorganic semiconductors had not previously been investigated,” study coauthor Atsutomo Nakamura says. “We found that ZnS crystals in complete darkness displayed much higher plasticity than those under light exposure.”

The ZnS crystals in the dark deformed plastically without fracture until a large strain of 45%. The team attributed the increased plasticity of the ZnS crystals in the dark to the high mobility of dislocations in complete darkness. Dislocations are a type of defect found in crystals and are known to influence crystal properties. Under light exposure, the ZnS crystals were brittle because their deformation mechanism was different from that in the dark.

The high plasticity of the ZnS crystals in the dark was accompanied by a considerable decrease in the band gap of the deformed crystals. Thus, the band gap of ZnS crystals and in turn their electrical conductivity may be controlled by mechanical deformation in the dark. The team proposed that the decreased band gap of the deformed crystals was caused by deformation introducing dislocations into the crystals, which changed their band structure.

“This study reveals the sensitivity of the mechanical properties of inorganic semiconductors to light,” coauthor Katsuyuki Matsunaga says. “Our findings may allow development of technology to engineer crystals through controlled light exposure.”

The researchers’ results suggest that the strength, brittleness, and conductivity of inorganic semiconductors may be regulated by light exposure, opening an interesting avenue to optimize the performance of inorganic semiconductors in electronics.

By Walt Custer, Custer Consulting Group

Broad global & U.S. electronic supply chain growth

The first quarter of this year was very strong globally, with growth across the entire electronics supply chain. Although Chart 1 is based on preliminary data, every electronics sector expanded –  with many in double digits. The U.S. dollar-denominated growth estimates in Chart 1 have effectively been amplified by about 5 percent by exchange rates (as stronger non-dollar currencies were consolidated to weaker U.S. dollars), but the first quarter global rates are very impressive nonetheless.

Walt Custer Chart 1

U.S. growth was also good (Chart 2) with Quarter 1 2018 total electronics equipment shipments up 7.2 percent over the same period last year. Since all the Chart 2 values are based on domestic (US$) sales, there is no growth amplification due to exchange rates.

Walt Custer Chart 2

We expect continued growth in Quarter 2 but not at the robust pace as the first quarter.

Chip foundry growth resumes

Taiwan-listed companies report their monthly revenues on a timely basis – about 10 days after month end. We track a composite of 14 Taiwan Stock Exchange listed chip foundries to maintain a “pulse” of this industry (Chart 3).

Walt Custer Chart 3

Chip foundry sales have been a leading indicator for global semiconductor and semiconductor capital equipment shipments. After dropping to near zero in mid-2017, foundry growth is now rebounding.

Chart 4 compares 3/12 (3-month) growth rates of global semiconductor and semiconductor equipment sales to chip foundry sales. The foundry 3/12 has historically led semiconductors and SEMI equipment and is pointing to a coming cyclical upturn. It will be interesting to see how China’s semiconductor industry buildup impacts this historical foundry leading indicator’s performance.

Walt Custer Chart 4

Passive Component Shortages and Price Increases

Passive component availability and pricing are currently major issues. Per Chart 5, Quarter 1 2018 passive component revenues increased almost 25 percent over the same period last year. Inadequate component supplies are hampering many board assemblers with no short-term relief in sight.

Walt Custer Chart 5

Peeking into the Future

Looking forward, the global purchasing managers index (a broad leading indicator) has moderated but is still well in growth territory.

Walt Custer Chart 6

The world business outlook remains positive but requires continuous watching!

Walt Custer of Custer Consulting Group is an  analyst focused on the global electronics industry.

Originally published on the SEMI blog.

By Jay Chittooran

Jonathan Davis 3Testifying before a U.S. interagency panel weighing trade tariffs against China, a representative from the semiconductor manufacturing industry yesterday called for the removal of more than 100 products from the list of proposed tariffs, stressing that an escalation of the U.S.-Sino dispute could trigger a full-blown trade war and hasten deep, unintended damage including higher consumer prices, an expanded U.S. trade deficit, and a slowdown in U.S. economic growth.

Jonathan Davis, global vice president of industry advocacy at SEMI, the global association representing the electronics manufacturing supply chain, threw the industry’s weight behind protections for valuable intellectual property. But Davis argued that “if implemented as proposed, these tariffs will potentially cost tens of millions annually in additional taxes and lost revenue owing to reduced exports, threaten thousands of high-paying U.S. jobs, and not solve U.S. concerns with China.” Davis said the undue harm will ultimately undercut the ability of U.S. chipmakers to sell overseas, stifling innovation and curbing U.S. technological leadership.

In testimony at the hearing before the government panel that included representatives from the U.S. Trade Representative (USTR), Departments of Treasury, Commerce, State and Defense, and the Council of Economic Advisers, Davis explained that more than 100 lines – products defined for the purpose of setting import duties – of the proposed tariffs would hamstring the semiconductor supply chain. The tariff lines include fundamental components of the semiconductor manufacturing process that are oxygen for the chip industry. As part of his testimony, Davis also submitted comments on the impact of the tariffs.

Charles Gray, general counsel at Teradyne, who also testified at the hearing, explained that the tariffs will threaten growth while penalizing U.S. companies with supply chains that touch China. Gray and Davis were among more than 100 industry leaders who provided more than 3,000 comments in the May 15-17 hearing to evaluate the impact and efficacy of the proposed tariffs.

The hearing followed the Trump administration’s heated, longstanding criticism of China for what it considers unfair trade practices, focusing specifically on intellectual property violations. In recent months, the administration has begun implementing trade actions against China that will increase tariffs, restrict cross-border investment, and introduce significant uncertainty for U.S. businesses.

The Section 301 investigation that determined China’s forced transfer of technology and intellectual property discriminated against U.S. firms prompted a proposed 25 percent tariff on $50 billion in U.S. imports from China – a punitive measure that would squarely hit the semiconductor manufacturing industry.

SEMI continues to educate policymakers on the deep damage tariffs would exact on the long-term health of the semiconductor industry and the critical importance of balanced trade to the future of the semiconductor industry.

For more information on trade or how to participate in SEMI’s public policy program, please contact Jay Chittooran, SEMI public policy manager, at [email protected].