Category Archives: Semiconductors

Spin Transfer Technologies, Inc., the developer of advanced STT-MRAM for embedded SRAM and stand-alone DRAM applications, today announced results of its unique Precessional Spin Current (PSC™) structure. The results from advanced testing of the PSC structure confirm that it will increase the spin-torque efficiency of any MRAM device by 40-70 percent — enabling dramatically higher data retention while consuming less power. This gain translates to retention times lengthening by a factor of over 10,000 (e.g., 1 hour retention becomes more than 1 year retention) while reducing write current. Improved efficiency is critical for enabling MRAM to replace SRAM and DRAM in mobile, datacenter and AI applications, as well as for improving retention and performance in high-temperature automotive applications. The company reported these results at the prestigious Intermag 2018 Conference.

Spin-torque efficiency is one of the core performance metrics of the pMTJ (perpendicular magnetic tunnel junction — the “bit” that stores the memory state in an MRAM memory) and is defined by the ratio between the thermal retention barrier, measuring how long data can be reliably stored in the memory, and the switching current necessary to change the value of the bit. In previous MRAM implementations, increasing the energy barrier to increase retention would require a proportional increase in write current — leading to higher power consumption and much faster wear-out of the pMTJ devices (lower endurance). The PSC structure is a breakthrough because it effectively decouples the static energy barrier that determines retention from the dynamic switching processes that govern the switching current. As a result, when the PSC structure is added to any pMTJ, benefits include:

  • A higher energy barrier when the pMTJ does not have current flowing through it, which is ideal for retaining data for long periods
  • An increased spin polarization when current is flowing and the device is writing a new state, which is ideal for minimizing switching current and extending the life of the device by many orders of magnitude

The PSC structure was designed from the outset to be modular and fabricated with any pMTJ — either the company’s own pMTJs, or a pMTJ from other sources. The PSC structure is fabricated during the pMTJ deposition process and adds approximately 4nm to the height of the pMTJ stack. The structure is compatible with a wide range of standard MRAM manufacturing processes, materials and tool sets — enabling any foundry to readily incorporate the PSC structure into existing pMTJ stacks without adding significant complexity or manufacturing costs.

“MRAM is attracting a lot of attention as an embedded memory for ASICs and MCUs, but issues of write current and data retention have caused concern,” said Jim Handy, general director of Objective Analysis. “Spin Transfer Technologies’ new PSC structure shows a lot of promise to solve a number of those issues and pave the path for MRAM to take a significant share of the embedded memory market.”

Spin Transfer Technologies’ testing of the PSC structure involved comparing the performance of the same pMTJ devices with and without PSC for a large number of devices within CMOS test chip arrays at various temperatures and device diameters. The tests exhibited a robust performance advantage due to the PSC structure, both during writing of the low-resistance (“0”) and the high-resistance (“1”) memory states. Some specific examples of the advantages that the data have shown are as follows:

  • Increase of the spin-torque efficiency by up to 70 percent
  • Demonstration of the efficiency gain across a range of sizes (40-60nm) and temperatures (30°C to 125°C)
  • Increase of the thermal energy barriers by 50 percent corresponding to an increase in data retention time of greater than four orders of magnitude while reducing the switching current
  • Reduction of read disturb error rate up to five orders of magnitude

These advantages have come without degradation to other performance parameters. The data for the PSC structure indicate significant potential for enabling high-speed applications as well as high-temperature automotive and other applications. Furthermore, since the data shows that the PSC structure’s efficiency gains actually increase as the pMTJ get smaller, the PSC structure opens new pathways to achieving embedded SRAMs in the latest 7nm and 5nm generations.

“There is a huge demand for a memory with the endurance of SRAM, but with higher density, lower operating power and with non-volatility. We believe the improvements the PSC structure brings to STT-MRAM technology will make it a highly attractive alternative to SRAM for these reasons,” said Mustafa Pinarbasi, CTO and SVP of Magnetics Technology at Spin Transfer Technologies. “We are excited to enable the next generation of STT-MRAM and to shake up the status quo of the memory industry through our innovation.”

In even the most fuel-efficient cars, about 60 percent of the total energy of gasoline is lost through heat in the exhaust pipe and radiator. To combat this, researchers are developing new thermoelectic materials that can convert heat into electricity. These semiconducting materials could recirculate electricity back into the vehicle and improve fuel efficiency by up to 5 percent.

The challenge is, current thermoelectric materials for waste heat recovery are very expensive and time consuming to develop. One of the state of the art materials, made from a combination of hafnium and zirconium (elements most commonly used in nuclear reactors), took 15 years from its initial discovery to optimized performance.

Now, researchers from the Harvard John A. Paulson School of Engineering and Applied Sciences (SEAS) have developed an algorithm that can discover and optimize these materials in a matter of months, relying on solving quantum mechanical equations, without any experimental input.

“These thermoelectric systems are very complicated,” said Boris Kozinsky, a recently appointed Associate Professor of Computational Materials Science at SEAS and senior author of the paper. “Semiconducting materials need to have very specific properties to work in this system, including high electrical conductivity, high thermopower, and low thermal conductivity, so that all that heat gets converted into electricity. Our goal was to find a new material that satisfies all the important properties for thermoelectric conversion while at the same time being stable and cheap.”

Kozinsky co-authored the research with Georgy Samsonidze, a research engineer at the Robert Bosch Research and Technology Center in Cambridge, MA, where both authors conducted most of the research.

In order to find such a material, the team developed an algorithm that can predict electronic transport properties of a material based only on the chemical elements used in the crystalline crystal. The key was to simplify the computational approach for electron-phonon scattering and to speed it up by about 10,000 times, compared to existing algorithms.

The new method and computational screening results are published in Advanced Energy Materials.

Using the improved algorithm, the researchers screened many possible crystal structures, including structures that had never been synthesized before. From those, Kozinsky and Samsonidze whittled the list down to several interesting candidates. Of those candidates, the researchers did further computational optimization and sent the top performers to the experimental team.

In an earlier effort experimentalists synthesized the top candidates suggested by these computations and found a material that was as efficient and as stable as previous thermoelectric materials but 10 times cheaper. The total time from initial screening to working devices: 15 months.

“We did in 15 months of computation and experimentation what took 15 years for previous materials to be optimized,” said Kozinsky. “What’s really exciting is that we’re probably not fully understanding the extent of the simplification yet. We could potentially make this method even faster and cheaper.”

Kozinsky said he hopes to improve the new methodology and use it to explore electronic transport in a wider class of new exotic materials such as topological insulators.

Intel today announced that Jim Keller will join Intel as a senior vice president. He will lead the company’s silicon engineering, which encompasses system-on-chip (SoC) development and integration.

“Jim is one of the most respected microarchitecture design visionaries in the industry, and the latest example of top technical talent to join Intel,” said Dr. Murthy Renduchintala, Intel’s chief engineering officer and group president of the Technology, Systems Architecture & Client Group (TSCG). “We have embarked on exciting initiatives to fundamentally change the way we build the silicon as we enter the world of heterogeneous process and architectures. Jim joining us will help accelerate this transformation.”

Keller brings to Intel more than 20 years of experience in x86 and ARM-based microarchitecture design across a broad range of platforms, including PCs, servers, mobile devices and cars.

“I had a great experience working at Tesla, learned a lot, and look forward to all the great technology coming from Tesla in the future. My lifelong passion has been developing the world’s best silicon products,” Keller said. “The world will be a very different place in the next decade as a result of where computing is headed. I am excited to join the Intel team to build the future of CPUs, GPUs, accelerators and other products for the data-centric computing era.”

Keller, 59, joins Intel from Tesla, where he most recently served as vice president of Autopilot and Low Voltage Hardware. Prior to Tesla, he served as corporate vice president and chief cores architect at AMD, where he led the development of the Zen* architecture. Previously, Keller was vice president of Engineering and chief architect at P.A. Semi, which was acquired by Apple Inc. in 2008. He led Apple’s custom low-power mobile chip efforts with the original A4 processor that powered the iPhone 4*, as well as the subsequent A5 processor.

He will officially start in his new role at Intel on April 30.

Technavio’s latest market research report on the global lithography systems market provides an analysis of the most important trends expected to impact the market outlook from 2018-2022. Technavio defines an emerging trend as a factor that has the potential to significantly impact the market and contribute to its growth or decline.

According to Technavio market research analysts, the CAGR for the global lithography systems market is projected to be over 5% during the forecast period. However, the growth momentum of the market is expected to decelerate due to a decrease in the year-over-year growth.

One of the major drivers for the growth of the global lithography systems market is the increasing investments toward construction of new fabs and expanding older facilities. Growing investments in autonomous technologies (for cars) and increasing interest in robotics is creating a demand for semiconductor chips, which form a core component for the working of these devices. To meet this production of ICs, there will be an increasing demand for more number of fabs.

In this report, Technavio highlights the increasing sizes of wafers as one of the key emerging trends driving the global lithography systems market:

Increasing sizes of wafers

Increasing investments toward introducing a 400-mm wafer size is a major trend. A 450-mm wafer (18 inches) will have a larger surface area, which indicates that a high number of chips can be produced, at low manufacturing costs. Increasing the size of wafers reduces the manufacturing costs by almost 30%. Firms are showing an increasing interest in the production of 450-mm sized wafers. For example, Intel has invested in R&D for 450 mm and is building a production facility for the same.

According to a senior analyst at semiconductor equipment research, “One of the major undertakings to develop 450-mm wafers is the G450C, a consortium that includes major firms such as IBM, Intel, TSMC, Samsung, and GLOBALFOUNDRIES. The consortium aims to develop the 450-mm wafer and manufacture the required equipment to process 450-mm wafers.”

Technavio’s sample reports are free of charge and contain multiple sections of the report such as the market size and forecast, drivers, challenges, trends, and more.

Global lithography systems market segmentation

This market research report segments the global lithography systems market by technology (ArF immersion lithography systems, EUV lithography systems, KrF lithography systems, ArF dry lithography systems, and i-line lithography systems), by end-user (IDMs and pureplay foundries), and key regions (the Americas, APAC, and EMEA).

The IDMs segment dominated the market in 2017, accounting for a share of over 68%, followed by the pureplay foundries segment. Firms that have dedicated logic and dedicated memory foundries are considered under this segment. Memory chips such as DRAM and NAND chips are made in dedicated memory chip factories, while logic chips process information in electronic devices.

APAC dominated the global lithography systems market in 2017, accounting for a share of close to 71%, followed by the Americas and EMEA. APAC is expected to witness an increase of close to 1% in its market share while the other two regions are expected to witness a decline by 2022.

The ability to harness light into an intense beam of monochromatic radiation in a laser has revolutionized the way we live and work for more than fifty years. Among its many applications are ultrafast and high-capacity data communications, manufacturing, surgery, barcode scanners, printers, self-driving technology and spectacular laser light displays. Lasers also find a home in atomic and molecular spectroscopy used in various branches of science as well as for the detection and analysis of a wide range of chemicals and biomolecules.

Lasers can be categorized based on their emission wavelength within the electromagnetic spectrum, of which visible light lasers — such as those in laser pointers — are only one small part. Infrared lasers are used for optical communications through fibers. Ultraviolet lasers are used for eye surgery. And then there are terahertz lasers, which are the subject of investigation at the research group of Sushil Kumar, an associate professor of Electrical and Computer Engineering at Lehigh University.

Left to right: Research contributors and Lehigh electrical and computer engineering graduate students Ji Chen, Liang Gao and Yuan Jin stand in the Terahertz Photonics laboratory of Sushil Kumar in the Sinclair Building at Lehigh University. Credit: Sushil Kumar, Lehigh University

Left to right: Research contributors and Lehigh electrical and computer engineering graduate students Ji Chen, Liang Gao and Yuan Jin stand in the Terahertz Photonics laboratory of Sushil Kumar in the Sinclair Building at Lehigh University. Credit: Sushil Kumar, Lehigh University

Terahertz lasers emit radiation that sits between microwaves and infrared light along the electromagnetic spectrum. Their radiation can penetrate common packaging materials such as plastics, fabrics and cardboard, and are also remarkably effective in optical sensing and analysis of a wide variety of chemicals. These lasers have the potential for use in non-destructive screening and detection of packaged explosives and illicit drugs, evaluation of pharmaceutical compounds, screening for skin cancer and even the study of star and galaxy formation.

Applications such as optical spectroscopy require the laser to emit radiation at a precise wavelength, which is most commonly achieved by implementing a technique known as “distributed-feedback.” Such devices are called single-mode lasers. Requiring single-mode operation is especially important for terahertz lasers, since their most important applications will be in terahertz spectroscopy. Terahertz lasers are still in a developmental phase and researchers around the world are trying to improve their performance characteristics to meet the conditions that would make them commercially viable.

As it propagates, terahertz radiation is absorbed by atmospheric humidity. Therefore, a key requirement for such lasers is an intense beam such that it could be used for optical sensing and analysis of substances kept at a standoff distance of several meters or more, and not be absorbed. To this end, Kumar’s research team is focused on improving their intensity and brightness, achievable in part by increasing optical power output.

In a recent paper published in the journal Nature Communications, the Lehigh team — supervised by Kumar in collaboration with Sandia National Laboratories — reported on a simple yet effective technique to enhance the power output of single-mode lasers that are “surface-emitting” (as opposed to those using an “edge-emitting” configuration). Of the two types, the surface-emitting configuration for semiconductor lasers offers distinctive advantages in how the lasers could be miniaturized, packaged and tested for commercial production.

The published research describes a new technique by which a specific type of periodicity is introduced in the laser’s optical cavity, allowing it to fundamentally radiate a good quality beam with increased radiation efficiency, thus making the laser more powerful. The authors call their scheme as having a “hybrid second- and fourth-order Bragg grating” (as opposed to a second-order Bragg grating for the typical surface-emitting laser, variations of which have been used in a wide variety of lasers for close to three decades). The authors claim that their hybrid grating scheme is not limited to terahertz lasers and could potentially improve performance of a broad class of surface-emitting semiconductor lasers that emit at different wavelengths.

The report discusses experimental results for a monolithic single-mode terahertz laser with a power output of 170 milliwatts, which is the most powerful to date for such class of lasers. The research shows conclusively that the so-called hybrid grating is able to make the laser emit at a specific desired wavelength through a simple alteration in the periodicity of imprinted grating in the laser’s cavity while maintaining its beam quality. Kumar maintains that power levels of one watt and above should be achievable with future modifications of their technique — which might just be the threshold needed to be overcome for industry to take notice and step into potential commercialization of terahertz laser-based instruments.

 

Samsung Electronics Co., Ltd. today announced that it has begun mass producing 10-nanometer (nm)-class* 16-gigabit (Gb) LPDDR4X DRAM for automobiles. The latest LPDDR4X features high performance and energy efficiency while significantly raising the thermal endurance level for automotive applications that often need to operate in extreme environments. The 10nm-class DRAM will also enable the industry’s fastest automotive DRAM-based LPDDR4X interface with the highest density.

“The 16Gb LPDDR4X DRAM is our most advanced automotive solution yet, offering global automakers outstanding reliability, endurance, speed, capacity and energy efficiency,” said Sewon Chun, senior vice president of memory marketing at Samsung Electronics. “Samsung will continue to closely collaborate with manufacturers developing diverse automotive systems, in delivering premium memory solutions anywhere.”

Moving a step beyond its 20nm-class ‘Automotive Grade 2’ DRAM, which can withstand temperatures from -40°C to 105°C, Samsung’s 16Gb LPDDR4X is Automotive Grade 1-compliant, raising the high-end threshold to 125°C. By more than satisfying the rigorous on-system thermal cycling tests of global auto manufacturers, the 16Gb LPDDR4X has enhanced its reliability for a wide variety of automotive applications in many of the world’s most challenging environments.

Adding to the degree of reliability under high temperatures, production at an advanced 10nm-class node is key to enabling the 16Gb LPDDR4X to deliver its leading-edge performance and power efficiency. Even in environments with extremely high temperatures of up to 125°C, its data processing speed comes in at 4,266 megabits per second (Mbps), a 14 percent increase from the 8Gb LPDDR4 DRAM that is based on 20nm process technology, and the new memory also registers a 30 percent increase in power efficiency.

Along with a 256 gigabyte (GB) embedded Universal Flash Storage (eUFS) drive announced in February, Samsung has expanded its advanced memory solution lineup for future automotive applications with the 10nm-class 16Gb LPDDR4X DRAM, commercially available in 12Gb, 16Gb, 24Gb and 32Gb capacities. While extending its 10nm-class DRAM offerings, the company also plans on bolstering technology partnerships for automotive solutions that include vision ADAS (Advanced Driver Assistance Systems), autonomous driving, infotainment systems and gateways.

Siemens Corporation today announced that Barbara Humpton has been appointed CEO for the United States, effective June 1, 2018. Humpton (57) is currently CEO of Siemens Government Technologies, Inc. (SGT), a Federally-compliant U.S. organization structured to help address national imperatives in energy, infrastructure, automation and marine platforms.

“Barbara has broad knowledge of Siemens’ entire portfolio that will serve us well as we continue to grow the U.S. business,” said Lisa Davis, CEO of Siemens Corporation and Americas Region and Member of the Siemens AG Managing Board.

Humpton joined Siemens Government Technologies in 2011 as Senior Vice President for Business Development and was appointed to lead the company’s approach to the federal market in 2015. Prior to joining Siemens, Humpton held senior leadership positions at Lockheed Martin and Booz Allen Hamilton, where she was a Vice President at both firms.

“I am honored to work with the 50,000 Siemens employees in the U.S. to address the market’s needs in electrification, automation and digitalization. It’s an exciting time to be at Siemens as we develop products and services that are shaping the future,” said Humpton.

Siemens has been in the U.S. for more than 160 years and has invested $35 billion in America in the last 15 years alone. With 50,000 U.S. employees and more than 60 manufacturing sites, Siemens in the U.S. is using its global leadership in engineering and technology innovation to meet America’s toughest challenges, delivering solutions for industry, hospitals, utilities, cities, and manufacturers: from efficient power generation, to digital factories and oil and gas fields, to medical diagnostics, to locomotives, to next-generation software used in every phase of product development.

To receive expert insights sign up for Siemens’ U.S. Executive Pulse leadership blog. Follow Siemens USA on Facebook and Twitter.

Siemens AG (Berlin and Munich) is a global technology powerhouse that has stood for engineering excellence, innovation, quality, reliability and internationality for 170 years.

Japanese researchers have developed a new method to build large areas of semiconductive material that is just two molecules thick and a total of 4.4 nanometers tall. The films function as thin film transistors, and have potential future applications in flexible electronics or chemical detectors. These thin film transistors are the first example of semiconductive single molecular bilayers created with liquid solution processing, a standard manufacturing process that minimizes costs.

Top surface view of 3-D computer model (left) and Atomic Force Microscopy image (right) of the new film made by University of Tokyo scientists. The well-organized structure of the molecules is visible in both the 3-D computer model and microscope image as a herringbone or cross-hair pattern. The color differences in the microscopy image are a result of the different lengths of the molecules' tails; the length differences cause the geometric frustration that prevents layers from stacking. pm = picometers, nm = nanometers. Credit: Shunto Arai and Tatsuo Hasegawa

Top surface view of 3-D computer model (left) and Atomic Force Microscopy image (right) of the new film made by University of Tokyo scientists. The well-organized structure of the molecules is visible in both the 3-D computer model and microscope image as a herringbone or cross-hair pattern. The color differences in the microscopy image are a result of the different lengths of the molecules’ tails; the length differences cause the geometric frustration that prevents layers from stacking. pm = picometers, nm = nanometers. Credit: Shunto Arai and Tatsuo Hasegawa

“We want to give electronic devices the features of real cell membranes: flexible, strong, sensitive, and super thin. We found a novel way to design semiconductive single molecular bilayers that allows us to manufacture large surface areas, up to 100 square centimeters (39 square inches). They can function as high performance thin film transistors and could have many applications in the future,” said Assistant Professor Shunto Arai, the first author on the recent research publication.

Professor Tatsuo Hasegawa of the University of Tokyo Department of Applied Physics led the team that built the new film. The breakthrough responsible for their success is a concept called geometric frustration, which uses a molecular shape that makes it difficult for molecules to settle in multiple layers on top of each other.

The film is transparent, but the forces of attraction and repulsion between the molecules create an organized, repeated herringbone pattern when the film is viewed from above through a microscope. The overall molecular structure of the bilayer is highly stable. Researchers believe it should be possible to build the same structure out of different molecules with different functionalities.

The individual molecules used in the current film are divided into two regions: a head and a tail. The head of one molecule stacks on top of another, with their tails pointing in opposite directions so the molecules form a vertical line. These two molecules are surrounded by identical head-to-head pairs of molecules, which all together form a sandwich called a molecular bilayer.

Researchers discovered they could prevent additional bilayers from stacking on top by building the bilayer out of molecules with different length tails, so the surfaces of the bilayer are rough and naturally discourage stacking. This effect of different lengths is referred to as geometric frustration.

Standard methods of creating semiconductive molecular bilayers cannot control the thickness without causing cracks or an irregular surface. The geometric frustration of different length tails has allowed researchers to avoid these pitfalls and build a 10cm by 10cm (3.9 inches by 3.9 inches) square of their film using the common industrial method of solution processing.

The semiconductive properties of the bilayer may give the films applications in flexible electronics or chemical detection.

Semiconductors are able to switch between states that allow electricity to flow (conductors) and states that prevent electricity from flowing (insulators). This on-off switching is what allows transistors to quickly change displayed images, such as a picture on an LCD screen. The single molecular bilayer created by the UTokyo team is much faster than amorphous silicon thin film transistors, a common type of semiconductor currently used in electronics.

The team will continue to investigate the properties of geometrically frustrated single molecular bilayers and potential applications for chemical detection. Collaborators based at the National Institute of Advanced Industrial Science and Technology, the Nippon Kayaku Company Limited, Condensed Matter Research Center, and High Energy Accelerator Research Organization also contributed to the research.

Cheap, flexible and sustainable plastic semiconductors will soon be a reality thanks to a breakthrough by chemists at the University of Waterloo.

Professor Derek Schipper and his team at Waterloo have developed a way to make conjugated polymers, plastics that conduct electricity like metals, using a simple dehydration reaction the only byproduct of which is water.

“Nature has been using this reaction for billions of years and industry more than a hundred,” said Schipper, a professor of Chemistry and a Canada Research Chair in Organic Material Synthesis. “It’s one of the cheapest and most environmentally friendly reactions for producing plastics.”

Schipper and his team have successfully applied this reaction to create poly(hetero)arenes, one of the most studied classes of conjugated polymers which have been used to make lightweight, low- cost electronics such as solar cells, LED displays, and chemical and biochemical sensors.

Dehydration is a common method to make polymers, a chain of repeating molecules or monomers that link up like a train. Nature uses the dehydration reaction to make complex sugars from glucose, as well as proteins and other biological building blocks such as cellulose. Plastics manufacturers use it to make everything from nylon to polyester, cheaply and in mind-boggling bulk.

“Synthesis has been a long-standing problem in this field,” said Schipper. “A dehydration method such as ours will streamline the entire process from discovery of new derivatives to commercial product development. Better still, the reaction proceeds relatively fast and at room temperature.”

Conjugated polymers were first discovered by Alan Heeger, Alan McDonald, and Hideki Shirakawa in the late 1970s, eventually earning them the Nobel Prize in Chemistry in 2000.

Researchers and engineers quickly discovered several new polymer classes with plenty of commercial applications, including a semiconducting version of the material; but progress has stalled in reaching markets in large part because conjugated polymers are so hard to make. The multi-step reactions often involve expensive catalysts and produce environmentally harmful waste products.

Schipper and his team are continuing to perfect the technique while also working on developing dehydration synthesis methods for other classes of conjugated polymers. The results of their research so far appeared recently in the journal Chemistry – A European Journal.

 

Research included in the recently released 50-page April Update to the 2018 edition of IC Insights’ McClean Report shows that in 2017, the top eight major foundry leaders (i.e., sales of ≥$1.0 billion) held 88% of the $62.3 billion worldwide foundry market (Figure 1).  The 2017 share was the same level as in 2016 and one point higher than the share the top eight foundries represented in 2015.  With the barriers to entry (e.g., fab costs, access to leading edge technology, etc.) into the foundry business being so high and rising, IC Insights expects this “major” marketshare figure to remain at or near this elevated level in the future.

TSMC, by far, was the leader with $32.2 billion in sales last year.  In fact, TSMC’s 2017 sales were over 5x that of second-ranked GlobalFoundries and more than 10x the sales of the fifth-ranked foundry SMIC.

Figure 1

Figure 1

China-based Huahong Group, which includes Huahong Grace and Shanghai Huali, displayed the highest growth rate of the major foundries last year with an 18% jump.  Overall, 2017 was a good year for many of the major foundries with four of the eight registering double-digit sales increases.

Of the eight major foundries, six of them are headquartered in the Asia-Pacific region. As shown, Samsung was the only IDM foundry in the ranking.  IBM, a former major IDM foundry, was acquired by GlobalFoundries in mid-2015 while IDM foundries Fujitsu and Intel fell short of the $1.0 billion sales threshold last year. Although growing only 4% last year, Samsung easily remained the largest IDM foundry in 2017, with over 5x the foundry sales of Fujitsu, the second-largest IDM foundry.