Category Archives: Semiconductors

The GaN power business was worth about US$12 million in 2016, but at Yole, analysts project that the market will reach US$460 million by 2022, with an impressive 79% CAGR. Amongst the numerous applications, the market research company mentions Lidar, wireless power and envelope tracking. They are high-end low/medium voltage applications. Today GaN technology is the only existing solution to meet their specific requirements.

“The GaN power market remains small compared to the US$30 billion silicon power semiconductor market,” said Dr. Hong Lin, Technology & Market Analyst at Yole Développement (Yole). “However, it has an enormous potential in the short term due to its suitability for high performance and high frequency solutions.”

Although today only a few players are showing commercial GaN activities, many firms have GaN activities. Therefore, the power GaN supply chain prepares for production. During the 2016-2017 period, Yole’s analysts identified lot of investments that are clearly supporting development and implementation of GaN devices.

Yole differentiates GaN power supply chain into two main models: IDM and foundry. Both models will co-exist while there are different needs on the market, for example in consumer and industrial applications, explain Yole’s analysts in the Power GaN report (1).

GaN manufacturers continue developing new products and provide samples to costumers, as is the case with EPC and its wireless charging line. Indeed EPC is still the current market leader today. Other players including GaN systems sell also low voltage GaN transistors.

System Plus Consulting, part of Yole Group of Companies, reveals a detailed comparison of GaN-on-Silicon transistors in its new report, GaN-on-Silicon Transistor Comparison. The company analyzes the existing GaN-on-Silicon offers. This overview is the state of the art of GaN-on-Silicon HEMT. Indeed it highlights the differences between the design and manufacturing processes, the impacts at epitaxy, device and packaging level and related production costs. Devices analyzed by System Plus Consulting have been developed by the leading companies: EPC, Texas Instruments, Panasonic, GaN Systems and Transphorm.

“The current GaN device market is mainly dominated by devices <200V. 600V devices are expected to take off and keep growing. But the <200V market share will increase again when GaN begins to replace MOSFETs in different applications and enables new applications,” comments Dr. Elena Barbarini, Project Manager, Power Electronics and Compound Semiconductors at System Plus Consulting. And she adds: “GaN-on-Silicon has been a promising solution since the very beginning as its potential of CMOS compatibility and reduced cost”.

Both companies Yole and System Plus Consulting will attend a selection of key conferences during the next months.

At CS International, Dr. Hong Lin will present the latest results focused on the GaN industry. She will describe the GaN-on-Silicon landscape including power electronics, RF and lighting market segments. “GaN on Si Market and industry development” presentation will take place on April 10 at 3:35 PM. During the conference, Yole also proposes another presentation focused on the microLED technologies.

Technavio market research analysts forecast the global carbon nanotubes market to grow at a CAGR of more than 20% during the period 2018-2022, according to their latest report.

This market research report segments the global carbon nanotubes market into the following applications (chemicals, plastics, and composites, electronics; and energy, battery, and capacitors), products (single-walled carbon nanotubes and multi-walled carbon nanotubes) and key regions (the Americas, APAC, and EMEA).

In this report, Technavio analysts highlight the miniaturization of semiconductor components as a key factor contributing to the growth of the global carbon nanotubes market:

Miniaturization of semiconductor components

The focus on the production of miniaturized components is one of the biggest drivers for the market. There has been strong growth in miniaturized components as they are used in many consumer electronic devices. Miniaturization continues to be the key trend that is driving the electronics industry. Components are designed to nano-sized physical dimensions, which enables more number of surface mount devices (SMDs) to be placed on a printed circuit board (PCB). Therefore, the bulkiness of a PCB is reduced with more functionalities being added. Several components can be placed on a PCB with the help of miniaturization. Miniaturization can be seen in various devices, from mobile phones, computers, car engines, and even phone adapters. However, with the decrease in feature size, the dimensional tolerance and diversity must be maintained. This will impact the materials that are required for fabrication purposes.

According to a senior analyst at Technavio for semiconductor equipment, “For example, PCBs are required to support micro-components and will have to have the ability to support many components without breakage. An optimal design on the PCB needs to be stenciled, and placement of the component is done as per the stencil. The need to pack a higher component density in a PCB assembly is being fueled by the increasing demand for miniaturization of components.”

Technavio’s sample reports are free of charge and contain multiple sections of the report such as the market size and forecast, drivers, challenges, trends, and more.

Global carbon nanotubes market segmentation

Of the three major applications, the chemicals, plastics, and composites segment held the largest market share in 2017, accounting for nearly 56% of the global carbon nanotubes market.

Of the two major products, the multi-walled carbon nanotubes segment held the largest market share in 2017, accounting for nearly 88% of the market. The market share for this product is expected to decrease nearly 13% by 2022. The fastest growing product is single-walled carbon nanotubes, which will account for nearly 25% of the total market share by 2022.

Looking for more information on this market? Request a free sample report

By Jamie Girard, Sr. Director, Public Policy, SEMI

Although many months past due, Congress on March 23 finalized the federal spending for the remainder of fiscal year (FY) 2018, only hours before a what would have been the third government shutdown of the year. Congressional spending has been allocated in fits and starts since the end of FY 2017 last September, with patchwork deals keeping things running amid pervasive uncertainty. While this clearly isn’t an ideal way to fund the federal government, the end result will make many in the business of research and development pleased with the addition of more resources for science and innovation.

There was grave concern over the future of federal spending with the release of the president’s FY 2018 budget, which would have cut the National Science Foundation (NSF) budget by 11 percent and National Institutes of Standards & Technology (NIST) spending by 30 percent. Relief came with early drafts from Congress that whittled those cuts down to between 2-9 percent. But the real boost was a February bipartisan Congressional agreement that lifted self-imposed spending caps and introduced a generous dose of non-defense discretionary spending, increasing NSF spending 3.9 percent over the previous year and the NIST budget an astounding 25.9 percent over FY 2017 levels.

SEMI applauds this much-needed support for basic research and development (R&D) at these agencies after their budgets were cut or flat-funded for multiple cycles. It is well understood that federal R&D funding is critical to U.S. competitiveness and future economic prosperity. With the stakes that high, full funding of R&D programs at the NSF and NIST should be a bipartisan national priority backed by a strong and united community of stakeholders and advocates in the business, professional, research, and education communities.

With the work for FY 2018 completed, Congress will now turn to FY 2019 spending – already behind schedule due to the belated completion of the previous year’s budget. With 2018 an election year, Congress will likely begin work on the FY 2019 budget in short order, but probably won’t complete its work prior to the November elections.  SEMI will continue to work with lawmakers to support the R&D budgets at the agencies and their important basic science research. If you’d like to know how you can be more involved with SEMI’s public policy work, please contact Jamie Girard, Sr. Director, Public Policy at [email protected].

Today, research and innovation hub in nanoelectronics and digital technologies imec, and fabless technology innovator Qromis, have announced the development of high performance enhancement mode p-GaN power devices on 200mm engineered Coefficient of Thermal Expansion (CTE)-matched substrates, processed in imec’s silicon pilot line. The substrates are offered by Qromis as commercial 200mm QST® substrates as part of their patented product portfolio. The results will be presented at next week’s CS international Conference (April 10-11, Brussels, Belgium).

Today, GaN-on-Si technology is the industry standard platform for commercial GaN power switching devices for wafer diameters up to 150mm/6 inch.  Imec has pioneered the development of GaN-on-Si power technology for 200mm/8 inch wafers and qualified enhancement mode HEMT and Schottky diode power devices for 100V, 200V and 650V operating voltage ranges, paving the way to high volume manufacturing applications. However, for applications beyond 650V such as electric cars and renewable energy, it has become difficult to further increase the buffer thickness on 200mm wafers to the levels required for higher breakdown and low leakage levels, because of the mismatch in coefficient of thermal expansion (CTE) between the GaN/AlGaN epitaxial layers and the silicon substrate.  One can envisage to use thicker Si substrates to keep wafer warp and bow under control for 900V and 1200V applications, but practice has learned that for these higher voltage ranges, the mechanical strength is a concern in high volume manufacturing, and the ever thicker wafers can cause compatibility issues in wafer handling in some processing tools.

Carefully engineered and CMOS fab-friendly QST® substrates with a CTE-matched core having a thermal expansion that very closely matches the thermal expansion of the GaN/AlGaN epitaxial layers, are paving the way to 900V-1200V buffers and beyond, on a standard semi-spec thickness 200mm substrate. Moreover, QST® substrates open perspectives for very thick GaN buffers, including realization of free-standing and very low dislocation density GaN substrates by >100 micron thick fast-growth epitaxial layers. These unique features will enable long awaited commercial vertical GaN power switches and rectifiers suitable for high voltage and high current applications presently dominated by Si IGBTs and SiC power FETs and diodes.

“QST® is revolutionizing GaN technologies and businesses for 200mm and 300mm platforms”, stated Cem Basceri, President and CEO of Qromis.  “I am very pleased to see the successful demonstration of high performance GaN power devices by stacking leading edge technologies from Qromis, imec and AIXTRON,” Basceri said.

In this specific collaboration, imec and Qromis developed enhancement mode p-GaN power device specific GaN epitaxial layers on 200mm QST®substrates, with buffers grown in AIXTRON’s G5+ C 200mm high volume manufacturing MOCVD system.

Imec then ported its p-GaN enhancement mode power device technology to the 200mm GaN-on- QST® substrates in their silicon pilotline and demonstrated high performance power devices with threshold voltage of 2.8 Volt.  “The engineered QST® substrates from Qromis facilitated a seamless porting of our process of reference from thick GaN-on-Si substrates to standard thickness GaN-on- QST® substrates using the AIX G5+ C system, in a joint effort of imec, Qromis and AIXTRON,” stated Stefaan Decoutere, program director for GaN power technology at imec. The careful selection of the material for the core of the substrates, and the development of the light-blocking wrapping layers resulted in fab-compatible standard thickness substrates and first-time-right processing of the power devices.

quormis

A further step has been taken along the road to manufacturing solar cells from lead-free perovskites. High quality films based on double perovskites, which show promising photovoltaic properties, have been developed in collaboration between Linköping University, Sweden, and Nanyang Technological University in Singapore.

The lead-free double perovskite solar cells (yellow, in the front) compared with the lead-based device (dark, in the background). The next step is tune the color of the double perovskites into dark, so that they can absorb more light for efficient solar cells. Credit: Thor Balkhed

The lead-free double perovskite solar cells (yellow, in the front) compared with the lead-based device (dark, in the background). The next step is tune the color of the double perovskites into dark, so that they can absorb more light for efficient solar cells. Credit: Thor Balkhed

Research groups around the world have recognised the potential of perovskites as one of the most promising materials for the development of cheap, environmentally friendly and efficient solar cells. In just a few years, the power conversion efficiency has increased from a few percent to over 22%. The perovskites currently available for use in solar cells, however, contain lead, and Feng Gao, senior lecturer at LiU, was appointed in the autumn of 2017 as Wallenberg Academy Fellow to develop lead-free double perovskites, in which a monovalent metal and a trivalent metal replace the divalent lead.

In the laboratory at the Division of Biomolecular and Organic Electronics, LiU, postdoc researchers Weihua Ning and Feng Wang have successfully manufactured single-layer thin films of densely packed crystals of double perovskites. The films are of extremely high quality and can be used as the active layer in solar cells, in which sunlight is absorbed and charge carriers created.

“Our colleagues at Nanyang Technological University in Singapore have shown that the charge carriers demonstrate long diffusion lengths in the material, which is necessary if the material is to be appropriate for application in solar cells,” says Feng Gao.

The power conversion efficiency of the solar cells is still low – only around 1% of the energy in sunlight is converted to electricity – but neither Feng Gao or Weihua Ning are worried.

“No, we have taken the first major step and developed a method to manufacture the active layer. We have several good ideas of how to proceed to increase the efficiency in the near future,” says Feng Gao.

Weihua Ning nods in agreement.

Researchers have calculated that over 4,000 different combinations of materials can form double perovskites. They will also use theoretical calculations to identify the combinations that are most suitable for use in solar cells.

This breakthrough for research in double perovskites is also a result of the joint PhD programme in Materials- and nanoscience/technology at Linköping University and Nanyang Technological University.

“This publication is a spin-off of the discussions in relation to the joint PhD programme between NTU-LiU. Two PhD students, one on each side, have been recruited to work on this project. This is an excellent start for the program.” says Professor Tze Chien Sum from NTU.

“We complement each other very well, the group led by Professor Sum in NTU are experts in photophysics and we are experts in materials science and device physics,” says Feng Gao.

Tre results is published in the prestigious scientific journal Advanced Materials.

Plasma-Therm today announced that it has acquired KOBUS, a plasma deposition company, which enables F.A.S.T, a valuable alternative to ALD where thick and conformal films are required.

This unique deposition method is at the crossroads of ALD and CVD: F.A.S.T. stands for “Fast Atomic Sequential Technology.” F.A.S.T. is enabled by proprietary CVD reactor design combined with pulsing capability, and while capable of depositing in traditional ALD mode, it is optimal for thick and conformal layer deposition and offers new solutions for 3D integration challenges.

KOBUS offers a unique portfolio of equipment for both mature and advanced materials deposition, which merges well with Plasma-Therm’s operation, expanding the plasma-based deposition and etch suite of products for all silicon and compound semiconductor emerging applications.

This acquisition will allow Plasma-Therm to establish a solid base in Europe and conduct R&D development in the Grenoble “Silicon Valley,” a region fueled with R&D, startups and large semiconductor corporations.

Leti, a research institute of CEA Tech, today announced Leti’s silicon photonics process design kit (PDK) for photonic circuits is available in the Synopsys PhoeniX OptoDesigner suite.

Leti’s integrated silicon photonics platform has been developed for high-speed optical transceivers and highly-integrated optical interposer applications. The process design kit contains the design rules and building blocks for multi-project wafer and custom runs on Leti’s Si310 platform. It also includes a catalogue of components available at Leti, allowing Synopsys PhoeniX OptoDesigner customers to select the ones they need to build their circuits. Once the customers have a completed circuit design, Leti produces a proof of concept on a multi-project wafer run.

Used by more than 300 designers worldwide, OptoDesigner gives access to a complete set of passive components, such as grating couplers, silicon waveguides and transitions; and active components, such as high-speed Mach Zehnder modulators and high-speed germanium photodiodes based on Leti’s fab. It also includes physical verification tools checking whether the contributions meet the design rules defined by the fabrication constraints in Leti’s clean room.

“On the same mask, with this design kit, we are able to have photonic circuits performing various functions, according to the area of expertise of the different contributors,” said Andre Myko, responsible of MPW runs at Leti. “Fabless companies and academics therefore can realize substantial cost savings by ‘sharing’ production costs on multi-project wafer runs.”

Leti is a world leader in silicon photonics technology. Its photonic platform is France’s largest R&D center for the development, characterization and simulation of optoelectronic systems and components. Its activities range from component design through component fabrication, integration into systems and packaging.

“Leti’s process design kit available for Synopsys’ PhoeniX OptoDesigner is a licensed plug-in library of solutions that support multi-project wafers and custom runs provided by Leti,” said Niek Nijenhuis, global business development manager of Synopsys’ PhoeniX OptoDesigner products. “In addition to the photonic elements from the standard OptoDesigner library, Leti’s PDK contains technology-specific information like mask layer names, design rules, validated building blocks, die sizes and GDS file settings.”

Leti’s silicon photonics platform is also fully compatible with STMicroelectronics’ platform in Crolles, which enables fabless customers to take their new circuits to high-volume production.

SEMI, the global association representing the worldwide electronics manufacturing supply chain, today reported that worldwide sales of semiconductor manufacturing equipment totaled $56.6 billion in 2017, a year-over-year increase of 37 percent from 2016 sales of $41.24 billion. The data are available in the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) Report, now available from SEMI.

Korea claimed the largest market for new semiconductor equipment for the first time, shattering all previous regional spending records with $17.95 billion in equipment sales. Taiwan fell to the second position with sales of $11.49 billion. Annual spending rates increased for South Korea, Europe, China, Japan and North America. However, new equipment markets in Taiwan and Rest of World (primarily Southeast Asia) contracted.

Equipment sales to China increased 27 percent as the region maintained the third largest market position for the second year in a row. The 2017 equipment markets in Japan and North America held onto fourth and fifth places, respectively, while the Europe market rose in the rankings to the sixth spot. The global other front-end segment increased 40 percent; the wafer processing equipment market segment rose 39 percent; the assembly and packaging segment jumped 29 percent; and total test equipment sales increased 27 percent.

Compiled from data submitted by members of SEMI and the Semiconductor Equipment Association of Japan (SEAJ), the Worldwide SEMS Report is a summary of the monthly billings figures for the global semiconductor equipment industry. Categories cover wafer processing, assembly and packaging, test, and other front-end equipment. Other front-end includes mask/reticle manufacturing, wafer manufacturing, and fab facilities equipment.

Semiconductor Capital Equipment Market by World Region (2016-2017)
2017
2016
% Change
South Korea
17.95
7.69
133%
Taiwan
11.49
12.23
-6%
China
8.23
6.46
27%
Japan
6.49
4.63
40%
North America
5.59
4.49
24%
Europe
3.67
2.18
68%
Rest of World
3.20
3.55
-10%
Total
56.62
41.24
37%

Source: SEMI/SEAJ April 2018

Note: Summed subtotals may not equal the total due to rounding.

Kingston Digital, Inc., the Flash memory affiliate of Kingston Technology Company, Inc., a developer of memory products and technology solutions, today announced A1000 PCIe NVMe SSD. The M.2 drive is Kingston’s first entry-level consumer-grade PCIe NVMe SSD utilizing 3D NAND. A1000 delivers twice the performance of SATA at near SATA pricing.

The single-sided M.2 2280 (22mm x 80mm) form factor makes A1000 ideal for notebooks and systems with limited space. The PCIe NVMe drive features a Gen 3.0 x2 interface, 4-channel Phison 5008 controller, and 3D NAND Flash. It delivers 2x the performance of SATA SSDs with read/write speeds1 up to 1500MB/s and 1000MB/s giving it exceptional responsiveness and ultra-low latency.

“Kingston is excited to release its newest SSD for the entry-level PCIe NVMe market. Designed with 3D NAND Flash memory, A1000 is more reliable and durable than a hard drive, and doubles the performance of a SATA SSD. Now we can give consumers the benefit of PCIe performance at about the same price as SATA,” said Ariel Perez, SSD business manager, Kingston. “Consumers can replace a hard drive or slower SSD with A1000 and have the storage needed for applications, videos, photos and more.”

A1000 is available in 240GB, 480GB and 960GB2 capacities and is backed by a limited five-year warranty, free technical support and legendary Kingston reliability.

AKHAN Semiconductor, a technology company specializing in the fabrication and application of lab-grown, electronics-grade diamonds, announced today that it has obtained official notifications from both the United States Patent and Trademark Office (USPTO) and Taiwan Intellectual Property Office (TIPO) for the Miraj Diamond trademark registration and patent allowance.

The official registration of the Miraj Diamond mark by the USPTO (Registration No. 5,438,740) follows nearly six years of completed filings fulfilled by the Illinois-based technology company following its launch in December 2012. The TIPO issued patent I615943 is the second AKHAN patent to be granted by the country– well-known to be strategic in the global semiconductor marketplace. The patent is a foreign counterpart of other issued and pending patents owned by AKHAN Semiconductor, Inc. that are used in the company’s Miraj Diamond® products. The claims protect uses far beyond the existing applications, including microprocessor applications. Covering the base materials common to nearly all semiconductor components, the intellectual property can be realized in everything from diodes, transistors, and power inverters, to fully functioning diamond chips such as integrated circuitry.

“The official declarations from both the USPTO and TIPO significantly add to the critical protections of the Miraj Diamond intellectual property portfolio and brand,” said Adam Khan, Founder & Chief Executive Officer of AKHAN Semiconductor. “Less than six years after our founding, the Miraj Diamond trademark is not only gaining global attention from the consumer electronics and semiconductor market places, but is also synonymous for next-generation performance, breakthrough capability, and flagship technology with diamond.”

“The notices of these issuances are very timely as we complete the construction of our cleanroom pilot production facility in northern Illinois,” added Carl Shurboff, AKHAN President and Chief Operating Officer. “With the targeted 2019 launch of our Miraj Diamond® Glass products for Smartphone devices and the concurrent development of our Miraj Diamond® electronics products for aerospace and defense, the brand equity we deliver in diamond continues unparalleled.”

“Safeguarding the technology and trademark from infringement, improper use, and other challenges, benefits not only our OEM Customers, by preserving their market value and time-based exclusivity, but also our shareholders, corporate development partners, and technology partners around the world,” said company Sales Advisor to the Board, Jeffrey G. Miller.