Category Archives: Semiconductors

Scientists from Australia and China have drawn on the durable power of gold to demonstrate a new type of high-capacity optical disk that can hold data securely for more than 600 years.

The technology could offer a more cost-efficient and sustainable solution to the global data storage problem while enabling the critical pivot from Big Data to Long Data, opening up new realms of scientific discovery.

The recent explosion of Big Data and cloud storage has led to a parallel explosion in power-hungry data centres. These centres not only use up colossal amounts of energy – consuming about 3 per cent of the world’s electricity supply – but largely rely on hard disk drives that have limited capacity (up to 2TB per disk) and lifespans (up to two years).

Now scientists from RMIT University in Melbourne, Australia, and Wuhan Institute of Technology, China, have used gold nanomaterials to demonstrate a next-generation optical disk with up to 10TB capacity – a storage leap of 400 per cent – and a six-century lifespan.

The technology could radically improve the energy efficiency of data centres – using 1000 times less power than a hard disk centre – by requiring far less cooling and doing away with the energy-intensive task of data migration every two years. Optical disks are also inherently far more secure than hard disks.

Lead investigator, RMIT University’s Distinguished Professor Min Gu, said the research paves the way for the development of optical data centres to address both the world’s data storage challenge and support the coming Long Data revolution.

“All the data we’re generating in the Big Data era – over 2.5 quintillion bytes a day – has to be stored somewhere, but our current storage technologies were developed in different times,” Gu said.

“While optical technology can expand capacity, the most advanced optical disks developed so far have only 50-year lifespans.

“Our technique can create an optical disk with the largest capacity of any optical technology developed to date and our tests have shown it will last over half a millennium.

“While there is further work needed to optimise the technology – and we’re keen to partner with industrial collaborators to drive the research forward – we know this technique is suitable for mass production of optical disks so the potential is staggering.”

The world is shifting from Big Data towards Long Data, which enables new insights to be discovered through the mining of massive datasets that capture changes in the real world over decades and centuries.

Lead author, Senior Research Fellow Dr Qiming Zhang from RMIT’s School of Science, said the new technology could expand horizons for research by helping to advance the rise of Long Data.

“Long Data offers an unprecedented opportunity for new discoveries in almost every field – from astrophysics to biology, social science to business – but we can’t unlock that potential without addressing the storage challenge,” Zhang said.

“For example, to study the mutation of just one human family tree, 8 terabytes of data is required to analyse the genomes across 10 generations. In astronomy, the Square Kilometre Array (SKA) radio telescope produces 576 petabytes of raw data per hour.

“Meanwhile the Brain Research through Advancing Innovative Neurotechnologies (BRAIN) Initiative to ‘map’ the human brain is handling data measured in yottabytes, or one trillion terabytes.

“These enormous amounts of data have to last over generations to be meaningful. Developing storage devices with both high capacity and long lifespan is essential, so we can realise the impact that research using Long Data can make in the world.”

The novel technique behind the technology – developed over five years – combines gold nanomaterials with a hybrid glass material that has outstanding mechanical strength.

The research progresses earlier groundbreaking work by Gu and his team that smashed through the seemingly unbreakable optical limit of blu-ray and enabled data to be stored across the full spectrum of visible light rays.

How it works

The researchers have demonstrated optical long data memory in a novel nanoplasmonic hybrid glass matrix, different to the conventional materials used in optical discs.

Glass is a highly durable material that can last up to 1000 years and can be used to hold data, but has limited storage capacity because of its inflexibility.

The team combined glass with an organic material, halving its lifespan but radically increasing capacity.

To create the nanoplasmonic hybrid glass matrix, gold nanorods were incorporated into a hybrid glass composite, known as organic modified ceramic.

The researchers chose gold because like glass, it is robust and highly durable. Gold nanoparticles allow information to be recorded in five dimensions – the three dimensions in space plus colour and polarisation.

The technique relies on a sol-gel process, which uses chemical precursors to produce ceramics and glasses with better purity and homogeneity than conventional processes.

 

Working up a sweat from carrying a heavy load? That is when the textile works at its best. Researchers at Chalmers University of Technology have developed a fabric that converts kinetic energy into electric power, in cooperation with the Swedish School of Textiles in Borås and the research institute Swerea IVF. The greater the load applied to the textile and the wetter it becomes the more electricity it generates. The results are now published in the Nature Partner journal Flexible Electronics.

Chalmers researchers Anja Lund and Christian Müller have developed a woven fabric that generates electricity when it is stretched or exposed to pressure. The fabric can currently generate enough power to light an LED, send wireless signals or drive small electric units such as a pocket calculator or a digital watch.

The technology is based on the piezoelectric effect, which results in the generation of electricity from deformation of a piezoelectric material, such as when it is stretched. In the study the researchers created a textile by weaving a piezoelectric yarn together with an electrically conducting yarn, which is required to transport the generated electric current.

“The textile is flexible and soft and becomes even more efficient when moist or wet,” Lund says. “To demonstrate the results from our research we use a piece of the textile in the shoulder strap of a bag. The heavier the weight packed in the bag and the more of the bag that consists of our fabric, the more electric power we obtain. When our bag is loaded with 3 kilos of books, we produce a continuous output of 4 microwatts. That’s enough to intermittently light an LED. By making an entire bag from our textile, we could get enough energy to transmit wireless signals.”

The piezoelectric yarn is made up of twenty-four fibres, each as thin as a strand of hair. When the fibres are sufficiently moist they become enclosed in liquid and the yarn becomes more efficient, since this improves the electrical contact between the fibres. The technology is based on previous studies by the researchers in which they developed the piezoelectric fibres, to which they have now added a further dimension.

“The piezoelectric fibres consist of a piezoelectric shell around an electrically conducting core,” Lund says. “The piezoelectric yarn in combination with a commercial conducting yarn constitute an electric circuit connected in series.”

Previous work by the researchers on piezoelectric textiles has so far mainly focused on sensors and their ability to generate electric signals through pressure sensitivity. Using the energy to continuously drive electronic components is unique.

“Woven textiles from piezoelectric yarns makes the technology easily accessible and it could be useful in everyday life. It’s also possible to add more materials to the weave or to use it as a layer in a multi-layer product. It requires some modification, but it’s possible,” Lund says.

The researchers consider that the technology is, in principle, ready for larger scale production. It is now mainly up to industrial product developers to find out how to make use of the technology. Despite the advanced technology underlying the material, the cost is relatively low and is comparable with the price of Gore-Tex. Through their collaboration with the Swedish School of Textiles in Borås the researchers have been able to demonstrate that the yarn can be woven in industrial looms and is sufficiently wear-resistant to cope with the harsh conditions of mass production.

Magnolia Optical Technology, Inc. announced that it is working with the Defense Advanced Research Projects Agency (DARPA) under the Phase II SBIR Program for Development of High-Performance Thin-Film Solar Cells for Portable Power Applications (Contract No D15PC00222).

Photovoltaic devices can provide a portable source of electrical power for a wide variety of defense and commercial applications, including mobile power for dismounted soldiers, unmanned aerial vehicles, and remote sensors.

“The goal of the current program is to develop high-efficiency GaAs-based solar cells that maintain their performance over changing environmental conditions, and that are thinner and thus more cost-effective to produce,” said Dr. Roger Welser, Magnolia’s Chief Technical Officer. “By combining thin III-V absorbers with advanced light-trapping structures, single-junction GaAs-based devices provide a means to deliver high efficiency performance over a wide range of operating conditions at a fraction of the cost of the multi-junction structures typically employed for space power. In addition, the incorporation of nano-enhanced III-V absorbers provides a pathway to extend infrared absorption and increase the photovoltaic power conversion efficiency of cost-effective thin-film solar cells.”

Dr. Ashok Sood, President of Magnolia stated “changes in the solar spectrum can dramatically degrade the performance of traditional multi-junction devices – changes that occur naturally throughout the day, from season to season, and from location to location as sunlight passes through the earth’s atmosphere. Moreover, multi-junction III-V cells require thick, complex epitaxial layers and are therefore inherently expensive to manufacture. The technology under development as part of this DARPA-funded program addresses these key weaknesses in the established high-performance photovoltaic technology. The photovoltaic market is a rapidly growing segment of the energy industry with a wide range of commercial and defense applications.”

Magnolia specializes in developing optical technologies for defense and commercial applications. Based in Woburn, MA, Magnolia develops both thin film and nanostructure-based technologies that cover the ultraviolet, visible, and infrared part of the spectrum. These technologies are developed for use in advanced military sensors and other commercial applications including solar cells.

Bringing together a technical program that encompasses ‘big integration’ of a number of critical industry trends – machine learning, IoT, artificial intelligence, wearable/implantable biomedical applications, big data, and cloud computing – the 2018 Symposia on VLSI Technology & Circuits will showcase a convergence of technologies needed for ‘smart living.’ As the microelectronics industry’s premiere international conference covering technology, circuits, and systems, the Symposia continues to define the evolution of innovations that will shape the future of our increasingly connected world.

The Symposia theme of “Technology, Circuits & Systems for Smart Living” connects the related plenary presentations, panel discussions, focus sessions, short courses, along with a new Friday Forum on machine learning to provide a unique synergy between advanced technology developments, innovative circuit design, and the applications that they enable – as part of our global society’s transition to a new frontier of smart, connected devices and systems that change the way humans interact with technology – and with each other.

“This year’s Technology program is focused on the critical building blocks needed to realize a truly integrated IoT,” said Mukesh Khare, Symposium on VLSI Technology general chair. “Advanced memory technologies for AI and machine learning, the next wave of advanced computing (supercomputing/cloud/neuromorphic), the cutting edge of CMOS scaling (beyond 5nm/nanowire devices), and the advanced low-power sensors needed to connect them all are just some of the highlights of the Technology program.”

“The Circuits program will examine how the next wave of computing systems need to be designed to realize the potential of AI, machine learning, SOC technology, wearable/implantable biomedical systems, and the IoT,” explained Gunther Lehmann, Symposium on VLSI Circuits general chair. “A demonstration session that showcases real-life applications is designed to enable conference participants to see these innovations first hand.”

The Symposia will also include a series of joint focus sessions that include invited and contributed papers on topics of mutual interest to both technology and circuit attendees. As part of the unique Symposia program, these joint Technology & Circuits focus sessions enable participants to engage in meaningful interaction with their colleagues in different disciplines. In addition, there will be a joint evening panel session by leading industry experts to address critical issues surrounding major industry developments.

Capping off the joint Symposia program will be a series of nine presentations comprising the Friday Forum on machine learning, a subject area that continues to evolve as an impactful driver of the integrated systems that are part of the Symposia’s “Smart Living” theme.

The annual Symposium on VLSI Technology & Circuits will be held at the Hilton Hawaiian Village in Honolulu, Hawaii from June 19-21, 2018, with Short Courses held on June 18 and a special Friday Forum dedicated to machine learning/AI topics on June 22. The two conferences have been held together since 1987, providing an opportunity for the world’s top device technologists, circuit and system designers to exchange leading edge research on microelectronics technology, with alternating venues between Hawaii and Japan. A single registration enables participants to attend both Symposia.

The Symposium on VLSI Technology is sponsored by the IEEE Electron Devices Society and the Japan Society of Applied Physics, in cooperation with the IEEE Solid State Circuits Society.

The Symposium on VLSI Circuits is sponsored by the IEEE Solid State Circuits Society and the Japan Society of Applied Physics, in cooperation with the Institute of Electronics, Information and Communication Engineers.

By Ando Yoichiro, SEMI Japan

In Tokyo, Shanghai, Moscow, London, Paris or New York – wherever you are in the world –Japanese vehicles passing by on the roadways are a common sight. Three big reasons are their high quality, reliability and engineering. But Japan’s automakers are also legendary for their industry breakthroughs. A few highlights:

  • In 1981, Honda introduced the first commercially available map-based car navigation system. The carmaker’s Electro Gyro-Cator used a gyroscope to detect rotation and other movements of the car.
  • In 1990, Mazda equipped its COSMO Eunos with the world’s first built-in GPS-navigation system.
  • In 1997, Toyota launched the world’s first mass-produced hybrid car — Prius.
  • In 1997, Toyota unveiled the world’s first production laser adaptive cruise control on its Celsior.
  • In 2009, Mitsubishi rolled out the world’s first mass-produced electric car – i-MiEV.

Off the roadways and often unheralded, it is supply chain companies including Japanese semiconductor makers that were a key engine of these innovations as they continue their rich history of driving automotive advances. Here’s a closer look at some of the key players and why they matter.

Who Makes Automotive Semiconductors?

Unlike other semiconductors, automotive chips are manufactured not only by integrated device manufacturers (IDMs) but also by captive fabs and automotive components makers such as Toyota and Denso.

Denso, headquartered in Aichi prefecture, started in 1949 as a spin-off of Toyota’s electric components unit. Since 2009, the company has been the world’s largest automotive components supplier. Because Denso’s chips are mostly consumed internally, the company’s manufacturing revenue is not publicly available, but analysts estimate Denso’s chip business exceeds 200 billion JPY or USD $1.9 billion.

Denso fab (source: Denso)

Denso fab (source: Denso)

Denso manufactures semiconductor components at two locations. Its Kota plant in Aichi prefecture manufactures power and logic chips, and the company’s Iwate (Iwate prefecture) facility, acquired from Fujitsu in 2012, produces semiconductor wafers and sensors.

Denso is developing SiC wafers for its power chips and plans to manufacture SiC inverters by 2020. Recently, the company announced joint research on Ga2O3 for power devices with FLOSFIA, a tech startup spun off from Kyoto University. In 2017, Denso established a semiconductor IP design company, NSITEXE, in Tokyo to design semiconductor IP cores – the semiconductor components that are key to autonomous driving.

Toyota has been manufacturing semiconductor chips at its Hirose Plant since 1989. The semiconductor fab design and manufacturing technologies originated at Toshiba and moved to Toyota under a technology transfer agreement signed in 1987. In the power semiconductor arena, Toyota is jointly developing SiC devices with Denso and Toyota Central Research and Development Labs.

Other car and component makers like Honda, Nissan, Hitachi Automotive Systems, Aishin Seiki and Calsonic Kansei are also developing and designing semiconductor chips.

Microcontroller Units                                     

Microcontrollers (MCUs) were first employed in automobiles in the late 1970s to electronically control engines for higher fuel efficiency. Today, up to 80 MCUs are typically used in a car for powertrain controls (engine, fuel management and fuel injection), body controls (seat, door, window, air conditioning and lighting), safety controls (brake, EPS, suspensions, air bags and anti-collision) and infotainment.

In December 2015, the microcontroller unit (MCU) supply chain experienced a major consolidation with the nearly $12 billion acquisition of Freescale Semiconductor by NXP Semiconductors, catapulting NXP to the top of the MCU market. NXP and Freescale were ranked second and third in global market share, after Renesas Electronics, at the time.

Renesas held 40 percent global market share before its Ibaraki fab suffered severe earthquake damage in 2011 and hemorrhaged share after the loss of production capacity.  Renasas continues to recapture market share at a rapid clip, with a growth rate of 5.2 percent and 24.6 percent, respectively, in the first two quarters of 2017, and claims it still leads the global MCU market for automotive applications with 30 percent share (source: Diamond Online, August 2017).

Renesas was established as a joint venture of Hitachi and Mitsubishi and later merged with NEC Electronics. Consequently, Resesas’s MCUs, designed with Hitachi’s SH MCU cores, recently began a gradual shift to Arm cores. Renasas MCUs designed at 40nm or less nodes have been manufactured at TSMC, a Taiwan foundry, since 2012.

Renesas’s microcontrollers in a car (source: EE News Europe Automotive)

Renesas’s microcontrollers in a car
(source: EE News Europe Automotive)

CMOS Image Sensors

CMOS image sensors serve as eyes of cars, performing camera functions on-chip. Today, automobiles typically are fitted with about 10 CMOS image sensors, a number forecast to grow to almost 20 by 2020 (source: Monoist, 2016). The sensor was originally used as a backup monitor but deployments grew with the advent of Advanced Driver-Assistance Systems (ADAS). The CMOS image sensor market is estimated to reach $2.3 billion USD by 2021, according to IC Insights. Sony is the global CMOS image sensor market leader, and ON Semiconductor and OmniVision Technology are big players in this growing segment.

In 2016, Denso started using Sony’s CMOS image sensors to detect pedestrians during night driving. Sony manufactures CMOS sensors at Kumamoto TEC and Nagasaki TEC on Kyusyu Island. In 2017, Sony acquired Toshiba’s Oita plant to increase the capacity to respond to the growing demand for backside illumination CMOS image sensors for higher resolution images at a low-light environments.

Sony’s 7.42 megapixel CMOS image sensor for automotive cameras (source: Sony Corporation)

Sony’s 7.42 megapixel CMOS image sensor for automotive cameras
(source: Sony Corporation)

Power Devices

Power semiconductors provide electrical control functions such as rectification, voltage regulation (boost/step-down), and DA/AD conversion. The automotive industry’s migration from fossil fuel vehicles to hybrid and electric vehicles is driving strong demand for power devices. The leading power device makers are competing to develop higher performance devices on new materials such as SiC and GaN.

For the past five years, the Japan government has funded SiC power device research and development (R&D) projects and, in 2016, the National Institute of Advanced Industrial Science and Technology (AIST) and Sumitomo Electric Industries built a 150mm SiC wafer line at AIST’s Super Clean Room Facility in Tsukuba, Ibaraki. The facility supports volume manufacturing, reliability testing and quality assurance.

Rohm is driving the Japan SiC power device industry. Rohm manufactures SiC power devices on 75mm, 100mm and 150mm wafers. In 2009, Rohm acquired a German SiC wafer maker, SiCrystal, which started supplying 150mm wafers to Rohm in 2013. Rohm also acquired Renesas Electronics’s Shiga plant (200mm line) in 2016 to manufacture SiC power and other discrete devices.

Fuji Electric manufactures various power products including SiC power devices. Fully 30 percent of its products ship to the automotive industry. In 2013, the company built a new SiC line in its Matsumoto plant that includes both wafer process and packaging facilities. Fuji Electric now develops high-performance SiC devices on the latest 150mm SiC wafer technology.

Toyota and Denso round out the Japan SiC power device industry. Denso markets its 150mm SiC technology under the “REVOSIC” brand. In 2013, Toyota built a SiC R&D facility at its Hirose plant for future SiC captive manufacturing.

SiC power semiconductors to improve vehicle’s fuel efficiency by 10 percent (target) (source: Toyota Motor Corp.)

SiC power semiconductors to improve vehicle’s fuel efficiency by 10 percent (target)
(source: Toyota Motor Corp.)

SEMICON will Update You on Automotive Semiconductor Market

Heavy investments in the development of autonomous vehicles and the continuing expansion of the electric car market promise to bolster the automotive semiconductor market in the coming years and beyond. In light of Japan’s leading automotive chip manufacturing industry, SEMICON Japan and all other SEMICON shows in 2018 will spotlight this important segment.

Originally published on the SEMI blog.

Researchers at RIT have found a more efficient fabricating process to produce semiconductors used in today’s electronic devices. They also confirmed that materials other than silicon can be used successfully in the development process that could increase performance of electronic devices. This fabrication process–the I-MacEtch, or inverse metal-assisted chemical etching method–can help meet the growing demand for more powerful and reliable nano-technologies needed for solar cells, smartphones, telecommunications grids and new applications in photonics and quantum computing.

“What is novel about our work is that for the first time we are looking at applying I-MacEtch processing to indium-gallium-phosphide materials. I-MacEtch is an alternative to two conventional approaches and is a technique that has been used in the field–but the materials that have been explored are fairly limited,” said Parsian Mohseni, assistant professor of microsystems engineering in RIT’s Kate Gleason College of Engineering. He is also director of the EINS Laboratory at the university.

Demands for improved computer processing power have led researchers to explore both new processes and other materials beyond silicon to produce electronic components, Mohseni explained. The I-MacEtch process combines the benefits of two traditional methods–wet etching and reactive ion etching, or REI. Indium-gallium-phosphide is one of several materials being tested to complement silicon as a means to improve current capacity of semiconductor processing.

“This is a very well-known material and has applications in the electronics and solar cell industries,” he said. “We are not re-inventing the wheel; we are establishing new protocols for treating the existing material that is more cost effective, and a more sustainable process.”

Semiconductor devices are created on wafers through a multi-step process to coat, remove or pattern conductive materials. Traditional processes are wet etch, where a sample with blocked aspects is immersed in an acid bath to remove substances, and reactive ion etching, where ions bombard exposed surfaces on the wafer to change its chemical properties and remove materials in those exposed regions. Both have been used to develop the intricate electronic patterns on circuits and use silicon as a foundation for this type of patterning. Improving patterning methods by I-MacEtch could mean reducing fabrication complexity of various photonic and electronic devices.

Researchers and semiconductor fabrication scientists have been using MacEtch extensively for processing silicon. At the same time, assessments of other materials in the III-V range of individual elements that may be conducive to this same type of fabrication with similar advantages are underway. In his research, Mohseni is also looking at different alloys of those III-V materials, namely the ternary alloys such as indium-gallium-phosphide (InGaP).

The research detailed in the upcoming issue of the American Chemical Society’s Applied Materials and Interfaces journal highlights how the nanofabrication methodology was applied to InGaP and how it can impact the processing of device applications and generation of high aspect ratio and nano-scale semiconductor features, said Thomas Wilhelm, a microsystems engineering doctoral student and first-author of the paper. The novel processing method can be significant in the development of ordered arrays of high aspect ratio structures such as nanowires.

For solar cells, the goal is to minimize the cost-to-power-produced ratio, and if it is possible to lower the cost of making the cell, and increasing the efficiency of it, this improves the device overall. Exploring new methods of fabricating the existing, relevant materials in a way that allows for faster, less expensive and more controlled processing by combining the benefits of wet etching and RIE has been the focus of Mohseni’s work. The improved process means avoiding expensive, bulky, hazardous processing methods.

“We are using a simple benchtop set up and we end up with very similar structures; in fact, one can argue that they are higher in quality than the structures that we can generate with RIE for a fraction of the cost and with less time, less steps throughout, without the higher temperature conditions or expensive instrumentation,” he said.

 

By Jay Chittooran, SEMI Public Policy

Following through on his 2016 campaign promise, President Trump is implementing trade policies that buck conventional wisdom in Washington, D.C. and among U.S. businesses. Stiff tariffs and the dismantling of longstanding trade agreements – cornerstones of these new actions – will ripple through the semiconductor industry with particularly damaging effect. China, a chief target of criticism from President Trump, has again found itself in the crosshairs of the administration, with trade tensions rising to a fever pitch.

The Trump Administration has long criticized China for what it considers unfair trade practices, often zeroing in on intellectual property. In August 2017, the Office of the U.S. Trade Representative (USTR), charged with developing and recommending U.S trade policy to the president, launched a Section 301 investigation into whether China’s practice of forced technology transfer has discriminated against U.S. firms. As the probe continues, it is becoming increasingly clear that the United States will impose tariffs on China based on its current findings. Reports suggest that the tariffs could come soon, hitting a range of products from consumer electronics to toys. Other measures could include tightening restrictions on the trade of dual-use goods – those with both commercial and military applications – curbing Chinese investment in the United States, and imposing strict limits on the number of visas issued to Chinese citizens.

With China a major and intensifying force in the semiconductor supply chain, raising tariffs hangs like the Sword of Damocles over the U.S. and global economies. A tariff-ignited trade war with China could stifle innovation, undermine the long-term health of the semiconductor industry, and lead to unintended consequences such as higher consumer prices, lower productivity, job losses and, on a global scale, a brake on economic growth.

Other recently announced U.S. trade actions could also cloud the future for semiconductor companies. The Trump administration, based on two separate Section 232 investigations claiming that overproduction of both steel and aluminum are a threat to U.S. national security, recently levied a series of tariffs and quotas on every country except Canada and Mexico. While these tariffs have yet to take effect, the mere prospect has angered U.S. trading partners – most notably Korea, the European Union and China. Several countries have threatened retaliatory action and others have taken their case to the World Trade Organization.

Trade is oxygen to the semiconductor industry, which grew by nearly 30 percent last year and is expected to be valued at an estimated $1 trillion by 2030. Make no mistake: SEMI fully supports efforts to buttress intellectual property protections. However, the Trump administration’s unfolding trade policy could antagonize U.S. trade partners.

For its part, SEMI is weighing in with USTR on these issues, underscoring the critical importance of trade to the semiconductor industry as we educate policymakers on trade barriers to industry growth and encourage unobstructed cross-border commerce to advance semiconductors and the emerging technologies they enable. On behalf of our members, we continue our work to increase global market access and lessen the regulatory burden on global trade. If you are interested in more information on trade, or how to be involved in SEMI’s public policy program, please contact Jay Chittooran, Public Policy Manager, at [email protected].

Originally published on the SEMI blog.

SEMICON West, the flagship U.S. event for connecting the electronics manufacturing supply chain, has opened registration for the July 10-12, 2018, exposition at the Moscone Center in San Francisco, California. Building on a year of record-breaking industry growth, SEMICON West 2018 will highlight the engines of future industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

Themed BEYOND SMART, SEMICON West 2018 sets it sights on the growing impact of cognitive learning technologies and other industry disruptors with programs and new Smart Pavilions including Smart Manufacturing and Smart Transportation to showcase interactive technologies for immersive, virtual experiences. Each Pavilion will feature a Meet the Experts Theater with an intimate setting for attendees to engage informally with industry thought leaders.

Smart Workforce Pavilion: Connecting Next-Generation Talent with the Microelectronics Industry

The SEMI Smart Workforce Pavilion at SEMICON West 2018 leverages the largest microelectronic manufacturing event in North America to draw the next generation of innovators. Reliant on a highly skilled workforce, the industry today is saddled with thousands of job openings and fierce competition for workers, bringing renewed focus to strengthening its talent pipeline. Educational and engaging, the Pavilion connects the microelectronics industry with college students and entry-level professionals interested in career opportunities.

In the Workforce Pavilion “Meet the Experts” Theater, industry engineers will share insights and inspiration about their personal working experiences and career advisors will offer best practices. Recruiters from top companies will be available for on-the-spot interviews, while career coaches offer mentoring, tips on cover letter and resume writing, job-search guidance, and more. Visitors will learn more about the industry’s vital role in technological innovation in today’s connected world.

This year, SEMI will also host High Tech U (HTU) in conjunction with the SEMICON West Smart Workforce Pavilion. The highly-interactive program supported by Advantest, Edwards, KLA-Tencor and TEL exposes high school students to STEM education pathways and stimulates excitement about careers in the industry.

Free registration with three-day access and shuttle service to SEMICON West are available to all college students. Students are encouraged to register for the mentor program, attend keynotes and tour the exposition hall to see everything the industry has to offer.  To learn more, visit Smart Workforce Pavilion and College Track to preview how students can enter to win a $500 hiring bonus!

Three Ways to Experience the Expo

Attendees can tailor their SEMICON West experience to meet their specific interests. The All-In pass covers every program and event, while the Thought-Leadership and Expo-Only packages offer scaled pricing and program options. Attendees can also purchase select events and programs à la carte, including exclusive IEEE-sponsored sessions, the SEMI Market Symposium, and the STEM Rocks After-hours Party, a fundraising event to support the SEMI Foundation.

CEA-Leti, a French technology research institute of the CEA and Inac, a joint fundamental research institute between the CEA and the University Grenoble Alpes, today announced a breakthrough towards large-scale fabrication of quantum bits, or qubits, the elementary bricks of future quantum processors. They demonstrated on a 300 mm pre-industrial platform a new level of isotopic purification in a film deposited by chemical vapor deposition (CVD). This enables creating qubits in thin layers of silicon using a very high purity silicon isotope, 28Si, which produces a crystalline quality comparable to thin films usually made of natural silicon.

“Using the isotope 28Si instead of natural silicon is crucial for the optimization of the fidelity of the silicon spin qubit,” said Marc Sanquer, a research director at Inac. “The fidelity of the spin qubit is limited to small values by the presence of nuclear spins in natural silicon. But spin qubit fidelity is greatly enhanced by using 28Si, which has zero nuclear spin. We expect to confirm this with qubits fabricated in a pre-industrial CMOS platform at CEA-Leti.” 

Qubits are the building blocks of quantum information. They can be made in a broad variety of material systems, but when it comes to the crucial issue of large-scale integration, the range of possible choices narrows significantly. Silicon spin qubits have a small size and are compatible with CMOS technology. They therefore present advantages for large-scale integration compared to other types of qubits.

Since 2012, when the first qubits that relied on electron spins were reported, the introduction of isotopically purified 28Si has led to significant enhancement of the spin coherence time. The longer spin coherence lasts, the better the fidelity of the quantum operations.

Quantum effects are essential to understanding how basic silicon micro-components work, but the most interesting quantum effects, such as superposition and entanglement, are not used in circuits. The CEA-Leti and Inac results showed that these effects can be implemented in CMOS transistors operated at low temperature.

CEA-Leti and Inac previously reported preliminary steps for demonstrating a qubit in a process utilizing a natural silicon-on-insulator (SOI) 300 mm CMOS platform1. The qubit is an electrically controlled spin carried by a single hole in a SOI transistor. In a paper published in npj Quantum Information2., CEA-Leti and Inac reported that an electron spin in a SOI transistor can also be manipulated by pure electrical signals, which enable fast and scalable spin qubits.

“To progress towards a practical and useful quantum processor, it is now essential to scale up the qubit,” said Louis Hutin, a research engineer in CEA-Leti’s Silicon Components Division. “This development will have to address variability, reproducibility and electrostatic control quality for elementary quantum bricks, as is done routinely for standard microprocessors.”

To help CEA-Leti and Inac leverage nuclear spin free silicon in the CMOS platform, a silicon precursor was supplied by Air Liquide, using an isotopically purified silane of very high isotopic purity with a 29Si isotope content of less than 0.00250 percent, prepared by the Institute of Chemistry of High-Purity Substances at the Russian Academy of Sciences. The 29Si isotope is present at 4.67 percent in natural silicon and is the only stable isotope of silicon that carries a nuclear spin limiting the qubit coherence time.

A secondary ion mass spectrometry (SIMS) analysis done on the CVD-grown layer using this purified silane precursor showed29Si concentration less than 0.006 percent, and 30Si less than 0.002 percent, while 28Si concentration was more than 99.992 percent. These unprecedented levels of isotopic purification for a CVD-grown epilayer on 300 mm substrates are associated with surfaces that are smooth at the atomic scale, as verified by atomic force microscopy (AFM), haze and X-ray reflectometry measurements.

Leveraging their scientific and technological expertise, and the specific opportunities associated with the 300 mm silicon platform on the Minatec campus, CEA-Leti and Inac will continue to contribute to the scientific, technological and industrial dynamic on quantum technologies, enhanced by the implementation of the EC’s FET Flagships initiative in this domain.

  1. “A CMOS silicon spin qubit”, arXiv:1605.07599 Nature Communications 7, Article number: 13575 (2016) doi:10.1038/ncomms13575
  1. “Electrically driven electron spin resonance mediated by spin-valley-orbit coupling in a silicon quantum dot”, Nature PJ Quantum Information (2018) 4:6; doi:10.1038/s41534-018-0059-1

GLOBALFOUNDRIES today announced a new ecosystem partner program, called RFWave, designed to simplify RF design and help customers reduce time-to-market for a new era of wireless devices and networks.

The last few years there has been an increasing demand for connected devices and systems that will require innovations in radio technologies to support the new modes of operation and higher capabilities. The RFWave Partner Program builds upon GF’s 5G vision and roadmap, with a focus on the company’s industry-leading radio frequency (RF) solutions, such as FD-SOI, RF CMOS (bulk and advanced CMOS nodes), RF SOI and silicon germanium (SiGe) technologies. The program provides a low-risk, cost-effective path for designers seeking to build highly optimized RF solutions for a range of wireless applications such as IoT across various wireless connectivity and cellular standards, standalone or transceiver integrated 5G front end modules, mmWave backhaul, automotive radar, small cell and fixed wireless and satellite broadband.

RFWave enables customers to build innovative RF solutions as well as packaging and test solutions. Initial partners have committed a set of key offerings to the program, including:

  • tools (EDA) that complement industry leading design flows by adding specific modules to easily leverage features of GF’s RF technology platforms,
  • a comprehensive library of design elements (IP), including foundation IP, interfaces and complex IP to enable foundry customers to start their designs using pre-validated IP elements,
  • resources (design consultation, services), trained and globally distributed, for Partners to gain easy access to support in developing solutions using GF’s RF technologies

“An explosion of digital information is expected to drive an enormous amount of growth in the coming years and our customers are already preparing for a future of seamless, reliable ultra high data rate wireless connectivity everywhere,” said Bami Bastani, senior vice president of GF’S RF Business Unit. “As a leader in RF, GF’s RFWave program takes industry collaboration to a new level, enabling our customers to build differentiated, highly integrated RF-tailored solutions that are designed to accelerate the next wave of technology.”

The RFWave Partner Program creates an open framework to allow selected partners to integrate their products or services into a validated, plug-and-play catalog of design solutions. This level of integration allows customers to create high-performance designs while minimizing development costs through access to a broad set of quality offerings, specific to RF technology. The partner ecosystem positions members and customers to take advantage of ubiquitous connectivity and the broad adoption of GF’s industry-leading RF technology platforms.

Initial members of the RFWave Partner Program are: asicNorth, Cadence, CoreHW, CWS, Keysight Technologies, Spectral Design, and WEASIC. These companies have already initiated work to deliver innovative, highly optimized RF solutions.