Category Archives: Semiconductors

Through three quarters of calendar year 2017, market shares of top semiconductor equipment manufacturers indicate large gains by Tokyo Electron and Lam Research, according to the report “Global Semiconductor Equipment: Markets, Market Shares, Market Forecasts,” recently published by The Information Network, a New Tripoli-based market research company.

The chart below shows shares for the entire year of 2016 and for the first three quarters of 2017. Market shares are for equipment only, excluding service and spare parts, and have been converted for revenues of foreign companies to U.S. dollars on a quarterly exchange rate.

equipment shares

Market leader Applied Materials lost 1.3 share points, dropping from 28.2% in 2016 to 26.9% YTD (year to date). Gaining share are Tokyo Electron Ltd. (TEL), which gained 2.4 share points while rising from 17.0% in 2016 to 19.4% in 2017 YTD. Lam Research gained 1.6 share points and growing from a 19.0% share in 2016 to a 20.6% share in 2017 YTD.

On a competitive basis, Applied Materials competes against both competitors in conductor and dielectric etch equipment and in deposition equipment (atomic layer deposition [ALD] and non-tube low pressure chemical vapor deposition [LPCVD]). TEL also competes against Screen Semiconductor Solutions, which dropped 1.4 share points, in photoresist track and wet clean equipment.

According to SEMI, the industry consortium, semiconductor equipment grew 41% in 2017.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $37.7 billion for the month of November 2017, an increase of 21.5 percent compared to the November 2016 total of $31.0 billion and 1.6 percent more than the October 2017 total of $37.1 billion. All major regional markets posted both year-to-year and month-to-month sales increases in November, with the Americas market leading the way. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“The global semiconductor industry reached another key milestone in November, notching its highest-ever monthly sales, and appears poised to reach $400 billion in annual sales for the first time,” said SIA President & CEO John Neuffer. “Global market growth continues to be led by sales of memory products, but sales of all other major semiconductor categories also increased both month-to-month and year-to-year in November. All regional markets also experienced growth in November, with the Americas continuing to post the strongest gains.”

Regionally, year-to-year sales increased in the Americas (40.2 percent), Europe (18.8 percent), China (18.5 percent), Asia Pacific/All Other (16.2 percent), and Japan (10.6 percent). Month-to-month sales increased in the Americas (2.6 percent), China (2.1 percent), Europe (1.8 percent), Asia Pacific/All Other (0.5 percent), and Japan (0.3 percent).

To find out how to purchase the WSTS Subscription Package, which includes comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, please visit http://www.semiconductors.org/industry_statistics/wsts_subscription_package/. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2017 SIA Databook: https://www.semiconductors.org/forms/sia_databook/.

Nov 2017

Billions

Month-to-Month Sales                              

Market

Last Month

Current Month

% Change

Americas

8.54

8.77

2.6%

Europe

3.37

3.43

1.8%

Japan

3.20

3.21

0.3%

China

11.65

11.90

2.1%

Asia Pacific/All Other

10.33

10.39

0.5%

Total

37.09

37.69

1.6%

Year-to-Year Sales                         

Market

Last Year

Current Month

% Change

Americas

6.25

8.77

40.2%

Europe

2.88

3.43

18.8%

Japan

2.90

3.21

10.6%

China

10.04

11.90

18.5%

Asia Pacific/All Other

8.94

10.39

16.2%

Total

31.02

37.69

21.5%

Three-Month-Moving Average Sales

Market

Jun/Jul/Aug

Sep/Oct/Nov

% Change

Americas

7.55

8.77

16.1%

Europe

3.22

3.43

6.4%

Japan

3.13

3.21

2.6%

China

11.08

11.90

7.4%

Asia Pacific/All Other

9.98

10.39

4.0%

Total

34.96

37.69

7.8%

The year-end update to the SEMI World Fab Forecast report reveals 2017 spending on fab equipment investments will reach an all-time high of $57 billion. High chip demand, strong pricing for memory, and fierce competition are driving the high-level of fab investments, with many companies investing at previously unseen levels for new fab construction and fab equipment. See figure 1.

Figure 1

Figure 1

The SEMI World Fab Forecast data shows fab equipment spending in 2017 totaling US$57 billion, an increase of 41 percent year-over-year (YoY). In 2018, spending is expected to increase 11 percent to US$63 billion.

While many companies, including Intel, Micron, Toshiba (and Western Digital), and GLOBALFOUNDRIES increased fab investments for 2017 and 2018, the strong increase reflects spending by just two companies and primarily one region.

SEMI data shows a surge of investments in Korea, due primarily to Samsung, which is expected to increase its fab equipment spending by 128 percent in 2017, from US$8 billion to US$18 billion. SK Hynix also increased fab equipment spending, by about 70 percent, to US$5.5 billion, the largest spending level in its history. While the majority of Samsung and SK Hynix spending remains in Korea, some will take place in China and the United States. Both Samsung and SK Hynix are expected to maintain high levels of investments in 2018. See figure 2.

Figure 2

Figure 2

In 2018, China is expected to begin equipping many fabs constructed in 2017. In the past, non-Chinese companies accounted for most fab investments in China. For the first time, in 2018 Chinese-owned device manufacturers will approach parity, spending nearly as much on fab equipment as their non-Chinese counterparts. In 2018, Chinese-owned companies are expected to invest about US$5.8 billion, while non-Chinese will invest US$6.7 billion. Many new companies such as Yangtze Memory Technology, Fujian Jin Hua, Hua Li, and Hefei Chang Xin Memory are investing heavily in the region.

Historic highs in equipment spending in 2017 and 2018 reflect growing demand for advanced devices. This spending follows unprecedented growth in construction spending for new fabs also detailed in the SEMI World Fab Forecast report. Construction spending will reach all-time highs with China construction spending taking the lead at US$6 billion in 2017 and US$6.6 billion in 2018, establishing another record: no region has ever spent more than US$6 billion in a single year for construction.

Scientists at Tokyo Institute of Technology (Tokyo Tech) and their research team involving researchers of JASRI, Osaka University, Nagoya Institute of Technology, and Nara Institute of Science and Technology have just developed a novel approach to determine and visualize the three-dimensional (3D) structure of individual dopant atoms using SPring-8. The technique will help improve the current understanding of the atomic structures of dopants in semiconductors correlated with their electrical activity and thus help support the development of new manufacturing processes for high-performance devices.

Using a combination of spectro-photoelectron holography, electrical property measurements, and first-principles dynamics simulations, the 3D atomic structures of dopant impurities in a semiconductor crystal were successfully revealed. The need for a better understanding of the atomic structures of dopants in semiconductors had been long felt, mainly because the current limitations on active dopant concentrations result from the deactivation of excess dopant atoms by the formation of various types of clusters and other defect structures.

Soft X-rays excite the core level electrons, leading to the emission of photoelectrons from various atoms, whose waves are then scattered by the surrounding atoms. The interference pattern between the scattered and direct photoelectron waves creates the photoelectron hologram, which may then be captured with an electron analyzer. Credit: Nano Letters

Soft X-rays excite the core level electrons, leading to the emission of photoelectrons from various atoms, whose waves are then scattered by the surrounding atoms. The interference pattern between the scattered and direct photoelectron waves creates the photoelectron hologram, which may then be captured with an electron analyzer. Credit: Nano Letters

The search for techniques to electrically activate the dopant impurities in semiconductors with high efficiency and/or at high concentrations have always been an essential aspect of semiconductor device technology. However, despite various successful developments, the achievable maximum concentration of active dopants remains limited. Given the impact of the dopant atomic structures in this process, these structures had been previously investigated using both theoretical and experimental approaches. However, direct observation of the 3D structures of the dopant atomic arrangements had hitherto been difficult to achieve.

In this study, Kazuo Tsutsui at Tokyo Tech and colleagues involving researchers at JASRI, Osaka University, Nagoya Institute of Technology, and Nara Institute of Science and Technology developed spectro-photoelectron holography using SPring-8, and leveraged the capabilities of photoelectron holography in determining the concentrations of dopants at different sites, based on the peak intensities of the photoelectron spectrum, and classified electrically active / inactive atomic sites. These structures directly related with the density of carriers. In this approach, soft X-ray excitation of the core level electrons leads to the emission of photoelectrons from various atoms, whose waves are then scattered by the surrounding atoms. The resulting interference pattern creates the photoelectron hologram, which may then be captured with an electron analyzer. The photoelectron spectra acquired in this manner contain information from more than one atomic site. Therefore, peak fitting is performed to obtain the photoelectron hologram of individual atomic sites. The combination of this technique with first-principles simulations allows the successful estimation of the 3D structure of the dopant atoms, and the assessment of their different chemical bonding states. The method was used to estimate the 3D structures of arsenic atoms doped onto a silicon surface. The obtained results fully demonstrated the power of the proposed method and allowed confirmation of several previous results.

This work demonstrates the potential of spectro-photoelectron holography for the analysis of impurities in semiconductors. This technique allows analyses that are difficult to perform with conventional approaches and should therefore be useful in the development of improved doping techniques and, ultimately, in supporting the manufacture of high-performance devices.

eVaderis, a semiconductor IP start-up that provides design solutions to improve the functionality, power efficiency and performance of its customers’ semiconductor chips, has successfully demonstrated a fully functioning design platform through an ultra-low-power microcontroller (MCU) in Beyond Semiconductor‘s BA2X product line. The software, system and memory IP developed by eVaderis make Beyond Semiconductor’s new MCU ideally suited for battery-powered applications in IoT and wearable electronics.

By incorporating the latest perpendicular, spin-transfer-torque magnetoresistive random-access memory (STT-MRAM) technology from international R&D institute Imec, Beyond Semiconductor’s new MCU can achieve non-volatile operation with high-speed read/write and low voltage. In addition, the device is designed for manufacturability using GLOBALFOUNDRIES’ 40-nm low-power CMOS production process.

“The tape-out of this innovative MRAM-based, memory-centric MCU demonstrates our proficiency in disruptive, non-volatile embedded IP design and flow for low-power, digital devices,” said Virgile Javerliac, deputy CEO and head of technology and marketing at eVaderis. “We now plan to license the underlying IP to semiconductor manufacturers making sub-40-nm chips.”

“Power consumption is still the key challenge for any battery-powered device,” said Matjaz Breskvar, Beyond Semiconductor’s CEO. “We have been working with eVaderis since the company’s inception to jointly realize a vision of battery-powered, always-on devices with unprecedented energy efficiencies.”

Three megabits (3 Mb) of on-chip memory are fully distributed across the system though different instances, covering different functions such as working memory, configuration, state retention, code execution and data storage. eVaderis’ memory IP architectures are built to be compiler-friendly, helping chip makers to achieve faster time to market.

eVaderis’ innovative memory-centric architecture based on embedded MRAM technology allows a MCU to achieve power, performance and functional gains at the system and software levels. These gains include for instance energy-efficient, non-volatile checkpointing or normally-off/instant-on operation with near zero latency boot.

SEMI today announced the appointment of Masahiko (Jim) Hamajima as president of SEMI Japan. Reporting to SEMI president and CEO Ajit Manocha, Hamajima assumes profit and loss (P&L) responsibility for SEMI Japan and leadership of SEMICON Japan along with all regional programs, events, and initiatives including SEMI Standards and industry advocacy. With more than 325 members, SEMI Japan plays a critical role in SEMI’s global industry association, representing more than 2,000 companies worldwide in the electronics manufacturing supply chain.

With all-time records expected in 2017 for global semiconductor revenue at $400 billion (USD), semiconductor equipment revenue at $56 billion (USD), and semiconductor materials revenue at $48 billion (USD), Japan is an essential global player and has seen very strong recent growth.  Japan supplies nearly one-third of the world’s semiconductor equipment and more than half all wafer fab materials. As semiconductor manufacturing continues its strong global growth, SEMI Japan role in connecting SEMI member companies in Japan with opportunities to collaborate and innovate with companies worldwide will take on increasing importance in enabling members’ growth and prosperity.

“With his long leadership experience at TEL, the largest semiconductor equipment company in Japan (and in the top-five globally), Jim understands the challenges and opportunities facing Japan as the global electronics manufacturing supply chain expands and evolves,” said Ajit Manocha, president and CEO of SEMI.  “Jim’s solid track record in heading ambitious business transformations makes him the ideal choice to lead SEMI Japan in SEMI’s 2.0 initiative. Jim will drive critical initiatives such as workforce development, greater environmental health and safety (EH&S) intensity, and new vertical application collaborations – like Smart Data and Smart Transportation that sharpen the industry’s focus on Artificial Intelligence (AI) and Machine Learning.”

Hamajima brings more than 30 years’ experience in the semiconductor equipment industry in Japan and the U.S. and a comprehensive understanding of the global industry.  Starting at Tokyo Electron Ltd. (TEL) in diffusion, Hamajima later held vice president positions overseeing multiple product lines at Tokyo Electron America and later for Cleaning Systems in Japan. Hamajima’s experience includes leading complex integrations as senior vice president at Timbre Technologies and as vice president and general manager at TEL-FSI. Prior to joining SEMI, Hamajima served as vice president and general manager of Corporate Strategy at TEL. Hamajima holds a Bachelor of Science degree in Metallurgy from the Nagoya Institute of Technology.

“I would also like to thank Osamu Nakamura for his important contributions, first as a SEMI Japan Regional Advisory Board member, later as a SEMI International BOD member and most recently as president of SEMI Japan, culminating in the very successful SEMICON Japan 2017 in mid-December,” commented Manocha. “I appreciate Osamu remaining as an advisor through the next several months to ensure a smooth transition and wish him a very happy retirement.”

 

The global mask alignment systems market is expected to grow at a CAGR of more than 9% during the forecast period, according to Technavio’s latest market research.

In this market research report, Technavio covers the market outlook and growth prospects of the global mask alignment systems market for 2017-2021. The market is further categorized based on application (microelectromechanical system (MEMS) devices, compound semiconductors, and LED devices) and end-user (foundry, memory, and integrated device manufacturer (IDM)).

APAC: largest mask alignment systems market

APAC has the presence of several prominent semiconductor foundries such as Taiwan Semiconductor Manufacturing Company (TSMC), Samsung, and SMIC. This has created demand for mask alignment systems in the region. The major revenue contributors to the mask alignment systems market in APAC are Taiwan, South Korea, and Japan. These countries contribute significantly to the market revenue as they are home to many leading semiconductor device manufacturers.

“In the APAC region, the presence of dominant players in the global consumer electronics and mobile devices markets such as Samsung, Sony, LG Electronics, Toshiba, and Panasonic is supporting the demand for semiconductor devices that include lithography equipment such as mask alignment systems. Furthermore, the major chip vendors in the region are investing in infrastructure development such as the construction of new fabs to increase the throughput,” says Rohan Joy Thomas, a lead semiconductor equipment research expert from Technavio.

Mask alignment systems market in EMEA

In EMEA, the demand for mask alignment systems comes mainly from companies such as Infineon Technologies, NXP Semiconductors, and STMicroelectronics. Germany and the UK are the major revenue contributors to the mask alignment systems market in EMEA due to the presence of several prominent automobile manufacturers such as AUDI, BMW, Daimler (Mercedes-Benz), and Volkswagen.

“The increased focus on safety, passenger comfort, and engine efficiency require more number of ICs and the fabrication of these ICs will need more semiconductor equipment, including mask alignment systems. This will fuel the growth of the mask alignment systems market in EMEA during the forecast period,” says Rohan.

Mask alignment systems market in the Americas

The Americas has a comparatively lower share than the other two regions. But, the Americas can expect some changes in its market share during the forecast period. Several prominent semiconductor vendors are headquartered in this region, even though their manufacturing facilities are in APAC (due to the cost-effectiveness of production in APAC). The governing authorities of the Americas are promising special packages in the form of subsidies and incentives to encourage manufacturers to bring back their production facilities to the Americas. The American Recovery and Reinvestment Act is an example of such initiatives.

The presence of prominent semiconductor manufacturers such as Global Foundries and Intel will create demand for lithography systems such as mask alignment systems during the forecast period. In addition, the region boasts of a few major car manufacturers that are looking to integrate semiconductor devices and components into their products. This will also create demand for semiconductor production equipment such as mask alignment systems from the region during the forecast period

The top vendors in the global mask alignment systems market as highlighted in this market research analysis are:

  • EV Group
  • Neutronix
  • SUSS Microtek

 

Qualcomm Incorporated (NASDAQ: QCOM) (“Qualcomm” or the “Company”) today announced that the Qualcomm Board of Directors, following the recommendation of the Board’s Governance Committee, has unanimously determined not to nominate any of the 11 candidates assembled by Broadcom Limited (NASDAQ: AVGO) and Silver Lake Partners to replace Qualcomm’s current directors at Qualcomm’s 2018 Annual Meeting of Stockholders.  Qualcomm today also filed its preliminary proxy statement with the U.S. Securities and Exchange Commission in connection with Qualcomm’s upcoming 2018 Annual Meeting.

After a thorough review of the Broadcom-Silver Lake nominees, the Governance Committee concluded that these nominees are inherently conflicted and would not bring incremental skills or expertise to the Qualcomm Board. Qualcomm’s Board is nominating its 11 incumbent directors for re-election at the 2018 Annual Meeting: Barbara T. Alexander, Jeffrey W. Henderson, Thomas W. Horton, Dr. Paul E. Jacobs, Ann M. Livermore, Harish Manwani, Mark D. McLaughlin, Steve Mollenkopf, Clark T. Randt, Jr., Dr. Francisco Ros and Anthony J. “Tony” Vinciquerra.

Qualcomm’s existing Board has a deep understanding of the global IP/licensing and semiconductor business and relevant adjacent industries, and has overseen the design and execution of Qualcomm’s strategy, including driving its leadership in mobile, IoT, automotive, edge computing and networking, as well as the coming transition to 5G. Qualcomm’s Board remains focused on driving profitable growth and maximizing value for all stockholders.

Broadcom and Silver Lake are asking Qualcomm stockholders to turn over control of their Company now to the hand-picked Broadcom-Silver Lake nominees based on a proposal that dramatically undervalues Qualcomm and is not actionable due to its significant regulatory uncertainty, which may not be resolved for 18 months, if ever, and lack of committed financing.  Broadcom has made no commitments to resolve the serious regulatory issues inherent in its proposal.

Qualcomm’s Board is committed to maintaining best-in-class corporate governance. Qualcomm directors are elected annually and 9 of the 11 directors are independent, including 4 directors added in the last 3 years.  The incumbent directors have a mix of industry perspectives, operating and financial expertise, corporate restructuring experience and IP/licensing expertise, as well as a long history of collaborative stockholder engagement, all of which collectively drive performance and stockholder value.

Detailed information about Qualcomm’s director nominees is included in the Company’s preliminary proxy statement. Also included is a “Background to the Solicitation” section, which details all interactions between Qualcomm and Broadcom relating to Broadcom’s unsolicited acquisition proposal.

United Microelectronics Corporation (NYSE:UMC;TWSE:2303) (“UMC”), a global semiconductor foundry, today announced the availability of the company’s 40nm process platform that incorporates Silicon Storage Technology’s (SST) embedded SuperFlash non-volatile memory. The newly available 40nm SST process features a >20% reduction in eFlash cell size and 20-30% macro area over UMC’s mass production 55nm SST technology. Toshiba Electronic Devices & Storage Corporation has started studying technical feasibility of UMC’s 40nm SST for their microcontroller (MCU) ICs.

“We expect that UMC’s 40nm SST will improve the performance of our MCU products,” said Toshiya Matsui, Vice President, Mixed Signal IC Division of Toshiba Electronic Devices & Storage Corporation “Working with UMC will also allow us to maintain a robust business continuity plan (BCP) through stable manufacturing supply and flexible capacity support based on our production requirements.”

More than 20 customers and products are in various stages of 55nm SST eFlash production at UMC, including those for SIM card, banking, automotive, IOT, MCU and other applications.

Wenchi Ting, Associate VP of Specialty Technology division at UMC said, “Since qualifying SST’s embedded flash technology on our popular 55nm process in 2015, we have received tremendous interest from customers looking to further utilize the low power, high reliability, superior data retention and high endurance characteristics of this process platform for their automotive, industrial, consumer and IoT applications. We are pleased to introduce this eNVM solution on our 40nm platform, and look forward to bringing the high speed and high reliability benefits of SST to Toshiba and our other foundry customers.”

UMC’s robust SST process performs according to JEDEC standards, with 100k endurance and more than 10 years of data retention at 85C and an operating-temperature range of -40C to 125C. In addition to the 40nm SST process, UMC has over 20 customers in production using the foundry’s 55nm SST for a broad range of product applications.

Researchers at the Center for Integrated Nanostructure Physics, within the Institute for Basic Science (IBS), have shown that defects in monolayer molybdenum disulfide (MoS2) exhibit electrical switching, providing new insights into the electrical properties of this material. As MoS2 is one of the most promising 2D semiconductors, it is expected that these results will contribute to its future use in opto-electronics.

The study on 2-D molybdenum disulfide (MoS2) defects employed low frequency noise measurements and conductive atomic force microscopy (C-AFM). The enlarged image shows an AFM cantilever tip pointing to an area with one sulfur monovacancy (area shaded red). As current flows through the AFM tip and the sample, switching events between different ionization states (neutral and charged -1) are measured. With a radius of around 25 nanometers, the AFM tip covers an area that contains around 1-8 sulfur monovacancies. Credit: IBS, published on Nature Communications

The study on 2-D molybdenum disulfide (MoS2) defects employed low frequency noise measurements and conductive atomic force microscopy (C-AFM). The enlarged image shows an AFM cantilever tip pointing to an area with one sulfur monovacancy (area shaded red). As current flows through the AFM tip and the sample, switching events between different ionization states (neutral and charged -1) are measured. With a radius of around 25 nanometers, the AFM tip covers an area that contains around 1-8 sulfur monovacancies. Credit: IBS, published on Nature Communications

Defects can cause major changes in the properties of a material, leading to either desirable or unwanted effects. For example, petrochemical industry has long taken advantage of the catalytic activity of MoS2edges, characterized by the presence of a high concentration of defects, to produce petroleum products with reduced sulfur dioxide (SO2) emissions. On the other hand, having a pristine material is a must in electronics. Currently, silicon rules the industry, because it can be prepared in a virtually defect-free manner. In the case of MoS2, its suitability for electronic applications is currently limited by the presence of naturally occurring defects. So far, the precise link between these defects and the degraded properties of MoS2 has been an open question.

In IBS, a team of physicists, material scientists, and electrical engineers worked closely together to explore the electronic properties of sulfur vacancies in MoS2 monolayers, using a combination of atomic force microscopy (AFM) and noise analysis. The scientists used a metallic AFM tip to measure the noise signal, i.e., the variation of electrical current passing through a single layer of MoS2 placed on a metal substrate.

The most common defects in MoS2 are instances of missing single sulfur atoms, also known as sulfur monovacancies. In a perfect sample, each sulfur atom has two valence electrons that bind to two molybdenum electrons. However, where a sulfur atom is missing, these two molybdenum electrons are left unsaturated, defining the neutral state (0 state) of the defect. However, the team observed rapid switching events in their noise measurements, indicating the state of the vacancy switched between neutral (0 state) and charged (-1 state).

“The switching between 0 and -1 is happening continuously. While an electron resides at the vacancy for a while, it is missing from the current, such that we observe a current drop,” explains Michael Neumann, one of the co-first authors of the study. “This goes a long way towards understanding the known anomalies of MoS2, and it is very interesting that sulfur vacancies alone are enough to explain these anomalies, without requiring more complex defects.” According to the experiments and earlier calculations, two electrons can be also trapped at the vacancy (-2 state), but this does not seem to be energetically favored.

The new observation that sulfur vacancies can be charged (-1 and -2 states) sheds light on several MoS2 anomalies, including its reduced electron mobility observed in MoS2 monolayer samples: electrons move following the direction of an applied voltage, but get scattered by charged defects. “The -1 state is occupied around 50% of the time, which would lead to scattering of electrons, and thus explain why MoS2 has such poor mobility,” clarifies Neumann. Other MoS2 characteristics which can be explained by this study are the n-type doping of MoS2, and the unexpectedly large resistance at the MoS2-metal junction.

“This research opens up the possibility of developing a new noise nanospectroscopy device capable of mapping one or more defects on a nanoscale scale over a wide area of a 2D material,” concludes the corresponding author Young Hee Lee.

The full study is available on Nature Communications.