Category Archives: Semiconductors

Smartphones and computers wouldn’t be nearly as useful without room for lots of apps, music and videos.

Devices tend to store that information in two ways: through electric fields (think of a flash drive) or through magnetic fields (like a computer’s spinning hard disk). Each method has advantages and disadvantages. However, in the future, our electronics could benefit from the best of each.

“There’s an interesting concept,” says Chang-Beom Eom, the Theodore H. Geballe Professor and Harvey D. Spangler Distinguished Professor of Materials Science and Engineering at the University of Wisconsin-Madison. “Can you cross-couple these two different ways to store information? Could we use an electric field to change the magnetic properties? Then you can have a low-power, multifunctional device. We call this a ‘magnetoelectric’ device.”

In research published recently in the journal Nature Communications, Eom and his collaborators describe not only their unique process for making a high-quality magnetoelectric material, but exactly how and why it works.

Physics graduate student Julian Irwin checks equipment in the lab of materials science and engineering Professor Chang-Beom Eom, where researchers have produced a material that could exhibit the best qualities of both solid-state and spinning disk digital storage. Credit: Sarah Page/UW-Madison College of Engineering

Physics graduate student Julian Irwin checks equipment in the lab of materials science and engineering Professor Chang-Beom Eom, where researchers have produced a material that could exhibit the best qualities of both solid-state and spinning disk digital storage. Credit: Sarah Page/UW-Madison College of Engineering

Magnetoelectric materials — which have both magnetic and electrical functionalities, or “orders” — already exist. Switching one functionality induces a change in the other.

“It’s called cross-coupling,” says Eom. “Yet, how they cross-couple is not clearly understood.”

Gaining that understanding, he says, requires studying how the magnetic properties change when an electric field is applied. Up to now, this has been difficult due to the complicated structure of most magnetoelectric materials.

In the past, says Eom, people studied magnetoelectric properties using very “complex” materials, or those that lack uniformity. In his approach, Eom simplified not only the research, but the material itself.

Drawing on his expertise in material growth, he developed a unique process, using atomic “steps,” to guide the growth of a homogenous, single-crystal thin film of bismuth ferrite. Atop that, he added cobalt, which is magnetic; on the bottom, he placed an electrode made of strontium ruthenate.

The bismuth ferrite material was important because it made it much easier for Eom to study the fundamental magnetoelectric cross-coupling.

“We found that in our work, because of our single domain, we could actually see what was going on using multiple probing, or imaging, techniques,” he says. “The mechanism is intrinsic. It’s reproducible — and that means you can make a device without any degradation, in a predictable way.”

To image the changing electric and magnetic properties switching in real time, Eom and his colleagues used the powerful synchrotron light sources at Argonne National Laboratory outside Chicago, and in Switzerland and the United Kingdom.

“When you switch it, the electrical field switches the electric polarization. If it’s ‘downward,’ it switches ‘upward,'” he says. “The coupling to the magnetic layer then changes its properties: a magnetoelectric storage device.”

That change in direction enables researchers to take the next steps needed to add programmable integrated circuits — the building blocks that are the foundation of our electronics — to the material.

While the homogenous material enabled Eom to answer important scientific questions about how magnetoelectric cross-coupling happens, it also could enable manufacturers to improve their electronics.

“Now we can design a much more effective, efficient and low-power device,” he says.

The ConFab 2018, to be held at The Cosmopolitan of Las Vegas on May 21-23, is thrilled to announce the newest opening day Keynote speaker, Professor John M. Martinis. John is a Research Scientist who heads up Google’s Quantum AI Lab. He also holds the Worster Chair of Experimental Physics at the University of California, Santa Barbara. The lab is particularly interested in applying quantum computing to artificial intelligence and machine learning, and as one of Google’s quantum computing gurus, John shared the company’s “stretch goal”. That is to build and test a 49-qubit (“quantum bit”) quantum computer by the end of this year. The test will be a milestone in quantum computer technology.

The conference team is also very excited to have IBM distinguished Engineer, Rama Divakaruni – who is responsible for IBM Advanced Process Technology Research – present his Keynote Address: How Artificial Intelligence is driving the “New” Semiconductor Era. Both Keynotes, set for May 21, promise to be outstanding presentations.

Additional outstanding speakers at The ConFab 2018 include:

  • Dan Armbrust, CEO and Co-founder of Silicon Catalyst will present: “Enabling a Startup Ecosystem for Semiconductors” describing the current environment for semiconductor startups.
  • George Gomba, GLOBALFOUNDRIES VP of Technology Research will discuss the EUV lithography project with SUNY Polytechnic Institute now finding its way into advanced semiconductor manufacturing.
  • John Hu, Director of Advanced Technology for Nvidia – John heads up R&D of Advanced IC Process Technologies and programs, Design For Manufacturing, Testchips, and New technology/ IC product.
  • Tom Sonderman, President of Sky Water Technology Foundry will focus on smart manufacturing ecosystems based on big data platform, predictive analytics and IoT.
  • Kou Kuo Suu of ULVAC Japan will delve into manufacturing various types of NVM memory chips, including Phase-Change memory (PCRAM).

More industry experts adding to the conference will be announced soon.  Further event details are available at: www.theconfab.com.

The semiconductor industry continued its upward trend in the third quarter of 2017, notching 12 percent sequential growth with strength across all application markets, according to IHS Markit (Nasdaq: INFO). Global revenue totaled $113.9 billion, up from $101.7 billion in the second quarter of 2017.

As memory prices remain high and the wireless market continues to see strong demand through the fourth quarter, 2017 is shaping up to be a record-breaking year for the semiconductor industry. IHS Markit projects that semiconductor revenue will reach a record-high $428.9 billion in 2017, representing a year-over-year growth rate of 21 percent.

Key growth drivers

All application end markets posted sequential growth over the prior quarter, with wireless communications and data processing categories leading the pack.

Revenue from wireless applications grew faster sequentially in the third quarter of 2017 than any of the other high-level application markets. Semiconductor revenue from wireless applications was a record high $34.8 billion in the third quarter, representing nearly 31 percent of the total semiconductor market. IHS Markit anticipates an even bigger fourth quarter for wireless applications, projecting $37.5 billion in revenue — and more than $131 billion for the full-year 2017.

As the wireless market evolves, this growth can be attributed to a number of factors. ”More complex and comprehensive smartphone systems on a chip are supporting applications such as augmented reality and computational photography,” said Brad Shaffer, senior analyst for wireless semiconductors and applications at IHS Markit. “Premium smartphones have increasing amounts of memory and storage. The radio frequency content in these smartphones has also grown considerably over the past few product generations, with many high-end smartphones now supporting gigabit LTE mobile broadband speeds.”

The memory markets proved once again to be the driving force and highest-growing segment for semiconductors in the third quarter of 2017. “The DRAM industry had another record quarter with $19.8 billion in revenue, exceeding the prior record by more than $3 billion,” said Mike Howard, director for DRAM memory and storage research at IHS Markit. “Prices and shipments were up during the quarter as strong demand for mobile and server DRAM continued to propel the market.”

Top_5_memory

The NAND industry had another record quarter as well, growing 12.9 percent in the third quarter of 2017, with total revenue reaching $14.2 billion. “Pricing was flat in the quarter, as seasonally strong demand driven by the mobile and solid-state drive segments was able to offset moderate shipment growth,” said Walter Coon, director for NAND flash technology research at IHS Markit. “The market is expected to soften exiting 2017 and into early next year, as the industry transition to 3D NAND technology continues to progress and the market enters a traditionally slower demand period.”

Manufacturer moves

Samsung officially passed Intel to become the number-one semiconductor supplier in the world in the third quarter of 2017, growing 14.9 percent sequentially. Intel now comes in at number two, with SK Hynix securing the third rank in terms of semiconductor revenue for the third quarter.

top_5_semiconductor

Among the top 20 semiconductor suppliers, Apple and Advanced Micro Devices (AMD) achieved the highest revenue growth quarter over quarter by 46.6 percent and 34.3 percent, respectively.

There was a good deal of market share movement within the top 10 suppliers throughout the third quarter as well. In terms of semiconductor revenue, Qualcomm surpassed Broadcom Limited to secure the number-five spot, while nVidia made its way into the top 10 ranking for the first time ever. At this time last year, the top five semiconductor companies controlled 40 percent market share of the entire industry. The top five gained 4.2 percent more market share this year over last year, while comprising three memory companies instead of the previous two.

More information on this topic can be found in the latest release of the Semiconductor Competitive Landscaping Tool (CLT) from the IHS Markit Semiconductor Competitive Landscape CLT Intelligence Service.

Soitec, a designer and manufacturer of semiconductor materials for the electronics industry, today announced the latest generation of silicon-on-insulator (SOI) substrates in its Imager-SOI product line designed specifically for fabricating front-side imagers for near-infrared (NIR) applications including advanced 3D image sensors. The new SOI wafers from Soitec are now available in large volumes with high maturity to meet the needs of customers in the growing market for 3D cameras used in augmented reality (AR) and virtual reality (VR), facial-recognition security systems, advanced human/machine interfaces and other emerging applications.

“Our newest Imager-SOI substrates represent a major achievement for our company and a smart way to increase performance in NIR spectrum domain, accelerating new applications in the growing 3D imaging and sensing markets,” said Christophe Maleville, executive vice president of the Digital Electronics Business Unit at Soitec. “Innovative sensor design on SOI is achieved by leveraging our advanced know-how in ultrathin material layer transfer and our extensive manufacturing experience.”

The new SOI substrate makes it possible to simply extend the operating range of high resolution silicon based CMOS image sensors into the NIR spectrum. This optimized version of SOI substrate greatly improves the signal to noise ratio in the NIR spectrum.

The market for 3D imaging and sensing devices is forecast to grow at a CAGR of 37.7 percent over the next five years and reach US$9 billion in sales by 2022, according to Yole Développement. The market research and consulting firm predicts that 2018 will likely see a massive influx of products, with the first applications in mobile electronics and computing.*

Graphene ribbons that are only a few atoms wide, so-called graphene nanoribbons, have special electrical properties that make them promising candidates for the nanoelectronics of the future: While graphene – a one atom thin, honeycomb-shaped carbon layer – is a conductive material, it can become a semiconductor in the form of nanoribbons. This means that it has a sufficiently large energy or band gap in which no electron states can exist: it can be turned on and off – and thus may become a key component of nanotransistors.

The microscopic ribbons lie criss-crossed on the gold substrate. Credit: EMPA

The microscopic ribbons lie criss-crossed on the gold substrate. Credit: EMPA

The smallest details in the atomic structure of these graphene bands, however, have massive effects on the size of the energy gap and thus on how well-suited nanoribbons are as components of transistors. On the one hand, the gap depends on the width of the graphene ribbons, while on the other hand it depends on the structure of the edges. Since graphene consists of equilateral carbon hexagons, the border may have a zigzag or a so-called armchair shape, depending on the orientation of the ribbons. While bands with a zigzag edge behave like metals, i.e. they are conductive, they become semiconductors with the armchair edge.

This poses a major challenge for the production of nanoribbons: If the ribbons are cut from a layer of graphene or made by cutting carbon nanotubes, the edges may be irregular and thus the graphene ribbons may not exhibit the desired electrical properties.

Creating a semiconductor with nine atoms

Empa researchers in collaboration with the Max Planck Institute for Polymer Research in Mainz and the University of California at Berkeley have now succeeded in growing ribbons exactly nine atoms wide with a regular armchair edge from precursor molecules. The specially prepared molecules are evaporated in an ultra-high vacuum for this purpose. After several process steps, they are combined like puzzle pieces on a gold base to form the desired nanoribbons of about one nanometer in width and up to 50 nanometers in length.

These structures, which can only be seen with a scanning tunneling microscope, now have a relatively large and, above all, precisely defined energy gap. This enabled the researchers to go one step further and integrate the graphene ribbons into nanotransistors. Initially, however, the first attempts were not very successful: Measurements showed that the difference in the current flow between the “ON” state (i.e. with applied voltage) and the “OFF” state (without applied voltage) was far too small. The problem was the dielectric layer of silicon oxide, which connects the semiconducting layers to the electrical switch contact. In order to have the desired properties, it needed to be 50 nanometers thick, which in turn influenced the behavior of the electrons.

However, the researchers subsequently succeeded in massively reducing this layer by using hafnium oxide(HfO2) instead of silicon oxide as the dielectric material. The layer is therefore now only 1.5 nanometers thin and the “on”-current is orders of magnitudes higher.

Another problem was the incorporation of graphene ribbons into the transistor. In the future, the ribbons should no longer be located criss-cross on the transistor substrate, but rather aligned exactly along the transistor channel. This would significantly reduce the currently high level of non-functioning nanotransistors.

Micron Technology Inc. (Nasdaq:MU) today announced that the company has appointed Derek Dicker as vice president and general manager of the Storage Business Unit.

In this role, Dicker will be responsible for leading and expanding Micron’s solid-state storage business. This includes building world-class storage solutions to address the growing opportunity in large market segments like cloud, enterprise and client computing. He will report to Sumit Sadana, Micron’s executive vice president and chief business officer.

Dicker has 20 years of experience in the semiconductor industry, including sales, marketing and executive roles at Intel, IDT, PMC-Sierra and Microsemi Corporation. Most recently, he served as vice president and business unit manager of performance storage at Microsemi, where he led a global organization and drove all general management functions.

“Derek’s deep technical expertise and experience in the storage industry make him the ideal choice to lead our storage business,” Sadana said. “His strategic mindset, coupled with his outstanding track record of business leadership, will help us fully capitalize on our leading-edge NAND technologies and solutions.”

Dicker holds a bachelor’s degree in computer science and engineering from the University of California, Los Angeles.

 

Transphorm Inc., a designer and manufacturer of highest reliability (JEDEC and AEC-Q101 qualified) 650V gallium nitride (GaN) semiconductors, announced it received a $15 million investment from Yaskawa Electric Corporation. This news comes only a few weeks after Yaskawa revealed its integrated Σ-7 F servo motor relies on Transphorm’s high-voltage (HV) GaN to deliver unprecedented performance and power density. Transphorm intends to allocate the funds to various areas of its GaN product development.

“We’ve seen the benefits of working with gallium nitride from the R&D phases through to the application development phases of our products, such as photovoltaic converters and the integrated Σ-7 F servo motor,” said Yukio Tsutsui, General Manager of Corporate R&D Center from Yaskawa. “We look ahead to further developments from Transphorm and its cutting-edge technology.”

The integrated Σ-7 F products resulting from the companies’ co-development serves one of the core target markets that can benefit most from HV GaN: servo motors. The technology is also an optimal solution for automotive systems, data center and industrial power supplies, renewable energy and other broad industrial applications.

“Transphorm has consistently prioritized the quality and reliability of our GaN platform,” said Dr. Umesh Mishra, Chairman, CTO and co-founder of Transphorm. “That focus leads to strong customer relationships with visionaries such as Yaskawa and companies that not only innovate, but also influence market growth by demonstrating GaN’s real-world impact. Receiving Yaskawa’s recent support illustrates the rising confidence in GaN while underscoring its reliability.”

SiFive announced today that it has joined GLOBALFOUNDRIES’ FDXcelerator Partner Program, and will be making RISC-V CPU IP including SiFive’s E31 and E51 RISC-V cores available on GF’s 22FDX process technology. Based on the open source RISC-V ISA, the SiFive E31 offers embedded chip designers new capabilities in high performance within strict area and power requirements, and the SiFive E51 offers a full 64-bit performance at 32-bit price, power and area.

“As the RISC-V ecosystem continues to grow, SiFive’s leading CPU IP is seeing increased adoption. Our partnership with GF is going to enable an even larger pool of system designers to build on an industry-leading process platform,” said Naveed Sherwani, CEO, SiFive. “SiFive has led the RISC-V ecosystem from early on and we are excited to continue extending RISC-V into new market segments.”

“As members of the RISC-V Foundation, we are excited to see more RISC-V IP offerings made available on our processes,” said Gregg Bartlett, senior vice president of CMOS business at GF. “SiFive’s wide range of cores makes them an ideal partner for our FDXcelerator program.”

GF’s FDXcelerator Program brings together select partners to integrate their products or services into validated, plug-and-play design solutions, giving customers access to a broad set of quality offerings specific to 22FDX technology. The program’s open framework enables members to minimize development time and cost while simultaneously leveraging the inherent power and performance advantages of FDX technology.

North America-based manufacturers of semiconductor equipment posted $2.02 billion in billings worldwide in October 2017 (three-month average basis), according to the October Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI.

SEMI reports that the three-month average of worldwide billings of North American equipment manufacturers in October 2017 was $2.02 billion.The billings figure is 1.8 percent lower than the final September 2017 level of $2.05 billion, and is 23.7 percent higher than the October 2016 billings level of $1.63 billion.

“Equipment billings dipped in October, the fourth consecutive monthly decline during this record spending year,” said Ajit Manocha, president and CEO of SEMI. “In spite of this seasonal weakness, we expect equipment spending to increase by 30 percent or more this year and are positive about growth in 2018.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)
Year-Over-Year
May 2017
$2,270.5
41.8%
June 2017
$2,300.3
34.1%
July 2017
$2,269.7
32.9%
August 2017
$2,181.8
27.7%
September 2017 (final)
$2,054.8
37.6%
October 2017 (prelim)
$2,017.0
23.7%

Source: SEMI (www.semi.org), November 2017

 

SPTS Technologies, an Orbotech company and a supplier of advanced wafer processing solutions for the global semiconductor and related industries, today announced it has won an order for its Omega plasma etch system from Chengdu HiWafer Semiconductor Co., Ltd (HiWafer), China’s first pure-wafer foundry, to establish their new gallium nitride (GaN) on silicon carbide (SiC) production line. SPTS’s Synapse and ICP process modules on an Omega c2L platform will etch SiC backside vias (BSV) and GaN epitaxial layers to manufacture high power radio frequency (RF) devices. The high rate Omega system was selected over the competition because the Synapse provided superior SiC etch rates while the ICP module delivered improved selectivity for GaN etch.

“HiWafer is already a well-established Chinese foundry producer of gallium arsenide based pHEMT and HBT RF devices currently used in 4G communication, and they are an early adopter of SiC and GaN materials for use in high-end RF devices that target the worldwide 5G protocol,” stated Kevin Crofton, President of SPTS Technologies and Corporate Executive Vice President at Orbotech. “This leadership position is important as Power and RF applications are high on the ‘Made in China 2025’ agenda for promoting domestic production of semiconductor devices, and companies like HiWafer are well-positioned to contribute to realizing this national initiative. Our leadership in high rate etching of SiC and other dielectric materials will support HiWafer to provide manufacturing solutions for the coming 5G wave.”

Mr. Nengwu Gao, General Manager of HiWafer, stated, “Orbotech’s SPTS Technologies is a recognized leader in compound wafer processing solutions to the global power and RF device industries. The addition of SPTS’s Omega plasma etch system gives us the tools to compete in GaN on SiC RF technology in telecoms and transportation applications, including railway systems. Acquiring this capability enables us to explore new applications and supports our ambitions to become a highly profitable and successful semiconductor foundry.”