Category Archives: Semiconductors

The Global Semiconductor Alliance (GSA) today announced the 2017 award nominees for the GSA Awards Dinner Celebration. Featuring a new Master of Ceremonies format hosted by Wayne Brady, five-time Emmy winner and Grammy nominee, the celebration will take place on Thursday, December 7, 2017, at the Santa Clara Convention Center in Santa Clara, California. The program will recognize companies that have demonstrated excellence through their vision, strategy, execution and future opportunity. These companies will be honored for their achievements in several categories ranging from outstanding leadership to financial accomplishments, as well as overall respect within the industry.

The 2017 Dr. Morris Chang Exemplary Leadership Award winner is Ray Stata, Cofounder and Chairman of Analog Devices, Inc.

The evening’s program will recognize leading semiconductor companies that have exhibited market growth through technological innovation and exceptional business management strategies. The award categories and nominees (in alphabetical order) are as follows:

View Nominee Announcement Video

Start-Up to Watch Award

  • DecaWave Ltd.
  • Innovium, Inc.
  • SiFive, Inc.

Most Respected Private Semiconductor Company Award

  • Aquantia Corporation
  • Luxtera, Inc.
  • Montage Technology
  • Silego Technology, Inc.

Most Respected Emerging Public Semiconductor Company Award (Achieving $100 Million to $500 Million in Annual Sales):

  • Monolithic Power Systems, Inc. (MPS)
  • Parade Technologies, Ltd.
  • Power Integrations, Inc.

Most Respected Public Semiconductor Company Award (Achieving $500 Million to $1 Billion in Annual Sales):

  • ams AG
  • Shenzhen Goodix Technology Co., Ltd.
  • Silicon Labs

Most Respected Public Semiconductor Company Award (Achieving $1 Billion to $5 Billion in Annual Sales)

  • Analog Devices, Inc.
  • Dialog Semiconductor
  • Xilinx, Inc.

Most Respected Public Semiconductor Company Award (Achieving Greater than $5 Billion in Annual Sales)

  • Infineon Technologies AG
  • NVIDIA Corporation
  • NXP Semiconductors N.V.

Best Financially Managed Semiconductor Company Award (Achieving Up to $1 Billion in Annual Sales):

  • Parade Technologies, Ltd.
  • Silicon Labs
  • Silicon Motion Technology Corporation (Silicon Motion, Inc.)

Best Financially Managed Semiconductor Company Award (Achieving Greater than $1 Billion in Annual Sales)

  • Maxim Integrated
  • SK Hynix Inc.
  • Skyworks Solutions, Inc.

Analyst Favorite Semiconductor Company Award (chosen by analyst Rajvindra Gill of Needham & Company, LLC)

  • Microchip Technology Inc.
  • Micron Technology, Inc.
  • NVIDIA Corporation

Outstanding Asia Pacific Semiconductor Company Award

  • MediaTek Inc.
  • Samsung Electronics Co., Ltd.
  • Spreadtrum Communications

Outstanding EMEA Semiconductor Company Award

  • Graphcore
  • Infineon Technologies AG
  • STMicroelectronics
  • Valens

 

Alpha and Omega Semiconductor Limited (AOS) (Nasdaq:AOSL) a designer, developer and global supplier of a broad range of power semiconductors and power ICs, today announced the release of AONS66916 production utilizing the latest Alpha Shield Gate Technology Generation 2 (AlphaSGT2). The AONS66916 has RDS(ON) * Qg  (FOM) and more robust capability for a greater safety margin. In synchronous rectification, it is essential to optimize the reverse recovery charge and reduce the voltage overshoot. These attributes enable higher efficiency and robustness to critical high density telecom and server applications.

The AlphaSGT2 provides ~30% lower RDS(ON) compared to AlphaSGT1 and is designed to be more robust with significant avalanche energy improvement. AlphaSGT2 technology reduces both conduction and switching losses. Thus, with AlphaSGT2 technology, circuit designers can prevent paralleling devices for lower turn-on resistance, enabling higher power density in power supply applications.

“The new AlphaSGT2 100V technology is designed for critical applications such as Telecom and Datacom power supplies where power density, high efficiency, and robustness is essential,” said Peter H. Wilson, Director of Product Marketing at AOS.

Technical Highlights

Part Number VDS (V) VGS (V) RDS(ON)MAX (mOhms) Qg (typ) (nC) ID @ TA = 25°C (A)
@ 10V
AONS66916 100 ±20 3.6 67 100

The AONS66916 is immediately available in production quantities with a lead-time of 15 weeks. The unit price of 1,000 pieces is $ 1.2.

Alpha and Omega Semiconductor Limited, or AOS, is a designer, developer and global supplier of a broad range of power semiconductors, including a wide portfolio of Power MOSFET, IGBT, IPM and Power IC products.

Automotive electronic system sales are forecast to rise by a compound annual growth rate (CAGR) of 5.4% from 2016 through 2021, which is the highest among six major end-use system categories (Figure 1), according to data presented in the 2018 edition of the IC Insights’ IC Market Drivers—A Study of Key System Applications Fueling Demand for Integrated Circuits that will be released later this year.

worldwide electronic systems 1

Demand is rising for electronic systems in new cars with increasing attention focused on self-driving (autonomous) vehicles, vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communications, as well as on-board safety, convenience, and environmental features, and growing interest in electric vehicles.  Automotive electronics is growing as technology becomes more widely available on mid-range and entry-level cars and as consumers purchase technology-based aftermarket products.  For semiconductor suppliers, this is good news as analog ICs, MCUs, and a great number of sensors are required for many of these automotive systems.

The automotive segment is expected to account for an estimated 9.1% of the $1.49 trillion total worldwide electronic systems market in 2017 (Figure 2), a slight increase from 8.9% in 2015, and 9.0% in 2016. Automotive’s share of global electronic system production has increased only incrementally through the years, and is forecast to show only marginal gains as a percent of total electronic systems market through 2021, when automotive electronics are forecast to account for 9.8% of global electronic systems sales.  Though many electronics systems are being added in new vehicles, IC Insights believes pricing pressures on both ICs and electronic systems will keep the automotive end-use application from accounting for much more than its current share of total electronic systems through the forecast period.

worldwide electronic systems 2

Other electronic system and IC market highlights from the 2018 IC Market Drivers Report include the following.

• The automotive segment is forecast to be the fastest growing electronic system market through 2021. This is good news for the total automotive IC market, which is forecast to surge 22% in 2017 and 16% in 2018.

• Industrial electronic systems are forecast to enjoy the second-fastest growth rate (4.6%) through 2021 as robotics, wearable health devices, and systems promoting the Internet of Things help drive growth in this segment. Analog ICs are forecast to hold 45% of the industrial IC market in 2017.

• The 2016-2021 communication systems CAGR is projected to be 4.2% as global sales of smartphones and other mobile devices reach saturation.  Asia-Pacific is forecast to show the strongest regional growth of communication systems and account for 69% of the total communications IC market in 2017.

• The consumer electronic systems market is forecast to display a CAGR of 2.8% through 2021.  The logic segment is forecast to be the largest consumer IC market throughout the forecast.  In total, the consumer IC market is expected to register a 2.4% CAGR across the 2016-2021 time period.

• Flat or marginal demand for personal computing devices (desktops, notebooks, tablets) is expected to result in the computer systems market showing the weakest CAGR through 2021. The total computer IC market is forecast to increase 25% in 2017 driven by much higher average selling prices for computer DRAM and NAND flash memory.

 

BY ED KORCZYNSKI, Sr. Technical Editor

As previously reported by Solid State Technology, the eBeam Initiative recently reported the results of its lithography perceptions and mask-makers’ surveys. After the survey results were presented at the 2017 Photomask Technology Symposium, Aki Fujimura, CEO of D2S, the managing company sponsor of the eBeam Initiative, spoke with Solid State Technology about the survey results and current challenges in advanced lithography.

The Figure shows the consensus opinions of 75 luminaries from 40 companies who provided inputs to the perceptions survey regarding which Next-Generation Lithography (NGL) technologies will be used in volume manufacturing over the next few years. “We don’t want to interpret these data too much, but at the same time the information should be representative because people will be making business decisions based on this,” said Fujimura.

Screen Shot 2017-11-08 at 2.19.48 PM

Confidence in Extreme Ultra-Violet (EUV) lithography is now strong, with 79 percent of respondents predicting it will be used in HVM by the end of 2021, a huge increase from 33 percent just three years ago. Another indication of aggregate confidence in EUVL technology readiness is that only 7 percent of respondents thought that “actinic mask inspection” would never be used in manufacturing, significantly reduced from 22 percent just last year.

Asking luminaries is very meaningful, and obviously the answers are highly correlated with where the industry will be spending on technologies,” explained Fujimura.

“The predictability of these sorts of things is very high. In particular in an industry with confidentiality issue, what people ‘think’ is going to happen typically reflects what they know but cannot say.”

Fujimura sees EUVL technology receiving most of the investment for next-generation lithography (NGL), “Because EUV is a universal technology. Whether you’re a memory or logic maker it’s useful for all applications. Whereas nano- imprint is only useful for defect-resistant designs like memory.”

Vivek Bakshi’s recent blog post details the current status of EUVL technology evolution. With practical limits on the source-power, many organization are looking at ways to increase the sensitivity of photoresist so as to increases the throughput of EUVL processes. Unfortunately, the physics and chemistry of photoresists means that there are inherent trade- offs between the best Resolution and Line-width-roughness (LWR) and Sensitivity, termed the “RLS triangle”.

Mask-making metrics

The business dynamics of making photomasks provides leading indicators of the IC fab industry’s technology direc- tions. A lot of work has been devoted to keeping mask write times consistent compared with last year, while the average complexity of masks continues to increase with Reticle Enhancement Technologies (RET) to extend the resolution of optical lithography. Even with write times equal, the average mask turn-around time (TAT) is significantly greater for more critical layers, approaching 12 days for 7nm- to 10nm-node masks.

“A lot of the increase in mask TAT is coming from the data-preparation time,” explained Fujimura. “This is important for the economics and the logistics of mask shops.” The weighted average of mask data preparation time reported in the survey is significantly greater for finer masks, exceeding 21 hours for 7nm- to 10nm-nodes. Data per mask continues to increase; the most dense mask now averages 0.94 TB, and the most dense mask single mask takes 2.2 TB.

Enabling the A.I. era


November 8, 2017

BY PETE SINGER, Editor-in-Chief

There’s a strongly held belief now that the way in which semiconductors will be designed and manufactured in the future will be largely determined by a variety of rapidly growing applications, including artificial intelligence/deep learning, virtual and augmented reality, 5G, automotive, the IoT and many other uses, such as bioelectronics and drones.

The key question for most semiconductor manufacturers is how can they benefit from these trends? One of the goals of a recent panel assembled by Applied Materials for an investor day in New York was to answer that question.

The panel, focused on “enabling the A.I. era,” was moderated by Sundeep Bajikar (former Sellside Analyst, ASIC Design Engineer). The panelists were: Christos Georgiopoulos (former Intel VP, professor), Matt Johnson (SVP in Automotive at NXP), Jay Kerley (CIO of Applied Materials), Mukesh Khare (VP of IBM Research) and Praful Krishna (CEO of Coseer). The panel discussion included three debates: the first one was “Data: Use or Discard”; the second was “Cloud versus Edge”; and the third was “Logic versus Memory.”

“There’s a consensus view that there will be an explosion of data generation across multiple new categories of devices,” said Bajikar, noting that the most important one is the self-driving car. NXP’s Johnson responded that “when it comes to data generation, automotive is seeing amazing growth.” He noted the megatrends in this space: the autonomy, connectivity, the driver experience, and electrification of the vehicle. “These are changing automotive in huge ways. But if you look underneath that, AI is tied to all of these,” he said.

He said that estimates of data generation by the hour are somewhere from 25 gigabytes per hour on the low end, up to 250 gigabytes or more per hour on the high end. or even more in some estimates.

“It’s going to be, by the second, the largest data generator that we’ve seen ever, and it’s really going to have a huge impact on all of us.”

Intel’s Georgiopoulos agrees that there’s an enormous amount of infrastructure that’s getting built right now. “That infrastructure is consisting of both the ability to generate the data, but also the ability to process the data both on the edge as well as on the cloud,” he said. The good news is that sorting that data may be getting a little easier. “One of the more important things over the last four or five years has been the quality of the data that’s getting generated, which diminishes the need for extreme algorithmic development,” he said. “The better data we get, the more reasonable the AI neural networks can be and the simpler the AI networks can be for us to extract information that we need and turn the data information into dollars.” Check out our website at www.solid-state.com for a full report on the panel.

The temperature impact on the performance of UHP pressure transducers is discussed.

BY YANLI CHEN, Ph.D. and MATTHEW MILBURN, P.E., UCT, Hayward, CA

As the semiconductor industry develops new films that require heated delivery systems, all related components need to be characterized at elevated temperatures. Vacuum pressure measurement components, typically called manometers, have been used at elevated temperatures for many years. In fact, many of the vacuum measurement transducers are internally heated to a known temperature to stabilize the mechanical relationships between moving parts and the sensors used to measure the movement. This stabilization enables the precision and inaccuracy of the measurement to be greatly improved. For positive pressure UHP transducers, this elevated temperature characterization has not been done. Based on the testing performed at UCT, temperature related performance variations are very real and must be carefully considered before choosing a positive pressure transducer for elevated temperature use. Since the industry is driving toward higher delivery system operating temperatures, temperature effects will become more important.

The UHP pressure transducer is a widely-used component in the semiconductor industry and the performance is very important for process control and process monitoring. Selecting a proper UHP pressure transducer with good performance for the specific application is challenging, because different UHP pressure transducers manufacturers have different parameters listed in their data and specification sheets. Behind the data presented, it was found that different test procedures and data processing methods were used to determine and report performance characteristics. This reality creates a situation where, without standardized test method or reporting format, neither the specifier nor the end user can compare the performance of different brands of pressure transducers. To date, the industry has not recognized the full scope of the specification problem nor developed a standardized testing and reporting program. A new push toward standardization has become available with the publishing of SEMIF113 “Test Method For Pressure Transducers Used In Gas Delivery Systems” in November of 2016.

In order to have a better understanding about the performance of different UHP pressure transducer manufacturers’ products, UCT initialized a comprehensive performance evaluation project with a participation of three major UHP pressure transducer manufacturers (MFG A, MFG B and MFG C). The totality of the project covered a total of nine test categories, including warm up time test, input voltage sensitivity test, repeatability, linearity, hysteresis and inaccuracy test, reproducibility test, thermal coefficient test, drift test, accelerated lift cycle test, proof and burst test. The topic of this paper is the thermal coefficient test. Interested readers can find the other article “Comprehensive performance evaluation of UHP pressure transducers” published on the VOL. 59 NO. 4 of Solid State Technology (June 2016), which demonstrated the test method of repeatability, linearity, hysteresis and inaccuracy.

Ideally, a pressure transducer would sense pressure and remain unaffected by other environmental changes. In reality, however, the signal output of every pressure transducer is somewhat affected by variations in environment and fluid temperature. Temperature changes can cause the expansion and contraction of the sensor materials, fill fluids, housings, and electronics. Temperature changes also can affect the sensor’s resistors and electrical connections through the thermoelectric effects. Typically, a sensor’s behavior regarding changes in temperature is characterized by two temperature coefficients: temperature effect on zero (TC zero) and temperature effect on span (TC Span). TC zero is expressed as a percentage of full scale and indicates the greatest deviation of a pressure transducer at zero setpoint per equal temperature change (such as 10K or 50°C) during the operating temperature range. TC span is also expressed as a percentage of full scale and indicates the greatest deviation of a pressure transducer at 100%FS setpoint per equal temperature change (such as 10K or 50°C) during the operating temperature range. FIGURES 1, 2 and 3 list the TC zero and TC span of pressure transducer products of MFG A, MFG B and MFG C, respectively.

Screen Shot 2017-11-08 at 1.44.10 PM

Comparing the three thermal coefficient specifications above for MFG A, MFG B and MFC C, it is not possible to conclude which manufacturer’s product is the best for thermal behavior. Therefore, a standard test method and data process for thermal effects evaluation is needed.

Screen Shot 2017-11-08 at 1.44.20 PM

Test setup and procedure

Three major UHP pressure transducer manufacturer (MFG A, MFG B, and MFG C) participated in this comprehensive performance evaluation project by providing test samples. Table 1 shows the detailed information of all the devices under tests (DUTs). Twelve DUTs were installed in a test fixture designed by UCT for running simultaneous tests. The schematic of the test fixture is shown in FIGURE 4. The benefit of this design is to save significant time that would be otherwise used for assembly, disassembly, and testing, and eliminates the potential for setup errors if each transducer was tested separately in the battery of tests.

Screen Shot 2017-11-08 at 1.44.33 PM

The test was conducted in a temperature controlled environmental chamber (see Figure 5). The following sequence of steps were taken:

• A leak integrity test
• Make the initial zero adjustment per the manufacturer’s instructions
• Adjust the temperature of the environmental chamber to 0°C and allow the temperature to stabilize for a minimum period of two hours.
• Adjust the pressure to 0% FS (-14.7 psig), and record the signal output of all the DUTs and the pressure reference device after the pressure stabilization.
• Adjust the pressure to 100% FS(235.3 psig),andrecord the signal output of all the DUTs and the pressure reference device after the pressure stabilization.
• Repeat the same procedure for the temperature setpoints of 20°C, 40°C and 60°C at the pressure setpoints of 0%FS and 100%FS.

Screen Shot 2017-11-08 at 1.44.41 PM

Results and discussion

The TC zero (0%FS) and TC span (100%FS) values of all DUTs are listed in Table 2. For each manufacturer’s sample group, the highest value for the thermal coefficients at zero and span are highlighted in red; the lowest value for the thermal coefficients at zero and span are highlighted in green. To reiterate, the smaller the TC value, the better.

• For the DUTs from MFG A, the smallest TC zero is 0.0022%FS/°C and the smallest TC span is 0.0324%FS/°C.
• For the DUTs from MFG B, the smallest TC zero is 0.0012%FS/°C and the smallest TC span is 0.0099%FS/°C.
• For the DUTs from MFG C, the smallest TC zero is 0.0102%FS/°C and the smallest TC span is 0.0215%FS/°C.
• For the DUTs from MFG A, the largest TC zero is 0.0127%FS/°C and the largest TC span is 0.0564%FS/°C.
• For the DUTs from MFG B, the largest TC zero is 0.0042%FS/°C and the largest TC span is 0.0155%FS/°C.
• For the DUTs from MFG C, the largest TC zero is 0.0283%FS/°C and the largest TC span is 0.0354%FS/°C.

The extreme TC values for each manufacturer are summarized in Table 3. As shown in this table, the MFG B product has the lowest value (0.0042%FS/°C) and MFG C product has the highest value (0.0283%FS/°C) for the TC zero. For the TC span, the MFG B product still has the lowest value (0.0155%FS/°C), and the MFG A product has the highest value (0.0564%FS/°C).

Screen Shot 2017-11-08 at 1.44.49 PM

To compare the results to the published specification from MFG A, the results needed to be converted and are listed in Table 4.

Screen Shot 2017-11-08 at 1.44.59 PM

Comparing test results with the published specifications (FIGURE 1), the MFG A devices are meeting their thermal coefficient specification.

To compare the results to the published specification from MFG B, the results needed to be converted and are listed in Table 5.

Screen Shot 2017-11-08 at 1.45.08 PM

Compared with the published specifications (FIGURE 2), the MFG B devices are meeting their thermal coefficient specification at zero. All the MFG B devices except DUT 6 meet the of the thermal coefficient specification at span. However, the TC span for DUT 6 is 0.15550%FS/10K, which is very close to the specification value (0.15%FS/10K).

To compare the results to the published specification from MFG C, the results needed to be converted and are listed in Table 6.

Screen Shot 2017-11-08 at 1.45.15 PM

Compared to the published MFG C specifications (FIGURE 3), the MFG C devices are meeting their thermal coefficient specification.

The error change with the temperature increase of all the DUTs at 0%FS is shown graphically in FIGURE 6. Comparing the three plots, it can be seen that the DUTs from manufacturer C have the largest thermal variation across the temperature range of the test as well as device to device variation. The DUTs from manufacturer B have the smallest thermal variation across the temperature range of the test as well as device to device variation.

The error change with the temperature increase of all the DUTs at 100%FS is shown graphically in FIGURE 7. Comparing the three plots, it can be seen that the DUTs from manufacturer C have the largest thermal variation across the temperature range of the test as well as device to device variation. The DUTs from manufacturer B have the smallest fluctuation across the temperature range.

Conclusion

Based on this study, transducers marketed as comparable to each other display dramatically different performance levels within a relatively small temperature range which could lead to process reproducibility challenges. As the demand for higher temperature applications increases, these temperature performance variances will become more pronounced. These variations may prove to be very problematic with tool-to-tool process replication or when a transducer is replaced as a repair activity and the new transducer does not have the same performance characteristic as the old unit. The test results also demonstrate that the published specifications need to be standardized to improve direct comparison by end users. In addition, a uniform test procedure and data processing method needs to be adopted by the industry. The pressure measurement task force of SEMI North America Gases and Facilities Committee has developed and published a new pressure transducer measurement standard in November of 2016 based on this study.

Temperature-related shift not only contributes to the overall inaccuracy of a pressure transducer in a particular application, but they also factor into the economics of designing and manufacturing pressure transducers. This is due to the fact that temperature compensation is a complex, time-consuming, and expensive process that requires a significantly larger investment in production equipment and a deeper understanding of the influencing parameters.

References

1. Chemical Engineering Progress (CEP), June 2014 Gassmann, E. (2014, June) Pressure Sensor Fundamentals: Interpreting Accuracy and Error, 37-45
2. IEC 61298-3 Process measurement and control devices-General methods and procedures for evaluating performance-Part 3: Tests for the effects of influence quantities
3. SEMI C59-1104-0211R Specifications and Guidelines for Nitrogen
4. SEMI F1-0812 Specification for leak integrity of high-purity gas piping systems and components
5. SEMI F62-1111 Test method for determining mass flow controller performance characteristics from ambient and gas temperature effects
6. SEMI F113-1116 Test method for pressure transducers used in gas delivery systems

By Ajit Manocha, president and CEO, SEMI

Artificial intelligence (AI) may be a hot topic today, but SEMI has helped to incubate Big Data and AI since its founding. Early in SEMI’s history, SEMI’s always intelligent members worked together to introduce International Standards that enabled different pieces of equipment to collect and later pass data.  At first, it was for basic interoperability and equipment state analysis.  Later, SEMI data protocol Standards allowed process and metrology data to be used locally and across the fab to approach the goals of Smart Manufacturing and AI – for the equipment itself to make adjustments based on incoming wafer data.

Ajit--photo 1--sample.e.XL3A5483 (from pdg)As a part of this evolution, SEMI members developed the latest sensors and computational hardware that could ever better sense, analyze and act on the environment. Often first to use its own newly developed hardware, progress in this area was critical toward improving the likelihood of success for one of the world’s most complicated production processes – and coping with the breakneck speed of Moore’s Law – by accelerating capabilities that would later be regarded as the basis for machine learning and “thinking” systems.

Since then, process steps have increased from about 175 to as many as 1,000 for the leading technology nodes. By the time 300mm wafers were introduced, manufacturing intelligence and automation sharply increased productivity while reducing fab labor by more than 25 percent. Employing adaptive models, modern leading-edge factories are fully automated and operate at nearly 60 percent autonomous control.

Today, AI is akin to where IoT was yesterday in the hype cycle – popping up everywhere as a major consideration for the future. Neither IoT nor AI is hype, though – they’re the future.  There is ever more at stake for SEMI members with AI.  AI appears to be the next wave helping to maintain double-digit growth for the foreseeable future.

As part of its appeal for the global supply chain, AI can be a key silicon driver for three inflections that should benefit society. First, there is a massive increase in the amount of compute needed. Half of all the compute architectures shipping in 2021 will be supporting and processing AI.

Second, the Cloud will flourish and the Edge will bloom. By 2021, 50 percent of enterprise infrastructure will employ cognitive and artificial intelligence.

Third, new species of chips will emerge, such as the devices fueling IC content and electronics for the rapid growth of disruptive capabilities in vehicles and autonomous cars (as well as medical and agricultural applications, for example). There are also many more advantages created with and for AI as SEMI members enable new materials and advanced packaging.

What results can be measured from these changes for the global electronics manufacturing supply chain? More apps, more electronics, more silicon and more manufacturing.

On the other hand, the technologies alone create relatively little business value if the problems in our factories and markets are not well understood. There’s a great need to anticipate and guide AI. This requires a new kind of collaboration.

To address this need, SEMI’s vertical application platforms have been created for Smart Data (which is all about AI), and also for Smart MedTech, Smart Transportation, Smart Manufacturing and IoT. This higher degree of facilitated collaboration serves to cultivate multiple “smart communities” that accelerate progress for AI, better directing how connected networks and data mining can step up the pace for advancement of global prosperity. This process also provides members with access to untapped business opportunities and new players.​​

Ajit--photo 2 (panel)_D512959

We at SEMI are learning right along with our members. If you attended SEMICON West in July, several lessons about AI were presented by the Executive Panel (“Meeting the Challenges of the 4th Industrial Revolutions along the Microelectronics Supply Chain”) with Mary Puma (Axcelis), Shaheen Dayal (Intel), Lori Ciano (Brooks Automation) and Regenia Sanders (Ernst & Young). This very timely and excellent panel discussed how and where predictive analytics can have the biggest impact and the implications of sharing (and not sharing) data for problem solving and process optimization.

Ensuring that the SEMI staff gleans everything possible from the experts, we hosted an “encore” of the Executive Panel in October in our headquarters for an even more in-depth discussion about how to enhance collaboration across the supply chain in support of AI.

Going forward, these SEMI vertical platform communities will help to simplify and accelerate supply chain engagement for member value. Collaboration will play an ever greater role for using AI to master the making of advanced node semiconductor devices and enabling limitless cognitive computing. As a result, AI as we know it today, has a big head start over the previous pace of evolution for one of our great trendsetters, Moore’s Law.

Join the conversation.  Find out how you can work with SEMI to advance the AI – and especially AI in semiconductor manufacturing.  Frank Shemansky Jr., Ph.D., is heading up SEMI’s formation of SEMI’s Smart Data vertical application platform.  Let Frank know ([email protected]) you’re interested and he’ll give you more information on what’s to come.  As always, please let me know your thoughts.

 

By Lara Chamness, SEMI

2017 will be a record-breaking year. Semiconductor sales will exceed $400 billion for the first time and semiconductor equipment sales will finally shatter the historic high set in 2000. What is driving this growth?

Monolithic demand drivers have been replaced by a diversity of applications including: Augmented Reality, Virtual Reality, Artificial Intelligence, cloud storage, Smart Automotive (driver assistance and autonomous), Smart Manufacturing, and Smart MedTech. These proliferating demand drivers and ensuing increasing silicon (semiconductor) content in electronics is fueling what many are calling a “super cycle.” The overwhelming majority of semiconductor devices used to enable these end markets are commodities, creating a renaissance for smaller wafer diameter fabs (200mm and smaller).

Not only are legacy fabs seeing a resurgence, the industry is seeing the evolution of China transitioning away from primarily being a consumer of chips towards developing a self-sufficient semiconductor supply chain. Spurred by the 2014 National IC Guideline, all IC ecosystem sectors in China made significant progress in 2016. Such as IC design becoming the largest semiconductor sector, surpassing IC packaging and test, with over 1,300 vendors. Advancements have been made in chip production with over 24 new fab construction projections underway or planned, prompting the wafer fab equipment market to exceed $11 billion in 2018 and to potentially surpass $18 billion by 2020.

SEMI’s complimentary webinar will take place on Thursday, November 9, 2017.

In this webinar, an overview of the latest semiconductor market trends, drivers and forecasts will be discussed. Segments covered will include fab capacity, equipment, and materials trends as well as discuss year-to-date data based on SEMI’s data collection programs. SEMI will provide a market update with data from SEMI’s Industry Research & Statistics Reports and Database, specifically highlighting two recently released reports: 200 mm Fab Outlook to 2021 and SEMI China IC Industry Outlook2017.

REGISTER for WEBINAR: 8:00am – 8:45am PST, Thur., Nov. 9, 2017

 

Worldwide silicon wafer area shipments increased during the third quarter 2017 when compared to second quarter 2017 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its quarterly analysis of the silicon wafer industry.

Total silicon wafer area shipments were 2,997 million square inches during the most recent quarter, a 0.7 percent increase from the record 2,978 million square inches shipped during the previous quarter. New quarterly total area shipments are 9.8 percent higher than third quarter 2016 shipments and continue to ship at their highest recorded quarterly level.

“Global silicon wafer shipment volumes surpassed record levels for the sixth quarter in a row, resulting in a new historical high,” said Chungwei (C.W.) Lee (李崇偉), chairman of SEMI SMG and spokesman, VP, Corporate Development and chief auditor of GlobalWafers (環球晶圓).  “While silicon demand is strong, silicon pricing remains well below pre-downturn levels.”

Silicon* Area Shipment Trends

Source: SEMI (www.semi.org), November 2017

Millions of Square Inches
2Q2016
3Q2016
4Q2016
1Q2017
2Q2017
3Q2017
Total
2,706
2,730
2,764
2,858
2,978
2,997

*Semiconductor applications only

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

 

Kyma Technologies, Inc., a developer of advanced wide bandgap semiconductor materials technologies, announced it has used its new K200 hydride vapor phase epitaxy (HVPE) growth tool to produce high quality 200mm diameter HVPE GaN on QST (QROMIS Substrate Technology) templates.

Today’s announcement of Kyma’s development of 200mm diameter GaN on QST templates follows its announcement in 2016 of its demonstration of 150mm diameter GaN on QST templates in partnership with QROMIS, Inc. (formerly Quora Technology, Inc.) and its recent announcement of the commissioning of Kyma’s K200 HVPE growth tool.

200-mm GaN on QST® Template

Pictured is one of the demonstrated 200mm diameter HVPE GaN on QST templates which consists of 10 microns of HVPE GaN grown on a 5 micron MOCVD GaN on QST wafer provided by QROMIS, Inc. X-ray diffraction rocking curve linewidths for the templates fall in the range of 250 and 330 arc-sec for the symmetric {002) and asymmetric {102} XRD peaks, respectively, which is consistent with high structural quality. Low wafer bow (~50 microns) and smooth surface morphology suggest these materials should support high performance device manufacturing.

Kyma’s newly constructed K200 HVPE tool represents a first for the industry and was designed by Kyma engineers to enable uniform and rapid growth of high quality GaN on a number of different substrates.

Keith Evans, President & CEO, commented, “We have successfully transferred the process for making high quality GaN to our K200 HVPE tool. The structural quality of the GaN produced on QROMIS’ QST substrate is excellent. We are currently engaging with customers interested in large diameter GaN on QST templates.”

Kyma and Qromis are partnered for this work under a Kyma-led US DOE Phase IIB SBIR with award number DE-SC0009653.

QROMIS recently began manufacturing 200-mm QST substrates and GaN-on-QST wafers using its foundry partner Vanguard International Semiconductor (VIS). VIS is planning to offer GaN power device manufacturing services on 8-inch diameter QST platform in 2018.

QROMIS co-founder & CEO Cem Basceri added, “QROMIS’ CMOS fab-friendly 200-mm diameter QST substrates and GaN-on-QST wafers represent a disruptive technology, enabling GaN epitaxy from a few microns to hundreds of microns for GaN power applications ranging from 100V to 1,500V or beyond in lateral, quasi vertical or vertical device forms, and device manufacturing on the same 8-inch or 12-inch diameter platform at Si power device cost. Kyma’s K200 HVPE technology represent an important value-add to QST-based GaN power device manufacturing by enabling the low cost deposition of a thicker and lower defect density GaN surface than is practically achievable using MOCVD growth alone.”

Kyma is also teamed with a semiconductor equipment OEM to manufacture K200 HVPE tools for customers who prefer to bring Kyma’s HVPE GaN growth process in-house.