Category Archives: Semiconductors

Semiconductor Manufacturing International Corporation (“SMIC”; NYSE: SMI; SEHK: 0981.HK), the largest and most advanced foundry in mainland China, today announced the appointment of Dr. Haijun Zhao and Dr. Liang Mong Song as SMIC Co-CEO and Executive Director.

Dr. Zhao, age 54, was appointed as the Chief Executive Officer of the Company on May 10, 2017. Dr. Zhao joined the Company in October 2010 and was appointed as Chief Operating Officer and Executive Vice President in April 2013. In July 2013, Dr. Zhao was appointed as General Manager of Semiconductor Manufacturing North China (Beijing) Corporation, a joint venture company established in Beijing and a subsidiary of the Company. Dr. Zhao received his bachelor of science and doctor of philosophy degrees in electronic engineering from Tsinghua University (Beijing) and a master degree in business administration from the University of Chicago. He has 25 years of experience in semiconductor operations and technology development.

Dr. Liang Mong Song, age 65, graduated with a doctor of philosophy degree in electrical engineering from the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley. Dr. Liang has been engaged in the semiconductor industry for over 33 years, and was involved in memory and advanced logic process technology development. He owns over 450 patents and has published over 350 technical papers. He is a Fellow of Institute of Electrical and Electronic Engineers (IEEE).

Dr. Zixue Zhou, Chairman of SMIC, commented, “I am very pleased that Dr. Haijun Zhao and Dr. Liang Mong Song have joined the board of directors of SMIC as Executive Directors. I also warmly welcome Dr. Liang Mong Song to join SMIC together with Dr. Haijun Zhao to serve as Co-CEO. For decades Dr. Liang has focused on integrated circuit (“IC”) technology research and development and team management, with excellence and successful experience in advanced IC process development and management. His accession will further enhance SMIC’s ability to develop process technology and narrow the advanced technology gap between SMIC and its international peers; and at the same time, his efforts will further enhance SMIC’s ability to serve its customers and improve the metrics of SMIC’s existing technology. In addition, he brings corporate culture of top tier companies, which will enhance the company’s corporate culture to world class standards. It is believed with Dr. Haijun Zho and Dr. Liang Mong Song’s joint efforts SMIC will be led to a new height and make contributions to the development of IC industry.”

Dr. Haijun Zhao, Co-CEO of SMIC remarked, “I am pleased to join the board of directors of SMIC as Executive Director, and warmly welcome Dr. Liang Mong Song to join SMIC. Dr. Liang’s great achievements in the semiconductor industry are obvious to all. His accession will strengthen our management team, and as Co-CEO I am looking forward to working together with Dr. Liang. Together with our management and staff we will strive to make SMIC a global first-class IC enterprise.”

Dr. Liang Mong Song, Co-CEO of SMIC said, “I am greatly honored to take on the position of Co-CEO and Executive Director of SMIC, which to me, is not merely an opportunity, but also a challenge. SMIC’s rapid developments in recent years have been notable in the industry, and I am looking forward to working closely with the board of directors, Dr. Haijun Zhao and the management team to continuously improve the competitiveness of SMIC in the area of international IC manufacturing.”

sureCore Ltd. today announced it has joined the GLOBALFOUNDRIES (GF) FDXcelerator™ Partner Program and will make both their Low Power “PowerMiser” and Ultra Low Voltage “EverOn” SRAM offerings available on GF’s 22nm FD-SOI (22FDX®) process technology. PowerMiser delivers dynamic and static power savings exceeding 50 percent and 20 percent respectively. EverOn is the first commercially available SRAM to enable robust and reliable operation at near threshold voltages delivering hitherto unprecedented power savings. sureCore SRAMs are built from standard foundry bit cells and need no process modifications

“GF’s 22FDX is a logical next step for developers who are currently in 28nm bulk processes” said CEO Paul Wells. “We believe the 22FDX technology offers many technical and commercial benefits when compared to standard bulk CMOS technology. Combined with sureCore’s low power SRAM technology it will provide a best-in-class platform for the development of low power devices. In particular the EverOn SRAM will enable developers of IoT and Wearables the capability to deliver true near threshold operation by voltage scaling in tandem with the logic. Operation at as low as 550mV, the bit cell retention voltage, is a real game changer.”

“Our collaboration with sureCore enables customers to fully leverage the benefits of GF’s 22FDX platform and meet the ultra-low-power requirements of next generation connected devices,” said Alain Mutricy, senior vice president of product management at GF.

Key to the break-through is sureCore’s patented “smart-Assist” technology that allows robust operation down to the bit cell retention voltage. Other architectural improvements include enhanced sleep modes as well as array subdivision into four banks, each being independently controllable to be active, in retentive sleep or powered off thereby facilitating even greater power efficiency.

The challenges of near-threshold design drove sureCore to implement a world class verification and characterisation regime exploiting leading edge EDA tooling as well as extensive silicon validation using targeted process skews. Successful completion of industry standard High Temperature Operating Life (HTOL) tests has confirmed the inherent robustness and reliability of the EverOn SRAM.

“Low power design is placing new demands on SoC developers and, compared to the restrictions imposed by standard memory, our EverOn SRAM enables a new dimension in low power capability,” said Eric Gunn, sureCore’s COO.

The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced the formation of an Automotive Birds of a Feather (BoF) Group to solicit industry input from original equipment manufacturers (OEMs) and their suppliers to enhance existing or develop new interface specifications for automotive applications. The group is open to both MIPI Alliance member and non-member companies to represent the broader automotive ecosystem.

Automobiles have become a new platform for innovation, and manufacturers are already using MIPI Alliance specifications as they develop and implement applications for passive and active safety, infotainment and advanced driver assistance systems (ADAS).MIPI interfaces such as Camera Serial Interface 2 (MIPI CSI-2SM), Display Serial Interface (MIPI DSISM) and Display Serial Interface 2 (MIPI DSI-2SM) are ideal for a variety of low- and high-bandwidth applications that integrate components such as cameras, displays, biometric readers, microphones and accelerometers. MIPI I3CSM helps automotive systems designers minimize the complexity, cost and development time for products that use multiple sensors in a space-constrained form factor. Highly sensitive, mission-critical automotive applications also benefit from MIPI interfaces’ low electromagnetic interference (EMI), a capability that’s been proven in billions of mobile phones and other handheld devices.

“Automakers already rely on MIPI Alliance’s industry-standard interfaces to enable a wide variety of applications, including collision mitigation and avoidance, infotainment and navigation,” said Matt Ronning, chair of the MIPI Alliance Automotive Subgroup and the Automotive BoF. “This call for participation helps ensure we cast a wide net to capture expertise to aid with extending existing and shape future MIPI specifications and collectively help realize the vision of how connected cars and automotive applications will evolve over the next decade. Just as mobile handset manufacturers benefited from the standardization that MIPI Alliance has provided, automotive OEMs would similarly benefit.”

“Active participation of automotive OEMs, tier-one and tier-two suppliers is greatly appreciated and necessary to, for example, work out the data link requirements between surround sensors, electronic control units, actors and displays for driver assistance and autonomous driving projects beyond 2020 and incorporate them into MIPI interface specifications,” said Uwe Beutnagel-Buchner, vice-chair of the MIPI Alliance Automotive Subgroup and the Automotive BoF.

For short-distance communications (< 0.3 meters), the MIPI CSI specification is the most widely adopted in automotive camera applications; MIPI DSI is rapidly gaining adoption also. The Automotive BoF Group’s initial focus will be to examine how MIPI specifications can potentially be extended to support communication link distances up to 15 meters, and at the same time support the high data rates associated with cameras and radar sensors for autonomous driving systems.

Join the MIPI Alliance Automotive BoF Group

The MIPI Automotive BoF is seeking additional qualified experts from OEMs, tier-one suppliers, component suppliers and related companies to provide key input into current and future MIPI interface specifications. The Automotive BoF is expected to convene via teleconference on a biweekly basis, with face-to-face meetings planned as necessary.

Companies already participating in MIPI Alliance’s Automotive BoF Group include: Analog Devices, Inc.; Analogix Semiconductor, Inc.; BitSim AB; BMW Group; Cadence Design Systems, Inc.; Continental Corporation; Etron Technology, Inc.; Ford Motor Company; Genesys Logic, Inc.; Hardent Inc.; Lontium Semiconductor Corporation; Microchip Technology Inc.; Mixel, Inc.; Mobileye, an Intel Company; NVIDIA; NXP Semiconductors; ON Semiconductor; Parade Technologies Ltd.; Qualcomm Incorporated; Robert Bosch GmbH; Sony Corporation; STMicroelectronics; Synopsys, Inc.; TE Connectivity Ltd.; Tektronix Inc.; Teledyne LeCroy; Texas Instruments Incorporated; Toshiba Corporation; Western Digital and others.

ArterisIP, the supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced it has joined the FDXcelerator Partner Program. This program enables SoC designers to integrate ArterisIP interconnect IP into their projects with the ability to accelerate the timing closure process for FDX-based designs. The partnership speeds the development of pioneering products in applications from automotive ADAS and machine learning to small IoT processors.

ArterisIP offerings participating in the FDXcelerator program include:

  • The Ncore Cache Coherent Interconnect IP with Ncore Resilience Package, which has been chosen by the industry’s leading automotive ADAS, autonomous driving, and machine learning SoC vendors for its power, performance, and area advantages and ISO 26262 functional safety features.
  • The FlexNoC Interconnect IP with FlexNoC Resilience Package, which is the backbone interconnect for most mobility and consumer electronics SoC designs where power consumption, performance, and cost are key design metrics.
  • The PIANO Timing Closure Package, which assists back-end timing closure with technology that works earlier in the SoC design flow, thereby reducing schedule risk.

“The addition of ArterisIP to the FDXcelerator Partnership Program has already realized benefits with the implementation of an FD-SOI automotive ADAS multi-processor SoC with fellow FDXcelerator partner Dream Chip Technologies,” said Alain Mutricy, senior vice president of product management at GF. “ArterisIP’s commitment to GF’s FDX technology enables a scalable on-chip interconnect IP technology that will help our customers meet stringent automotive safety requirements.”

“GF’s FDXcelerator program plays an important role for ArterisIP, enabling us to gain access to FD-SOI technology process and design information to enable improved automation of our interconnect timing closure assistance technology,” said K. Charles Janac, President and CEO of ArterisIP. “Interconnect timing closure assistance is becoming imperative as technologies like FD-SOI shrink feature sizes and allow ever-increasing transistor and wire densities.”

A new method that precisely measures the mysterious behavior and magnetic properties of electrons flowing across the surface of quantum materials could open a path to next-generation electronics.

Found at the heart of electronic devices, silicon-based semiconductors rely on the controlled electrical current responsible for powering electronics. These semiconductors can only access the electrons’ charge for energy, but electrons do more than carry a charge. They also have intrinsic angular momentum known as spin, which is a feature of quantum materials that, while elusive, can be manipulated to enhance electronic devices.

A team of scientists, led by An-Ping Li at the Department of Energy’s Oak Ridge National Laboratory, has developed an innovative microscopy technique to detect the spin of electrons in topological insulators, a new kind of quantum material that could be used in applications such as spintronics and quantum computing.

A new microscopy method developed by an ORNL-led team has four movable probing tips, is sensitive to the spin of moving electrons and produces high-resolution results. Using this approach, they observed the spin behavior of electrons on the surface of a quantum material. Credit: Saban Hus and An-Ping Li/Oak Ridge National Laboratory, U.S. Dept. of Energy

A new microscopy method developed by an ORNL-led team has four movable probing tips, is sensitive to the spin of moving electrons and produces high-resolution results. Using this approach, they observed the spin behavior of electrons on the surface of a quantum material. Credit: Saban Hus and An-Ping Li/Oak Ridge National Laboratory, U.S. Dept. of Energy

“The spin current, namely the total angular momentum of moving electrons, is a behavior in topological insulators that could not be accounted for until a spin-sensitive method was developed,” Li said.

Electronic devices continue to evolve rapidly and require more power packed into smaller components. This prompts the need for less costly, energy-efficient alternatives to charge-based electronics. A topological insulator carries electrical current along its surface, while deeper within the bulk material, it acts as an insulator. Electrons flowing across the material’s surface exhibit uniform spin directions, unlike in a semiconductor where electrons spin in varying directions.

“Charge-based devices are less energy efficient than spin-based ones,” said Li. “For spins to be useful, we need to control both their flow and orientation.”

To detect and better understand this quirky particle behavior, the team needed a method sensitive to the spin of moving electrons. Their new microscopy approach was tested on a single crystal of Bi2Te2Se, a material containing bismuth, tellurium and selenium. It measured how much voltage was produced along the material’s surface as the flow of electrons moved between specific points while sensing the voltage for each electron’s spin.

The new method builds on a four-probe scanning tunneling microscope–an instrument that can pinpoint a material’s atomic activity with four movable probing tips–by adding a component to observe the spin behavior of electrons on the material’s surface. This approach not only includes spin sensitivity measurements. It also confines the current to a small area on the surface, which helps to keep electrons from escaping beneath the surface, providing high-resolution results.

“We successfully detected a voltage generated by the electron’s spin current,” said Li, who coauthored a paper published by Physical Review Letters that explains the method. “This work provides clear evidence of the spin current in topological insulators and opens a new avenue to study other quantum materials that could ultimately be applied in next-generation electronic devices.”

ClassOne Group, provider of semiconductor processing systems, today announced a special new financing program that seeks to give more attractive options to equipment purchasers.

ClassOne stated that the new financing program can eliminate the upfront cash outlay typically associated with equipment purchases, instead allowing more affordable and budgetable monthly payments. The new financing options will include capital leases, fair-market-value leases, term loans, payment deferrals and bridge-to-budget solutions. ClassOne has developed its new program in association with First American Vendor Finance, one of the nation’s largest and most highly respected equipment finance providers. The new financing program will be available both to current and future ClassOne customers.

“Our goal is to make it easier for users – especially budget-limited users – to acquire the tools and technology they need to achieve more profitable revenues,” said Byron Exarcos, CEO of ClassOne Group. “By integrating affordable new financing options directly into the equipment purchase process we can provide buyers with more attractive, more turnkey solutions – and put their new tools to work more quickly.”

The new financing program will be available both for ClassOne Technology and ClassOne Equipment purchases. ClassOne Technology provides new wet-chemical process tools specifically for ≤200mm wafer users, delivering advanced technology for the production of MEMs, power devices, RF, LEDs, photonics, sensors, microfluidics and other emerging technologies. ClassOne Equipment supplies the industry with certified high-quality refurbished systems, including major-name tools that cover a broad range of processing and metrology needs.

ClassOne Technology develops and produces innovative new wet-chemical equipment solutions that deliver advanced performance for the cost-conscious users of ≤200mm substrates.

By Zvi Or-Bach, President & CEO, MonolithIC 3D Inc.

Next week, as part of the IEEE S3S 2017 program, we will present a paper (18.3) titled “A 1,000x Improvement in Computer Systems by Bridging the Processor Memory Gap”. The paper details a monolithic 3D technology that is low-cost and ready to be rapidly deployed using the current transistor processes. In that talk, we will also describe how such an integration technology could be used to improve performance and reduce power and cost of most computer systems, suggestive of a 1,000x total system benefit. This game changing technology would be presented also in the CoolCube open workshop, a free satellite event of the conference 3DI program.

In an interesting coincidence DARPA just came out with a calls for >50x improvement in SoC

The 3DSoC DARPA solicitation reads: “As noted above, the 3DSoC technology demonstrated at the end of the program (3.5 Years) should also have the following characteristics:

–Capability of > 50X the performance at power when compared with 7nm 2D CMOS technology.

The 3DSoC program goal of 50x is to allow proposals suggesting US-built device at 90nm node vs. 7nm of computer chip using conventional 2D technologies. Looking at the table below we can see that if 7nm technology is used the benefit would be over 300x

darpa

This represents a paradigm shift for the computer industry and high-tech world, as normal scaling would provide 3x improvement at best. The emergence of AI and deep learning system makes memory access a key challenge for future systems, and indicate the far larger benefits offered by monolithic 3D integration.

The following charts were presented by the 3DSoC program manager Linton Salmon at the 3DSoC proposers day. The program calls for the use of monolithic 3D to overcome the current weakest link in computers – the memory wall.

darpa 2

Leading to the 3DSoC solicitation was work done by Stanford, MIT, Berkeley and Carnegie Mellon.

darpa 3

Proposals are due by Nov 6.

There is a unique opportunity to hear the 3DSoC DARPA Program Manager, Dr. Linton Salmon, articulate the program and what DARPA is looking for during his invited talk at the S3S 2017 conference next week.

Scientists have long searched for the next generation of materials that can catalyze a revolution in renewable energy harvesting and storage.

One candidate appears to be metal-organic frameworks. Scientists have used these very small, flexible, ultra-thin, super-porous crystalline structures to do everything from capturing and converting carbon into fuels to storing hydrogen and other gases. Their biggest drawback has been their lack of conductivity.

Now, according to USC scientists, it turns out that metal-organic frameworks can conduct electricity in the same way metals do.

This opens the door for metal organic-frameworks to one day efficiently store renewable energy at a very large, almost unthinkable scale.

The cobalt-based metal-organic framework used by the USC scientists, with purple representing cobalt, yellow representing sulfur and gray representing carbon. Credit: Smaranda Marinescu

The cobalt-based metal-organic framework used by the USC scientists, with purple representing cobalt, yellow representing sulfur and gray representing carbon. Credit: Smaranda Marinescu

“For the first time ever, we have demonstrated a metal-organic framework that exhibits conductivity like that of a metal. The natural porosity of the metal-organic framework makes it ideal for reducing the mass of material, allowing for lighter, more compact devices” said Brent Melot, assistant professor of chemistry at the USC Dornsife College of Letters, Arts & Sciences.

“Metallic conductivity in tandem with other catalytic properties would add to its potential for renewable energy production and storage” said Smaranda Marinescu, assistant professor of chemistry at the USC Dornsife College.

Their findings were published July 13 in the Journal of the American Chemical Society.

An emerging catalyst for long-term renewable energy storage

Metal-organic frameworks are so porous that they are well-suited for absorbing and storing gases like hydrogen and carbon dioxide. Their storage is highly concentrated: 1 gram of surface area provides the equivalent of thousands of square feet in storage.

Solar has not yet been maximized as an energy source. The earth receives more energy from one hour of sunlight than is consumed in one year by the entire planet, but there is currently no way to use this energy because there is no way to conserve all of it. This intermittency is intrinsic to nearly all renewable power sources, making it impossible to harvest and store energy unless, say, the sun is shining or the wind is blowing.

If scientists and industries could one day regularly reproduce the capability demonstrated by Marinescu, it would go a long way to reducing intermittency, allowing us to finally make solar energy an enduring and more permanent resource.

Metal or semiconductor: why not both?

Metal-organic frameworks are two-dimensional structures that contain cobalt, sulfur, and carbon atoms. In many ways, they very broadly resemble something like graphene, which is also a very thin layer of two-dimensional, transparent material.

As temperature goes down, metals become more conductive. Conversely, as the temperature goes up, it is semiconductors that become more conductive.

In the experiments run by Marinescu’s group, they used a cobalt-based metal-organic framework that mimicked the conductivity of both a metal and semiconductor at different temperatures. The metal-organic framework designed by the scientists demonstrated its greatest conductivity at both very low and very high temperatures.

GLOBALFOUNDRIES today unveiled AutoPro, a new platform designed to provide automotive customers a broad set of technology solutions and manufacturing services that minimize certification efforts and speed time-to-market. The company offers the industry’s broadest set of solutions for a full range of driving system applications, from informational Advanced Driver Assistance Systems (ADAS) to high-performance real-time processors for autonomous cars.

Today, the automobile semiconductor market is approximately $35 billion, and is expected to grow to an estimated $54 billion by 2023. This is driven by a need for new technologies that promise to enhance the driving experience such as navigation, remote roadside assistance and advanced systems that combine data from multiple sensors with high-performance processors that make control decisions.

“As vehicles move rapidly toward greater autonomy, auto manufacturers and parts suppliers are designing new ICs,” said Gregg Bartlett, senior vice president of the CMOS Business Unit at GF. “GF’s diverse automotive platform combines a range of technologies and services that meet the complexity and requirements for applications that enable connected intelligence for the automotive industry.”

Building on 10 years of automotive experience, the company’s AutoPro technology platform includes offerings in silicon germanium (SiGe), FD-SOI (FDX), CMOS and advanced FinFET nodes, combined with a broad range of ASIC design services, packaging and IP.

GF’s CMOS and RF solutions deliver an optimal combination of performance, integration and power efficiency for advanced sensors (radar, lidar, cameras), ADAS and autonomous processing (sensor fusion and AI compute) and body and powertrain control, with embedded eNVM technology for in-vehicle MCUs, as well as connectivity and infotainment systems. The company’s BCD and BCDLite® technologies provide high-voltage capabilities, with a path to supporting 48 volts that enable automotive power solutions for electric powertrain, Hybrid-electric (HEVs) and Internal Combustion Engine (ICE) vehicles.

These automotive solutions are available now, with additional access to quality and service across GF’s manufacturing fabs in the U.S., Europe, and Asia. GF AutoPro solutions support the full range of AEC-Q100 quality grades from Grade 2 to Grade 0.

AutoPro Service Package

In addition to GF’s technology platform, the company has initiated its AutoPro Service Package designed to ensure technology readiness, operational excellence and a robust automotive-ready quality system to continually improve quality and reliability throughout the product life-cycle.

GF’s Service Package builds on the company’s proven automotive quality and operational controls, providing customers access to the latest technologies which are designed to meet strict automotive quality requirements defined in the ISO, International Automotive Task Force (IATF), Automotive Electronics Council (AEC), and VDA (German) standards.

GF is currently working with major OEM customers and suppliers to develop and produce chips of the optimum quality and reliability as required by the various automotive applications.

Today, Intel announced the delivery of a 17-qubit superconducting test chip for quantum computing to QuTech, Intel’s quantum research partner in the Netherlands. The new chip was fabricated by Intel and features a unique design to achieve improved yield and performance.

The delivery of this chip demonstrates the fast progress Intel and QuTech are making in researching and developing a working quantum computing system. It also underscores the importance of material science and semiconductor manufacturing in realizing the promise of quantum computing.

Intel’s director of quantum hardware, Jim Clarke, holds the new 17-qubit superconducting test chip. (Credit: Intel Corporation)

Intel’s director of quantum hardware, Jim Clarke, holds the new 17-qubit superconducting test chip. (Credit: Intel Corporation)

Quantum computing, in essence, is the ultimate in parallel computing, with the potential to tackle problems conventional computers can’t handle. For example, quantum computers may simulate nature to advance research in chemistry, materials science and molecular modeling – like helping to create a new catalyst to sequester carbon dioxide, or create a room temperature superconductor or discover new drugs.

However, despite much experimental progress and speculation, there are inherent challenges to building viable, large-scale quantum systems that produce accurate outputs. Making qubits (the building blocks of quantum computing) uniform and stable is one such obstacle.

Qubits are tremendously fragile: Any noise or unintended observation of them can cause data loss. This fragility requires them to operate at about 20 millikelvin – 250 times colder than deep space. This extreme operating environment makes the packaging of qubits key to their performance and function. Intel’s Components Research Group (CR) in Oregon and Assembly Test and Technology Development (ATTD) teams in Arizona are pushing the limits of chip design and packaging technology to address quantum computing’s unique challenges.

About the size of a quarter (in a package about the size of a half-dollar coin), the new 17-qubit test chip’s improved design features include:

  • New architecture allowing improved reliability, thermal performance and reduced radio frequency (RF) interference between qubits.
  • A scalable interconnect scheme that allows for 10 to 100 times more signals into and out of the chip as compared to wirebonded chips.
  • Advanced processes, materials and designs that enable Intel’s packaging to scale for quantum integrated circuits, which are much larger than conventional silicon chips.

“Our quantum research has progressed to the point where our partner QuTech is simulating quantum algorithm workloads, and Intel is fabricating new qubit test chips on a regular basis in our leading-edge manufacturing facilities,” said Dr. Michael Mayberry, corporate vice president and managing director of Intel Labs. “Intel’s expertise in fabrication, control electronics and architecture sets us apart and will serve us well as we venture into new computing paradigms, from neuromorphic to quantum computing.”

Intel’s collaborative relationship with QuTech to accelerate advancements in quantum computing began in 2015. Since that time, the collaboration has achieved many milestones – from demonstrating key circuit blocks for an integrated cryogenic-CMOS control system to developing a spin qubit fabrication flow on Intel’s 300mm process technology and developing this unique packaging solution for superconducting qubits. Through this partnership, the time from design and fabrication to test has been greatly accelerated.

“With this test chip, we’ll focus on connecting, controlling and measuring multiple, entangled qubits towards an error correction scheme and a logical qubit,” said professor Leo DiCarlo of QuTech. “This work will allow us to uncover new insights in quantum computing that will shape the next stage of development.”

Advancing the quantum computing system

Intel and QuTech’s work in quantum computing goes beyond the development and testing of superconducting qubit devices. The collaboration spans the entire quantum system – or “stack” – from qubit devices to the hardware and software architecture required to control these devices as well as quantum applications. All of these elements are essential to advancing quantum computing from research to reality.

Also, unlike others, Intel is investigating multiple qubit types. These include the superconducting qubits incorporated into this newest test chip, and an alternative type called spin qubits in silicon. These spin qubits resemble a single electron transistor similar in many ways to conventional transistors and potentially able to be manufactured with comparable processes.

While quantum computers promise greater efficiency and performance to handle certain problems, they won’t replace the need for conventional computing or other emerging technologies like neuromorphic computing. We’ll need the technical advances that Moore’s law delivers in order to invent and scale these emerging technologies.

Intel is investing not only to invent new ways of computing, but also to advance the foundation of Moore’s Law, which makes this future possible.