Category Archives: Wafer Level Packaging

The historic flood of merger and acquisition agreements that swept through the semiconductor industry in 2015 and 2016 slowed significantly in 2017, but the total value of M&A deals reached in the year was still more than twice the annual average in the first half of this decade, according to IC Insights’ new 2018 McClean Report, which becomes available this month.  Subscribers to The McClean Report can attend one of the upcoming half-day seminars (January 23 in Scottsdale, AZ; January 25 in Sunnyvale, CA; and January 30 in Boston, MA) that discuss the highlights of the report free of charge.

In 2017, about two dozen acquisition agreements were reached for semiconductor companies, business units, product lines, and related assets with a combined value of $27.7 billion compared to the record-high $107.3 billion set in 2015 and the $99.8 billion total in 2016 (Figure 1).  Prior to the explosion of semiconductor acquisitions that erupted several years ago, M&A agreements in the chip industry had a total annual average value of about $12.6 billion between 2010 and 2015.

Figure 1

Figure 1

Two large acquisition agreements accounted for 87% of the M&A total in 2017, and without them, the year would have been subpar in terms of the typical annual value of announced transactions.  The falloff in the value of semiconductor acquisition agreements in 2017 suggests that the feverish pace of M&A deals is finally cooling off.  M&A mania erupted in 2015 when semiconductor acquisitions accelerated because a growing number of companies began buying other chip businesses to offset slow growth rates in major end-use applications (such as smartphones, PCs, and tablets) and to expand their reach into huge new market opportunities, like the Internet of Things (IoT), wearable systems, and highly “intelligent” embedded electronics, including the growing amount of automated driver-assist capabilities in new cars and fully autonomous vehicles in the not-so-distant future.

With the number of acquisition targets shrinking and the task of merging operations together growing, industry consolidation through M&A transactions decelerated in 2017.  Regulatory reviews of planned mergers by government agencies in Europe, the U.S., and China have also slowed the pace of large semiconductor acquisitions.

One of the big differences between semiconductor M&A in 2017 and the two prior years was that far fewer megadeals were announced.  In 2017, only two acquisition agreements exceeded $1 billion in value (the $18 billion deal for Toshiba’s memory business and Marvell’s planned $6 billion purchase of Cavium).  Ten semiconductor acquisition agreements in 2015 exceeded $1 billion and seven in 2016 were valued over $1 billion.  The two large acquisition agreements in 2017 pushed the average value of semiconductor M&A pacts to $1.3 billion.  Without those megadeals, the average would have been just $185 million last year. The average value of 22 semiconductor acquisition agreements struck in 2015 was $4.9 billion.  In 2016, the average for 29 M&A agreements was $3.4 billion, based on data compiled by IC Insights.

By Dan Tracy and Ji-Won Cho, SEMI

2017 proved to be record-setting year for the semiconductor industry. According to World Semiconductor Trade Statistics (WSTS), worldwide semiconductor market will have grown 20 percent, exceeding $400 billion for the first time. Among all major product segments, memory is the strongest, with sales are on track to grow 60 percent year-over-year, contributing to 30 percent of worldwide semiconductor sales in 2017. The consensus is that the growth momentum in memory will continue in 2018, driven by stable market demand and a favorable pricing environment.

Korean memory makers are the biggest beneficiaries of this memory super cycle. According to the Korea International Trade Association (KITA), the memory export value from Korea grew 86 percent through November 2017 compared to a year earlier, indicating that Korean memory makers are gaining more market share. On the supply side of the market, both Samsung and SK Hynix saw record high capital expenditures in 2017, contributing to the revenue surge from Korean suppliers. The spending spree is expected to continue in 2018. Together, Samsung and SK Hynix are forecast to invest over $20 billion in fab tools worldwide in 2018. (Track fab projects in detail with the SEMI World Fab Forecast or SEMI FabView databases).

WFF-Dec2017-chart

Samsung’s anchor project in 2018 is the ramp of its new Fab P1 phase 2 line in Pyeongtaek. Samsung plans to add new 3D NAND as well as DRAM capacity at this fab, fortifying its leading position in memory market. Beyond 2018, Samsung’s Xian phase 2 plan is also underway for future expansion.

SK Hynix, on the other hand, will ramp up M14 fab in 2018, adding new capacity for both 3D NAND and DRAM. In the meantime, SK Hynix is building a new fab, M15, in Cheongju, Korea, for 3D NAND and Fab C3 in Wuxi, China, for DRAM.

Both of these leading memory makers plan to ride this memory cycle and intend to vault ahead of the competition. Future demand for 3D NAND will continue to be the strongest, driving new fab projects in Korea now and later in China. Nevertheless, DRAM supply will also see new capacity coming online this year, followed by rare new fab projects. Memory not only accounts for a major portion of worldwide semiconductor sales but will also propel the investment momentum in the coming years.

SEMICON Korea 2018

The strong memory growth sets the stage for SEMICON Korea, January 31 through February 2 in Seoul. The largest microelectronics event in Korea, with over 40,000 attendees expected, SEMICON Korea will focus on enabling participants to “Connect, Collaborate, and Innovate.”

Key SEMICON Korea highlights include:

  • The 1,919 booths are sold out as major equipment, materials, and subsystem/parts companies exhibit their new products and technology solutions at the show.
  • Industry giants including Samsung, Micron, Intel, Toshiba, Sony, SK Hynix and LAM Research will connect with Korean equipment, materials and subsystems/parts manufacturers through the Supplier Search Program.
  • Participation by engineers is expected to be strong this year, after more than 10,000 engineers from​ Samsung Electronics, SK Hynix and DB Hitek attended SEMICON Korea 2017.

Major SEMICON Korea programs, including the following, will provide key insights into the Korea electronics manufacturing ecosystem:

  • Smart Automotive Forum
  • Smart Manufacturing Forum
  • Test Forum
  • SEMI Technology Symposium
  • Market Seminar

For a complete schedule of programs, visit www.semiconkorea.org/en/agenda-glance.

By Emir Demircan, Senior Manager Advocacy and Public Policy, SEMI Europe

Electronic manufacturing is becoming cool to today’s youth. STEM skills are hot in the global job market – though the number of females pursuing a STEM education continues to lag. Work-based learning is key to mastering new technologies. And the electronics industry needs a global talent pipeline more than ever.

These were key highlights from a SEMI Member Forum in December that brought together industry representatives and students in Dresden to weigh in on job-skills challenges facing the electronics manufacturers and solutions for the industry to consider. Here are the takeaways:

1) Electronics is much more than manufacturing

For many years, working in the manufacturing industry was not an appealing prospect for millennials. This picture is certainly changing. The pivotal role of electronics manufacturing in helping solve grand societal challenges in areas such as the environment, healthcare and urban mobility is reaffirmed by countries around the world. Electronics is the lifeblood of game-changing technologies such as autonomous driving, AI, IoT, and VR/AR, enticing more young employees into careers in research, design, technology development, production, cyber security and international business, and in disciplines ranging from engineering and data analytics to software development and cyber security.

What’s more, the drudgery of many factory jobs is disappearing thanks to automation, digitization and robotization. According to CEDEFOP, the European Centre for the Development of Vocational Training, low-skilled jobs in electro-engineering and machine operations/assembly in the European Union (EU) is projected to decrease 6.98 percent and 2.03 percent, respectively, between 2015 and 2025.

In parallel, the industry will need more high-skilled workers. For instance, within the same period, CEDEFOP forecasts a 12.51 percent increase in jobs for EU researchers and engineers. Soft skills will see high demand too. As the electronics industry continues to globalize and drive the integration of vertical technologies, workers proficient in communicating in an international environment, leading multicultural teams, developing tailor-made solutions and making data-driven decisions will see higher demand.

2) STEM skills will remain under the spotlight

Continuous innovation is the oxygen of the electronics manufacturing industry, powering the development of highly customized solutions by workers with technical expertise in chemistry, materials, design, mechanics, production and many other fields. In addition, capabilities such as smart manufacturing require workers with growing technical sophistication in areas such as software, information and communications technology (ICT) and data analytics, stiffening the challenge the electronics industry faces in finding skilled workers. Little wonder that employers in Europe struggle to build a workforce with the right technical expertise. The findings of the study “Encouraging STEM Studies for the Labour Market” conducted by the European Parliament underscores the difficulty of hiring enough workers with adequate STEM skills:

  • The proportion of STEM students is not rising at the European level and the underrepresentation of women persists.
  • Businesses are expected to produce about 7 million new STEM jobs, an uptick of 8 percent, between 2013 and 2025 in Europe.

3) The women-in-tech gap is becoming more persistent 

The global manufacturing industry suffers from strikingly low female participation in STEM education and careers. According to UNSECO, in Europe and North America, the number of female graduates in STEM is generally low. For instance, women make up just 19 percent of engineers in Germany and the U.S. The European Parliament study confirms that STEM employment remains stubbornly male-dominated, with women filling just 24 percent of science and engineering jobs and 15 percent of science and engineering associate positions in Europe. According to an article by Guardian, a mere 16 percent of computer science undergraduates in the United Kingdom and the U.S. are female. This yawning gender gap is a deep concern for electronics manufacturing companies in Europe, hampering innovation in a sector that relies heavily on diversity and inclusion and shrinks the talent pipeline critical to remaining competitive.

4) Coping with new technologies: work-based learning is the key

The evolution of the electronics industry since the 1980s has been swift. PCs emerged largely as islands of communication, then became networked. Networking bred the proliferation of social platforms and mobile devices and, today, is giving rise to IoT. Education curricula in Europe, however, have not matured at the same pace, opening a gap between the worlds of industry and education and imposing a formidable school-to-work transition for many young graduates. Work-based learning, which helps students develop the knowledge and practical job skills needed by business, is one solution. The industry reports that work-based learning is vital to remaining competitive in the long run. Innovative dual-learning programmes, apprenticeships and industrial master’s and doctorates are shining examples that are already paying off in some parts of Europe. Such work-based learning models can be extended as a common pillar of education in Europe.

5) A global industry needs a global talent pipeline

The electronics value chain workforce needs an international and multicultural talent pipeline, chiefly spanning the U.S., Europe and Asia. However, many European manufacturers, in particular small and medium enterprises (SMEs), report that building an international workforce remains a challenge due to employment and immigration law barriers as well as cultural and linguistic differences. The EU’s Blue Card initiative, designed to facilitate hiring beyond Europe, is a step in the right direction. Nevertheless, with the exception of Germany, EU member states have made little or no use of the EU Blue Card scheme.

SEMI drives sector-wide initiatives on workforce development

Understanding the urgency, SEMI is accelerating its workforce development activities at global level. Contributing to this initiative, the SEMI talent pipeline Forum in Dresden served as an effective platform for the industry to share its challenges and opportunities with students at various education levels. Led by industry representatives, the sessions enabled the exchange of workforce-development best practices and paved the way for further collaboration among industry, academia and government in Europe. For example, in the Career Café session, students networked with hiring managers. Other workforce development initiatives include:

To help position the skills challenges faced by SEMI members high on the public policy agenda, SEMI in 2017 joined several policy groups including Digital Skills and Jobs Coalition and Expert Group on High-Tech Skills. Last year SEMI also launched Women in Tech, an initiative that convenes industry leaders to help increase female representation in the sector. SEMI also educates its members about key EU resources such as the Blue Card and Digital Opportunity Internship programmes aimed at hiring international talent. In 2018, SEMI will reach out to even more young people through its High Tech U programme to raise awareness of careers in electronics. SEMICON Europa 2018 will host dedicated talent pipeline sessions to help the industry tackle its skills challenges. ISS Europe 2018 sessions on Gaining, Training and Retaining World Class Talent will disseminate best practices to the wider industry. Also this year, SEMI Europe plans to start a new advisory group, “Workforce 4.0,” dedicated to bringing together human resources leaders in the sector to give the electronics manufacturing industry a stronger voice on workforce development.

 

IC Insights is currently researching and writing its 21st edition of The McClean Report, which will be released later this month.  As part of the report, a listing of the 2017 top 50 fabless IC suppliers will be presented.

Figure 1 shows the top 10 ranking of fabless IC suppliers for 2017.  Two China-based fabless companies made the top 10 ranking last year—HiSilicon, which sells most of its devices as internal transfers to smartphone supplier Huawei, and Unigroup, which includes the IC sales of both Spreadtrum and RDA. Fabless company IC sales are estimated to have exceeded $100 billion in 2017, the first time this milestone has been reached.

Figure 1

Figure 1

Unlike the relatively close annual market growth relationship between fabless IC suppliers and foundries, fabless IC company sales growth versus IDM (integrated device manufacturers) IC supplier growth has typically been very different (Figure 2).  The first time IDM IC sales growth outpaced fabless IC company sales growth was in 2010 when IDM IC sales grew 35% and fabless IC company sales grew 29%.  Since very few fabless semiconductor suppliers participate in the memory market, the fabless suppliers did not receive much of a boost from the surging DRAM and NAND flash memory markets in 2010, which grew 75% and 44%, respectively.  However, the fabless IC suppliers once again began growing faster than the IDMs beginning in 2011 and this trend continued through 2014.

Figure 2

Figure 2

In 2015, for only the second time on record, IDM IC sales “growth” (-1%) outpaced fabless IC company sales “growth” (-3%).  The primary cause of the fabless companies’ 2015 sales decline was Qualcomm’s steep 17% drop in sales. Much of the sharp decline in Qualcomm’s sales that year was driven by Samsung’s increased use of its internally developed Exynos application processors in its smartphones instead of the application processors it had previously sourced from Qualcomm.  Although Qualcomm’s sales continued to decline in 2016, the fabless companies’ sales in total (5%) once again outpaced the growth from IDM’s (3%).

In 2017, the market behaved very similarly to 2010, when strong growth in the memory market propelled the IDM IC sales growth rate higher than the fabless IC supplier growth rate.  With the total memory market, a market in which the fabless IC companies have very little share, surging by 58% last year, IDM IC sales growth easily outpaced fabless company IC sales growth in 2017.

The SEMI European 3D Summit will make its Dresden, Germany, debut  22-24 January, 2018, featuring a broader scope of 3D topics driving innovation and business opportunities in the 3D market. The event will highlight the latest 3D technologies including 3DIC Through-Silicon-Via (TSV), 2.5D, 3D FO-WLP/ e-WLB, glass interposers, thermal management and 3D alternative technologies for heterogeneous integration and high-density systems.

A market briefing on the latest business challenges and opportunities in the 3D sector will kick off the summit, with 3D and packaging industry experts presenting their exclusive business and market insights and analysis confirming the huge forecast growth of advanced packaging. Keynotes and presentations on the current adoption of 3D applications such as high-end memory, performance, mobile, imaging and automotive will highlight this 6th edition of SEMI European 3D Summit.

Sold-out for five years straight, the European 3D Summit will showcase the leading names in 3D integration microelectronics manufacturing and offer numerous networking opportunities including a gala dinner and cocktail hour, along with frequent coffee and lunch break mixers. In addition, attendees will meet emerging new talent engaged in the future of 3D integration including Sabrina Fadloun, PhD student and senior field process engineer, SPTS Technologies, and September 2017 winner of the international competition “My Thesis in 180 Seconds.”

The European 3D Summit will showcase speakers from companies such as Third Millennium Test Solutions (3MTS), Amkor Technology, CEA-Leti, Chipworks, Epcos, Fraunhofer, GLOBALFOUNDRIES, Hewlett Packard, Huawei, IBM, IMEC, Intel, ProPrincipia, Qualcomm, Silex, ST Microelectronics, SMIC, TechSearch, Tessera Xperi, Université de Sherbrooke, Western Digital, X-Fab and Yole Développement.

Featuring a huge supplier base, Dresden is home to some of Europe’s largest fabs, from GLOBALFOUNDRIES, Infineon, and X-FAB to a new 300mm BOSCH fab.

Premium Sponsors of the European 3D Summit are SPTS Technologies (platinum sponsor), ASE Group (gold sponsor), Suss MicroTec Group (silver sponsor), EV Group and Trymax (event sponsor)

Please find more registration information at www.semi.org/eu/European-3D-Summit-2018-Register. For more information on the show, please visit www.semi.org/eu/european-3d-summit-2018 or contact Mr. Michael Kaiser, Senior Manager Business Development, SEMI Europe (email: [email protected] or tel. +49 30 3030 8077 10).

Renesas Electronics Corporation (TSE:6723, “Renesas”), a supplier of advanced semiconductor solutions, today announced the integration of Intersil Corporation as a legal entity and a new branding policy following the acquisition of Intersil on February 24, 2017. Effective January 1, 2018, Intersil Corporation is expected to operate in the market under the name of Renesas Electronics America Inc. The completion of Renesas’ U.S. entity integration marks a major milestone in the integration process, which remains well on track. As well, the integration process in Japan and Korea is expected to be completed on or about January 1, 2018. The remaining Intersil entities are expected to be integrated in the near future.

“With the integration of the Intersil business, we have taken another significant step towards maximizing the full potential of the combined business, providing scale, stability and a comprehensive product mix,” said Bunsei Kure, Representative Director, President and CEO of Renesas Electronics Corporation. “With the enhanced global strength, Renesas is in the best position to further strengthen its leadership in the global semiconductor market.”

“The promise of the Renesas and Intersil integration has already begun to materialize as we’ve started operating as one company,” said Necip Sayiner, Executive Vice President of Renesas, President of Renesas Electronics America and President, CEO and Director of Intersil. “We are fully combining our portfolios, technologies and talent to maximize the potential of the acquisition synergies. As a result, we are positioned to expand our business in the broad-based market, providing complete system solutions that enable customers to get to market faster.”

As of January 1, 2018, Intersil Corporation is expected to complete an absorption-type merger with Renesas Electronics America Inc., the U.S. subsidiary of Renesas, leaving Intersil Corporation as the surviving company. Intersil Corporation will then change its name to Renesas Electronics America Inc.

Prior to this entity integration, Renesas implemented a transition to a new organizational structure in July 2017 to accelerate the integration of the Intersil business. The aim of this transition is to move beyond its Japan-centric business management and to achieve a truly global company that acts as “One Global Renesas,” a company that operates as a global entity.

Invensas, a wholly owned subsidiary of Xperi Corporation (“Xperi”) (NASDAQ:XPER), today announced the successful technology transfer of its Direct Bond Interconnect to Teledyne DALSA, a Teledyne Technologies company. This capability enables Teledyne DALSA to deliver next-generation MEMS and image sensor solutions that are more compact and higher performance to customers in the automotive, IoT and consumer electronics markets. Teledyne DALSA is a developer of high performance digital imaging and semiconductors and one of the world’s foremost pure-play MEMS foundries. Invensas and Teledyne DALSA announced the signing of a development license in February 2017.

“In partnership with Invensas, we have successfully completed the transfer of its revolutionary DBI technology to our manufacturing facilities in Bromont,” said Edwin Roks, president of Teledyne DALSA. “We are now ready to offer this enabling platform as part of our foundry services to customers, including our own business lines, seeking smaller, higher performance and more reliable MEMS and imaging solutions.”

“The manufacturing team at Teledyne DALSA has done a fantastic job bringing up our DBI process and is well-positioned to enable a new generation of high performance MEMS and image sensor solutions,” said Craig Mitchell, president of Invensas. “We are excited about the prospects for DBI to be integrated into a wide range of Teledyne DALSA’s branded products as well as those of their foundry customers.”

DBI technology is a low-temperature hybrid wafer bonding solution that allows wafers to be bonded with scalable fine pitch 3D electrical interconnect without requiring bond pressure. The technology is applicable to a wide range of semiconductor devices including MEMS, image sensors, RF front ends and stacked memory. DBI 3D interconnect can eliminate the need for through-silicon vias (TSVs) and reduce die size and cost while enabling pixel level interconnect for future generations of image sensors.

The hows and whys of resin bleed-out (RBO) are discussed, as well as the impact it makes and how to control it.

BY RONGWEI ZHANG, ABRAM CASTRO and YONG LIN, Semiconductor Packaging, Texas Instruments Inc., Dallas, TX

Die attach pastes, which consist of resin, curing agent, catalyst, filler and additives, have been extensively used to attach die onto lead frames in various electronic packages such as small outline integrated circuit (SOIC), thin-shrink small outline package (TSSOP), quad flat package (QFP) and quad-flat no-lead (QFN). One of the issues commonly encountered during package assembly is resin bleed-out (RBO), or epoxy bleed out (EBO). RBO is the separation of some formulation ingredients in the paste from the bulk paste (see FIGURE 1). Depending on die attach paste formulations and lead frame surface chemistry and morphology, bleeding ingredients can be solvents, reactive diluents, low-molecular-weight resins, catalysts, and additives like adhesion promoter. Resin bleed out tends to occur on high energy surfaces such as metal lead frames without any organic coating. In particular, if plasma cleaning is utilized to remove the contaminants prior to assembly, the bleeding issue may become more pronounced due to the increase in surface energy. Bleed-out can occur once die attach pastes are dispensed on to lead frames or during thermal curing. As microelectronics continue to move towards smaller form factor, higher reliability and higher performance, control of RBO becomes increasingly critical for packages where there is a very little clearance between die and die pad edge, or between one die and another in multi-chip modules (MCMs).

Screen Shot 2017-12-05 at 1.29.34 PM

How resin bleed-out occurs

When die attach paste is dispensed onto a solid surface like lead frame surface, the paste will typically wet the surface partially. The adhesive force between die attach paste and lead frame surface causes the paste to spread while the cohesive force within the bulk paste will hold the ingredients together and avoid contact with a lead frame surface. The adhesive and cohesive forces are the intermolecular forces such as hydrogen bonding and Van der Waals forces. So the degree of wetting will depend on the balance between adhesive force and cohesive force. Bleed-out occurs when the adhesive force of some formulation ingredients to the substrate is stronger than the cohesive force within the paste. The driving force for bleed out is to minimize the surface energy of the substrate by wetting.

Impact of resin bleed-out

Resin bleed-out can cause several issues if it is not well controlled.

• If the formulation ingredients bleed from the periphery of the die attach pastes and covers the wire bonding area, then issues like non-stick on pad (NSOP) and weak wire bond can occur. It can also be an issue if bleeding occurs from the die attach fillet along die edge to the die top, contaminating the bond pad on die top surface [1].

• Resin bleed-out may affect the adhesion of mold compound to die pad or mold compound to die top surface, both of which can lead to delamination. In particular, die top delamination is strictly not allowed in wire-bonded packages because it can cause the ball bond to be mechanically lifted, thereby leading to electrical failures during temperature cycling [2].

• As the formulation ingredients bleed out of the bulk paste, the composition of die attach paste under die may change accordingly. This can impact the adhesion of die attach to lead frame adversely, leading to an adhesive failure [3].

Influence of surface roughness

There are many factors that can cause resin bleed-out, such as low surface tension of die attach pastes, high surface energy of metal lead frames, surface contami- nation, surface porosity and surface roughness. Here we will focus on the impact of surface roughness, which is critical to achieve high package reliability. Two die attach pastes were dispensed onto three lead frames with different surface roughness. The surface roughness of these three lead frames was characterized by Atomic Force Microscopy (AFM) using the roughness average (Ra) and the roughness ratio (r) (FIGURE 2). The roughness average (Ra) represents the arithmetic average of the deviations from the center plane. The roughness ratio is the ratio between the actual 3-D surface area calculated by AFM and the flat surface. The 3D morphologies of lead frames are shown in FIGURE 3. It was found that (a) there is a good correlation between the roughness ratio and resin bleed-out. As the surface roughness ratio increases, the bleeding becomes increasingly worse; (b) LF1 and LF2 have almost same Ra, but the bleeding performance of DA3 and DA4 are different. This indicates that the roughness average is not a good index for RBO; (c) DA4 is more resistant to bleed out than DA3.

Screen Shot 2017-12-05 at 1.30.15 PM

The relationship between surface roughness and the wettability has been described by Young equation (Equ. 1) and Wenzel equation (Equ. 2).

cos0y=(YS-YSL)/YL (1)0
cosöm=rcos0y (2)

Screen Shot 2017-12-05 at 1.29.41 PM Screen Shot 2017-12-05 at 1.29.48 PM

Where Ys, YL, YSL are surface tensions of the solid, liquid and interfacial tension between die attach paste and lead frame, respectively; 0y is the Young contact angle, 0m is the measured contact angle, and r is the roughness ratio. As the surface roughness increases, the better the wetting, and the worse the bleed-out if the contact angle is < 90o [4]. This is the case for die attach paste on a metal surface without anti-EBO coating.

Approaches to control resin bleed out

There are several approaches to control or eliminate resin bleed-out. These approaches include modifying formulation by selecting appropriate anti-EBO, using die attach film (DAF)/B-stage epoxy, controlling surface roughness, creating mechanical barrier, and lowering the surface energy of lead frames by surface coating.

• Modifying formulations. Generally, anti-bleeding agents are added to die attach pastes to reduce or eliminate RBO. Different anti-bleeding agents may have different working mechanisms. Some anti- bleeding agents are added to enhance the cohesiveness of the pastes while others are added to form a thin layer with a surface energy lower than the pastes themselves on a lead frame surface [5]. Therefore, tailoring die attach adhesives with appropriate anti-bleeding agents is critical to prevent RBO on different types of lead frames, while maintaining high adhesion to metal lead frames to achieve high reliability.

• Die Attach Film/B-stage Epoxy. The simplest and most effective way to eliminate RBO is to use die attach films or B-stage materials. However, there are limitations associated with this approach. These can include high material cost and capital investment, difficulty to achieve high adhesion and thus high reliability, and limited thermal performance of these materials.

• Mechanical barriers. In some cases, grooves on lead frames are designed in between die attach area and wire bond area to reduce resin bleed-out, as shown in FIGURE 4. This is a simple and cost-effective process. However, this approach may not work well if the bleeding is severe. Similarly, some low surface energy insulating film around a chip can be printed to confine the un-cure pastes to the space defined by the printed pattern [5].

Screen Shot 2017-12-05 at 1.30.23 PM

• Vacuum baking. Vacuum baking of ceramic substrates with gold or other metal surfaces has been reported to reduce bleed-out. Several mechanisms were proposed: (a) through removal of polar surface contaminant, which promotes bleed-out of lighter organic resin by dipole attraction or chemical reaction [6]; (b) through reducing the surface energy of the plating surface by the formation of Ni2O3 [7]; (c) through producing a coating of hydrocarbon by oil back streaming toreduce the surface energy [8]. The method is not recommended either due to lack of controllability or due to the detrimental effect on wire bonding quality [7]. A more controlled method to reduce or eliminate RBO is to treat the surface with known chemicals and controlled processes, as discussed below.

• Low surface energy coating. Roughened lead frames have been utilized to enhance package reliability, particularly to meet Automotive Grade 0 requirements or beyond, as they increase surface contact area and enhance mechanical interlocking. As shown in Fig. 2, a small increase in roughness can result in a severe bleed-out. Therefore, increasing surface roughness will promote bleed-out if there is no anti-EBO on the surface. According to Young’s equation, decreasing surface energy will increase the contact angle, i.e. decreasing the wetting of the surface. Therefore, in roughened lead frame manufacturing, a solution of low surface energy material is used to treat roughened lead frames to lower their surface energy to reduce or eliminate RBO. Alternatively, a thin layer of film can be deposited onto the assembly surface by gas plasma technology to modify the surface energy [9]. FIGURE 5 shows water contact angles of lead frames with or without anti-EBO treatment. The anti-EBO coating will increase the contact angle on standard lead frame as explained by Young’s equation. Compared with standard lead frames, roughened lead frames have an increasing roughness and the anti-EBO coating on roughened lead frames further increases contact angle significantly. This can be explained by Wenzel equation, which demonstrates that adding surface roughness will increase surface hydrophobicity if the surface is chemically hydrophobic. In addition, Fig. 5 shows the resin bleed-out performances of a die attach paste (DA2) on these three types of lead frames. Bleed out was observed on the standard lead frame without anti-EBO, but there was no bleeding on both standard and roughened lead frame with anti-EBO coating. The low surface energy anti-EBO coating eliminates resin bleed out.

Screen Shot 2017-12-05 at 1.30.31 PM

Summary

This article provides an understanding of how bleeding occurs, the impact of bleeding, and methods to control bleeding. Bleeding is the result of the interaction between die attach pastes and metal lead frames. In particular, we studied the influence of surface roughness on RBO of different die attach materials, and found that there is a good correlation between the roughness ratio and bleed-out performance. Reducing the surface roughness will reduce or eliminate RBO. It is noteworthy that there is a line between reducing roughness to achieve no RBO and increasing roughness to ensure excellent delamination performance for lead frames without Anti-EBO. In terms of die attach pastes, the most effective way to control RBO seems to be the surface coating with anti-RBO without affecting other performances like delamination, or combining this method with others to provide an even better solution.

References

1. B. Neff, J. Huneke, M. Nguyen, P. Liu, T. Herrington, S. K. Gupta, “No bleed die attach adhesives”, IEEE International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005, pp. 1-3.
2. R. W. Zhang, Y. Lin, A. Castro, “Solving delamination in lead frame- based packages”, Chip scale review, 2015, pp. 44-48.
3. S. Kanagavel, D. Hart, “Optimization of die attach to surface-enhanced lead frames for MSL-1 performance of QFN packages”, Chip scale review, 2017, pp. 35-38.
4. J.-C. Hsiung, R.A. Pearson, T.B. Lloyd, “A surface energy approach for analyzing die attach adhesive resin bleed,” J. of Adhesion Science and Technology, 2003, 17, No. 1, pp. 1-13.
5. H. Schonhorn, L. H. Sharpe, “Liquids with reduced spreading tendency”, US Patent 4,483,898.
6. J. Ireland, “Epoxy bleedout in ceramic chip carriers”, Int. J Hybrid Microelectron., 1982, 5, pp. 1-4.
7. M. R. Marks, J. A. Thompson, R. Gopalakrishnan, “An experimental study of die attach polymer bleedout in ceramic packages”, Thin Solid Film, 1994, 252, pp. 54-60.
8. N. Tan, K. H. H. Lim, B. Chin, A. J. Bourdillon, “Engineering surface in ceramic pin grid array packaging to inhibit epoxy bleeding”, The Hewlett-Packard Journal, 1998, pp. 81-89.
9. M. Burmeister, “Elimination of epoxy resin bleed through thin film plasma deposition”, Proceeding of the 36th international IMAPS conference, Boston, MA, 2003, pp. 780-785.

The semiconductor industry continued its upward trend in the third quarter of 2017, notching 12 percent sequential growth with strength across all application markets, according to IHS Markit (Nasdaq: INFO). Global revenue totaled $113.9 billion, up from $101.7 billion in the second quarter of 2017.

As memory prices remain high and the wireless market continues to see strong demand through the fourth quarter, 2017 is shaping up to be a record-breaking year for the semiconductor industry. IHS Markit projects that semiconductor revenue will reach a record-high $428.9 billion in 2017, representing a year-over-year growth rate of 21 percent.

Key growth drivers

All application end markets posted sequential growth over the prior quarter, with wireless communications and data processing categories leading the pack.

Revenue from wireless applications grew faster sequentially in the third quarter of 2017 than any of the other high-level application markets. Semiconductor revenue from wireless applications was a record high $34.8 billion in the third quarter, representing nearly 31 percent of the total semiconductor market. IHS Markit anticipates an even bigger fourth quarter for wireless applications, projecting $37.5 billion in revenue — and more than $131 billion for the full-year 2017.

As the wireless market evolves, this growth can be attributed to a number of factors. ”More complex and comprehensive smartphone systems on a chip are supporting applications such as augmented reality and computational photography,” said Brad Shaffer, senior analyst for wireless semiconductors and applications at IHS Markit. “Premium smartphones have increasing amounts of memory and storage. The radio frequency content in these smartphones has also grown considerably over the past few product generations, with many high-end smartphones now supporting gigabit LTE mobile broadband speeds.”

The memory markets proved once again to be the driving force and highest-growing segment for semiconductors in the third quarter of 2017. “The DRAM industry had another record quarter with $19.8 billion in revenue, exceeding the prior record by more than $3 billion,” said Mike Howard, director for DRAM memory and storage research at IHS Markit. “Prices and shipments were up during the quarter as strong demand for mobile and server DRAM continued to propel the market.”

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The NAND industry had another record quarter as well, growing 12.9 percent in the third quarter of 2017, with total revenue reaching $14.2 billion. “Pricing was flat in the quarter, as seasonally strong demand driven by the mobile and solid-state drive segments was able to offset moderate shipment growth,” said Walter Coon, director for NAND flash technology research at IHS Markit. “The market is expected to soften exiting 2017 and into early next year, as the industry transition to 3D NAND technology continues to progress and the market enters a traditionally slower demand period.”

Manufacturer moves

Samsung officially passed Intel to become the number-one semiconductor supplier in the world in the third quarter of 2017, growing 14.9 percent sequentially. Intel now comes in at number two, with SK Hynix securing the third rank in terms of semiconductor revenue for the third quarter.

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Among the top 20 semiconductor suppliers, Apple and Advanced Micro Devices (AMD) achieved the highest revenue growth quarter over quarter by 46.6 percent and 34.3 percent, respectively.

There was a good deal of market share movement within the top 10 suppliers throughout the third quarter as well. In terms of semiconductor revenue, Qualcomm surpassed Broadcom Limited to secure the number-five spot, while nVidia made its way into the top 10 ranking for the first time ever. At this time last year, the top five semiconductor companies controlled 40 percent market share of the entire industry. The top five gained 4.2 percent more market share this year over last year, while comprising three memory companies instead of the previous two.

More information on this topic can be found in the latest release of the Semiconductor Competitive Landscaping Tool (CLT) from the IHS Markit Semiconductor Competitive Landscape CLT Intelligence Service.

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Anirudh Devgan, executive vice president and general manager of the Digital & Signoff Group and the System & Verification Group, has been appointed president of Cadence, effective immediately.

Dr. Devgan will report to Lip-Bu Tan, Cadence chief executive officer. Together, they will further the company’s System Design Enablement strategy by accelerating the momentum in the core electronic design automation (EDA) business and delivering to the expanding needs of its growing customer base.

As Cadence’s President, Dr. Devgan will oversee Cadence’s EDA products, including the digital implementation and signoff, functional verification, custom IC design, PCB and packaging businesses. Additionally, he will be responsible for the corporate strategy, marketing ­and business development functions.

“This is an exciting time for Cadence, and Anirudh will play a key leadership role as we capture opportunities that are being driven by groundbreaking trends in high-performance and edge computing, automotive electronics and machine learning, among others,” said Lip-Bu Tan, CEO of Cadence. “Anirudh is a visionary and an innovator and a strong team leader with broad operational experience. Both Cadence and its customers will benefit from his enhanced role. I am delighted to partner with him to further our System Design Enablement strategy by accelerating the strong momentum in our existing businesses and by expanding into new areas. The Cadence Board and management team join me in congratulating Anirudh on his promotion.”

“It is an honor to step into the role of president as Cadence continues to execute well across all areas of our business,” said Anirudh Devgan. “I look forward to working closely with Lip-Bu and my talented colleagues to accelerate our momentum and drive further growth.”

Anirudh Devgan is a 25-year industry veteran. Prior to joining Cadence in 2012, he was at Magma Design Automation, Inc. for seven years where he was general manager of the Custom Design Business Unit. He also spent 12 years at IBM in a variety of technical and management roles. He received numerous awards there, including the IBM Outstanding Innovation award. Dr. Devgan is an IEEE Fellow and has numerous research papers and patents. He received a Bachelor of Technology degree in electrical engineering from the Indian Institute of Technology, Delhi, and M.S. and Ph.D. degrees in electrical and computer engineering from Carnegie Mellon University.