Category Archives: Wafer Level Packaging

According to the latest market study released by Technavio, the electrostatic discharge (ESD) packaging market is projected to grow to USD 5.42 billion by 2021, at a CAGR of more than 8% over the forecast period.

Global_ESD_Packaging_Market

This research report titled ‘ESD Packaging Market 2017-2021’ provides an in-depth analysis of the market in terms of revenue and emerging market trends. This market research report also includes up to date analysis and forecasts for various market segments and all geographical regions.

Communication network infrastructure

“The communication network infrastructure end-user segment occupies a significant 26% of the global ESD packaging market. The high rate of deployment of next-generation wireless networks such as Wi-Fi, WiMAX, 3G/4G, and ultra-wideband is responsible for the dominance of the market segment,” says Sharan Raj, a lead analyst at Technavio for packaging research.

The growth in the wireless network infrastructure market drives the demand for printed circuit boards (PCBs), which require ESD protection. Also, the increase in virtualization and cloud computing have resulted in increased Internet traffic worldwide, which is also indirectly boosting the market growth.

Consumer electronics industry

The consumer electronics segment includes smartphones, PCs, audio systems, video systems, and TVs, all of which incorporate sophisticated and high-performance printed circuit boards (PCBs) and semiconductors for efficient working. These electronic devices, combined with the rapid adoption of 3G and 4G networks, are driving the growth of ESD packaging in the market segment. Currently, APAC is showcasing an impressive growth curve in the market segment, driven by an extremely high mobile phone subscription rate.

Computer peripherals

“The computer peripherals segment is expected to reach a value of around USD 1,141 million by 2021. This segment includes products such as a mouse, keyboards, printers, hard drives, flash drives, scanners, webcams, and digital cameras which require ESD protection,” says Sharan.

This end-user segment is expected to be driven by the increased demand for tablets, notebooks, ultrabooks, and digital cameras. Further, the introduction of Windows 10 and lightweight ultrabooks will add a boost to the growth of the market segment.

The top vendors highlighted by Technavio’s research analysts in this report are:

  • BASF
  • Desco Industries
  • Dow Chemical
  • PPG Industries

Technavio is a global technology research and advisory company.

At SEMICON Southeast Asia 2017, Dr. Chen Fusen, CEO of Kulicke & Soffa Pte Ltd, Singapore, will give a keynote on digital transformation in the manufacturing sector. Chen believes that Smart Manufacturing, or Industry 4.0, is no longer hype but real, and Asia needs to get on board sooner rather than later. SEMICON Southeast Asia (SEA) 2017, held at the SPICE arena in Penang on 25-27 April, is Asia’s premier showcase for electronics manufacturing innovation.

“Digital transformation has proven to provide solutions for addressing challenges in the manufacturing industry but there is still the issue of acceptance as well as lack of skills and knowledge that needs to be addressed,” said Chen. “With disruptive technology changing our world, I expect that more companies will see the value of their investments realised as this technology accelerates the creation of more individualised products and services.”

Dr. Hai Wang from NXP Semiconductors Singapore Pte Ltd agreed that more consumer-related innovations would stem from digital transformation as demand for solutions that provide efficiency and security increases. “At NXP, we look at developing advanced cyber security solutions for the automotive industry, such as tracking and analysing intelligence around connected and automated vehicles, which will help to counter any adverse threats in real time. These innovations are real and will soon mark a shift in the future of automation and manufacturing. It is vital that we embrace the change and adapt accordingly,” he said.

Other speakers at SEMICON SEA also feel strongly about the importance of Smart Manufacturing and digital transformation. David Chang of HTC Corporation, Taiwan, sees a dramatic shift in the value of being a “smart” manufacturer to address to the rising demand in consumer products and services innovation. “We have seen virtual reality technology offered by products such as HTC VIVE(TM) really shaping the future of the world. Transformative innovations such as this will pave the way for disruptive technology to be coupled into business models to benefit consumers in the long term,” he said.

These three speakers will join a long list of thought leaders from the electronics manufacturing sector – including Jamie Metcalfe from Mentor Graphics U.S., Chiang Gai Kit from Omron Asia Pacific Singapore, Ranjan Chatterjee from Cimetrix U.S. and Duncan Lee from Intel Products Malaysia – to speak at SEMICON SEA 2017. Topics discussed will cover issues relevant to the transformation of the manufacturing industry ranging from next-generation manufacturing to system-level integration, including exhibitions that will highlight the market and technology trends that are driving investment and growth in all sectors across the region.

The conference also aims to champion regional collaboration through new business opportunities for customers and foster stronger cross-regional engagement through reaching buyers, engineers and key decision-makers in the Southeast Asia microelectronics industry, including buyers from Malaysia, Singapore, Thailand, Indonesia, the Philippines, and Vietnam.

Learn more about SEMICON Southeast Asia 2017 in Penang, Malaysia on 25-27 April: http://www.semiconsea.org/.

Kulicke & Soffa Industries, Inc. (NASDAQ: KLIC) announced today the opening of its latest Process and Applications laboratory at the K&S Netherlands facility.

The 180 square meter laboratory adds to the Company’s existing base of global application facilities. The Netherlands site uniquely houses a complete prototype assembly line of K&S Advanced Packaging and Electronics Assembly equipment. The laboratory will facilitate stronger collaboration with global customers and industry partners to develop and refine next-generation of packaging solutions in direct response to the industry’s emerging challenges and opportunities. It also serves as a platform to accelerate internal development roadmaps and engineering competencies.

Bob Chylak, Kulicke & Soffa’s Vice President of Global Process Engineering, said, “This new lab marks another significant milestone for K&S and further enhances our capabilities to deploy the latest technology for component mounting, with a specific focus on applications requiring high-accuracy placement for passive components as well as active bare or packaged die. We are excited to further collaborate strategically with customers and industry partners to optimize and drive high-volume adoption of new advanced packaging processes.”

Kulicke & Soffa is proud to welcome the Guest-of-Honor, Mayor John Jorritsma, City of Eindhoven, for the Opening Ceremony. “We are very pleased with the presence of K&S in Brainport Eindhoven. The company contributes a lot to our added value chain, by creating new knowledge and employment. The opening of the new process lab proves that K&S also believes in our economic strength, which is great”, said Mayor John Jorritsma, City of Eindhoven.

In addition to the K&S Netherlands facility, Kulicke & Soffa also operates application laboratories in Taiwan, Korea, China, Singapore and the US.

Analogix Semiconductor, Inc. and Beijing Shanhai Capital Management Co, Ltd. (Shanhai Capital), today jointly announced the completion of the approximately $500 million acquisition of Analogix Semiconductor. China Integrated Circuit Industry Investment Fund Co., Ltd. (China IC Fund) joined Shanhai Capital’s fund as one of the limited partners.

“We are very pleased to have completed the transaction,” said Dr. Kewei Yang, Analogix Semiconductor’s chairman and CEO. “Enhanced by the strong financial support of our new investors, Analogix’s future is brighter than ever. We are excited to continue building and growing Analogix into a global leader in high-performance semiconductors.”

“As Analogix’s key financial partner and investor, we look forward to leveraging our resources to accelerate the company’s growth into new markets,” said Mr. Xianfeng Zhao, Chairman of Shanhai Capital. “We will build on the strength of the company’s core technology and customer relationships to create an exceptional semiconductor company that will be publicly listed in China.”

Sino-American International Investment Ltd, and Needham & Company, LLC served as financial advisors to Analogix Semiconductor. O’Melveny & Myers LLP served as legal counsel to Analogix Semiconductor.

Pillsbury Winthrop Shaw Pittman LLP and Jingtian & Gongcheng acted as legal counsel to Beijing Shanhai Capital Management Co.

2016 was a turning point for fan-out packaging. With Apple’s entrance and its subsequent decision to package its A10 APE in TSMC’s fan-out solution, the market changed. Thus advanced packaging leaders decided large investments for the development of fan-out platforms, impacting the related equipment and materials market.

“Indeed, both equipment and materials markets for FOWLP will reach an impressive 40% CAGR,” confirmed Jérôme Azémar, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing at Yole Développement (Yole).

A detailed description of both markets and a list of equipment and materials studied by Yole is available in the new report Equipment and Materials for Fan-Out Packaging. According to this technology & market analysis, the total FOWLP equipment market is expected to reach about US$694 million in 2021 at an impressive CAGR of 42.5% between 2015 and 2021. Similarly, FOWLP’s total materials market is expected to reach about US$148 million in 2021 at a CAGR of 40% during the same period.

fowlp 2017

How is Fan-Out success driving the equipment & materials market? What is the impact of the huge investments listed during the 2015-2016 period? Under this dynamic context, where are the business opportunities? Yole’s advanced packaging team is expecting lot of changes in the coming years and offers you today a snapshot of these industries.

In its report, the “More than Moore” market research and strategy consulting company proposes a clear picture of new investments and future markets for equipment and materials in Fan-Out. This report focuses on FOWLP’s key process steps, which Yole believes are most essential to the platform: carrier bonding/debonding, chip placement, molding and RDL processing.

The equipment studied in the report that enables the aforementioned process steps includes pick-and-place bonders, lithography tools, sputter tools, molding tools, carrier debonding tools, and coaters/developers. In parallel, key materials investigated in Yole’s report include RDL dielectrics and photoresist, molding compound, and glass carriers.

As mentioned, 2015 – 2016 period saw large investments in FOWLP.

“With the FOWLP adoption spreading from mobile/wireless and automotive to MEMS, RF SiP, and medical, a wealth of lucrative business opportunities exist for fan-out equipment and materials suppliers,” detailed Jérôme Azémar.

2017 will not see the same investment level, but the potential for new moves is high. Capacity enlargement is still an option for players considering it; in fact it may be required in two years if fan-out keeps growing in high-density applications. Newcomers will gain some market share, necessitating entry into volume production. However, with 4.5 million wafers to be produced in 2021, capacity must also be increased by TSMC and/or other actors. Therefore, a second wave of investment must occur soon or capacity will not be sufficient to address the FOWLP market if it continues growing.

As a consequence, growth will be significant for all equipment and material types, indicating broad benefit from the FOWLP platform’s success. However the challenges and market landscapes are very different from process step and the market is quite diversified. For example, lithography for patterning RDL represents one of the largest market components thanks to the equipment’s high value and the large volume of photoresist. In lithography, a “stepper”-type litho tool is used for FOWLP RDL patterning in order to achieve low-resolution (down to 2µm today), but its cost is high and manufacturers are under strong pressure to reduce their prices.

“This market is currently dominated by Ultratech, which supplies TSMC, and Rudolph which has enjoyed success with OSATs,” said Santosh Kumar, Senior Technology & Market Research Analyst at Yole. And he adds: “We expect other players to penetrate this area, potentially with different approaches like laser ablation.”

Other steps, i.e. mold compound processing, may be more prone to domination by a single player. This symbolic step, which creates a reconstituted wafer out of a mold in which the IC are encapsulated, is almost entirely owned by Nagase Chemtex, almost 90% market share on the materials side. Nagase Chemtex’s dominance is the result of the complex approach such chemicals require in order to develop an optimum solution, and the long history Nagase has with the main producers including Nanium and STATS ChipPAC. LMC is currently the preferred FOWLP mold material, however, to break Nagase’s monopoly and reduce cost, other materials suppliers are working to develop GMC. By 2021, GMC is expected to have 29% of the total market. On the equipment side, things are more diversified, with APIC, Yamada, and Towa the key compression molding-tool suppliers for FOWLP.

Cadence Design Systems, Inc. (NASDAQ:  CDNS) today announced the release of the new Virtuoso Advanced-Node Platform supporting advanced 7nm designs. Through collaboration with early 7nm FinFET customers, Cadence has expanded the Virtuoso custom design platform with innovative new capabilities to manage design complexity and process effects introduced with this advanced-node process. The Virtuoso Advanced-Node Platform update supports all major advanced FinFET technologies with proven results, while improving designer productivity at 7nm.

To address the many technical challenges of 7nm design, the Virtuoso Advanced-Node Platform offers a variety of layout capabilities, including advanced editing with multi-pattern color awareness, FinFET grids, and module generator (ModGen) device arrays. Additionally, customers can take advantage of variation analysis in their circuit design flows utilizing Monte Carlo analysis across corners to address variability with the Spectre® Accelerated Parallel Simulator, the Virtuoso ADE Product Suite and the Virtuoso Schematic Editor.

“As a leader in mobile computing, we require the highest performance, lowest power and highest density possible to deliver innovative, advanced-node designs,” said Ching San Wu, general manager of Analog Design and Circuit Technology at MediaTek. “Through our strong collaboration and continued partnership with Cadence, we have been able to develop and deploy a custom design methodology based on the Virtuoso Advanced-Node Platform. With our recent successful tapeout, we took advantage of its many unique capabilities designed to manage the challenges presented at 7nm.”

Key features in the updated Virtuoso Advanded-Node Platform include:

  • Multi-patterning and color-aware layout: Provides essential new support of a variety of fully colored “multi-patterned” custom design flows, which are a baseline requirement for the 7nm process and enable users to be more productive in their designs.
  • ModGen device arrays: Offers designers a set of modules that have been co-developed in close collaboration with key partners to improve designer productivity and mitigate layout complexities at the 7nm process node.
  • Automated FinFET placement: Provides automatic FinFET grid placement that simplifies the overall FinFET-based coloring design methodologies needed at 7nm. By adhering to 7nm process constraints, the Virtuoso Advanced-Node Platform greatly simplifies layout creation and minimizes errors that can be pervasive when designing at 7nm, while decreasing layout design time by up to 50 percent on custom digital and analog blocks.
  • Variation analysis: Enables high-performance Monte Carlo analysis targeting FinFET technology and high-sigma analysis, which can reduce the overall time to run simulations by a factor of 10.

“Through constant innovation and strategic partnerships with industry leaders, Cadence has solidified its leading role in providing advanced-node custom design tools,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “Through our extensive work with customers such as MediaTek, we’ve been able to validate that our approaches greatly reduce the overhead inherent in designing at 7nm in order to help deliver the best possible silicon. We currently have many customers that have completed successful tapeouts and delivered production designs using the Virtuoso Advanced-Node Platform.”

2016 was the year of strong consolidations in the semiconductor industry. Yole Développement (Yole) highlights many mergers and acquisitions with several billions of dollars transactions.

“And 2017 seems to be following the same path,” said Jérôme Azemar, Technology & Market Analyst, Advanced Packaging at Yole.

Year after year, the advanced packaging industry has attracted more and more of the spotlight.

ic market forecast

“According to our estimates, advanced packaging revenues represented more than US$22 billion in 2016 and will increase to almost US$30 billion by 2020”, confirmed Jérôme Azemar from Yole.

What is the status of the advanced packaging industry? Who is leading the market today? What are the platforms that will drive the tomorrow’s industry? What could we expect in term of technology evolution? NCAP China and Yole propose you a 2-day conference to answer these questions and get the opportunity to meet the advanced packaging leaders. They announced today the 3rd Advanced Packaging & System Integration Technology Symposium. The 2017 edition takes place in Wuxi, China, on April 20 & 21.
   • Click program & registration to discover schedule, list of speakers, abstracts, and much more.
• The 2017 symposium is sponsored by BESI, Plasma-Therm, SPTS Technologies, UnitySC and Simco-Ion
   • This year again, ASTRI is a partner of the Advanced Packaging & System Integration Technology Symposium.

Created in 2014, the Advanced Packaging & System Integration Technology Symposium is attracting more and more attendees each year. The powerful program designed by Yole and NCAP China gathers numerous valuable discussions, meetings and business collaborations.

 This year again, both partners are excited to welcome the leaders of the advanced packaging industry and are expecting a great success. They have announced an impressive list of executive speakers including:
   • Tetsukazu Sugiya, Group Leader, Technology Solutions Group at DISCO Corp.
   • Lianming Tong, Lead Marketing Manager at Dow Electronics Materials
   • Kenji Kawada, Staff Engineer at Infineon Technologies Japan
   • Daquan Yu, CTO & VP, Kunshan Huatian Technology Electronics
   • Howard Huang, Director, Kingyoup Optronics
   • Tae-Hoon Kim, Ex. President, nepes Corporate
   • Dr David Lishan, Principal Scientist at Plasma-Therm
   • Richard Barnett, Etch Product Manager, SPTS, an Orbotech Company …

And much more. List of speakers, biographies and abstracts are available on i-micronews.com website. To download the PDF version, click Program. 2017 edition also includes two keynote speakers from Huawei and Brewer Science.

Partnership between both organizations, NCAP China and Yole has been signed 3 year ago and all benefits of this collaboration are serving the development of the advanced packaging industry in China and all around the world. Based on a strategic thinking, NCAP China and Yole combined their expertise and their brand to support the development of this dynamic industry. Both organizations became indispensable players. And as strong influencer, the NCAP China and Yole Symposium is today the relevant indicator of the status of advanced packaging industry.

“We are very pleased to have the opportunity this year again to host the “Advanced Packaging & System Integration Technology Symposium,” saidDr Cao LiQiang, NCAP’s CEO. And he adds: “Mixing together worldwide companies and laboratories, all experts in the advanced packaging arena is just key for the development of the industrial activities in China. It is a relevant contribution to shape the future of the advanced packaging ecosystem. Under this context, we are looking forward to welcome advanced packaging leaders and get powerful presentations and debates during the Symposium.”

Advanced packaging revenue in China is expected to reach US$4.6 billion in 2020 at an impressive 16% CAGR .

“Indeed we are experiencing a key momentum in the semiconductor industry,” announced Thibault Buisson, Business Unit Manager, Advanced Packaging & Semiconductor Manufacturing at Yole. “Lot of technical challenges are now being transferred from the chip to the package itself. This is why industrial companies from different business models are willing to get involved in the exciting advanced packaging field. Under a highly competitive landscape, innovative platforms such as FO packages, 3D & 2.5D interposers and SiP are getting more and more interest from the end users and therefore are changing the packaging ecosystem. NCAP China & Yole Symposium is the place to get a clear understanding of the status of this industry and get answers to future market evolutions, the industry will face tomorrow.”

The symposium represents an exciting opportunity for advanced packaging companies to develop, exchange and expand their activities in China and also in all other countries. NCAP and Yole are very enthusiastic about this 3rd edition. Make sure you will attend the Symposium and book your place right now on i-micronews website or click: Registration. To see the full schedule, please click here: Program.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $30.4 billion for the month of February 2017, an increase of 16.5 percent compared to the February 2016 total of $26.1 billion. Global sales in February were 0.8 percent lower than the January 2017 total of $30.6 billion, exceeding normal seasonal market performance. February marked the global market’s largest year-to-year growth since October 2010. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“The global semiconductor industry has posted strong sales early in 2017, with memory products like DRAM and NAND flash leading the way,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Year-to-year sales increased by double digits across most regional markets, with the China and Americas markets showing particularly strong growth. Global market trends are favorable for continuing sales growth in the months ahead.”

Year-to-year sales increased across all regions: China (25.0 percent), the Americas (19.1 percent), Japan (11.9 percent), Asia Pacific/All Other (11.2 percent), and Europe (5.9 percent). Month-to-month sales increased modestly in Asia Pacific/All Other (0.5 percent) but decreased slightly across all others: Europe (-0.6 percent), Japan (-0.9 percent), China (-1.0 percent), and the Americas (-2.3 percent).

Neuffer also noted the recent growth of foreign semiconductor markets is a reminder of the importance of expanding U.S. semiconductor companies’ access to global markets, which is one of SIA’s policy priorities for 2017. The U.S. industry accounts for nearly half of the world’s total semiconductor sales, and more than 80 percent of U.S. semiconductor company sales are to overseas markets, helping make semiconductors one of America’s top exports.

February 2017

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

6.13

5.99

-2.3%

Europe

2.84

2.82

-0.6%

Japan

2.79

2.77

-0.9%

China

10.15

10.05

-1.0%

Asia Pacific/All Other

8.72

8.76

0.5%

Total

30.64

30.39

-0.8%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

5.03

5.99

19.1%

Europe

2.66

2.82

5.9%

Japan

2.47

2.77

11.9%

China

8.04

10.05

25.0%

Asia Pacific/All Other

7.88

8.76

11.2%

Total

26.08

30.39

16.5%

Three-Month-Moving Average Sales

Market

Sept/Oct/Nov

Dec/Jan/Feb

% Change

Americas

6.25

5.99

-4.2%

Europe

2.88

2.82

-2.3%

Japan

2.90

2.77

-4.6%

China

10.04

10.05

0.1%

Asia Pacific/All Other

8.94

8.76

-2.0%

Total

31.02

30.39

-2.0%

 

IEEE, the world’s largest technical professional organization dedicated to advancing technology for humanity, this week announced the next milestone phase in the development of the International Roadmap for Devices and Systems (IRDS)—an IEEE Standards Association (IEEE-SA) Industry Connections (IC) Program sponsored by the IEEE Rebooting Computing (IEEE RC) Initiative—with the launch of a series of nine white papers that reinforce the initiative’s core mission and vision for the future of the computing industry. The white papers also identify industry challenges and solutions that guide and support future roadmaps created by IRDS.

IEEE is taking a lead role in building a comprehensive, end-to-end view of the computing ecosystem, including devices, components, systems, architecture, and software. In May 2016, IEEE announced the formation of the IRDS under the sponsorship of IEEE RC. The historical integration of IEEE RC and the International Technology Roadmap for Semiconductors (ITRS) 2.0 addresses mapping the ecosystem of the new reborn electronics industry. The new beginning of the evolved roadmap—with the migration from ITRS to IRDS—is proceeding seamlessly as all the reports produced by the ITRS 2.0 represent the starting point of IRDS.

While engaging other segments of IEEE in complementary activities to assure alignment and consensus across a range of stakeholders, the IRDS team is developing a 15-year roadmap with a vision to identify key trends related to devices, systems, and other related technologies.

“Representing the foundational development stage in IRDS is the publishing of nine white papers that outline the vital and technical components required to create a roadmap,” said Paolo A. Gargini, IEEE Fellow and Chairman of IRDS. “As a team, we are laying the foundation to identify challenges and recommendations on possible solutions to the industry’s current limitations defined by Moore’s Law. With the launch of the nine white papers on our new website, the IRDS roadmap sets the path for the industry benefiting from all fresh levels of processing power, energy efficiency, and technologies yet to be discovered.”

“The IRDS has taken a significant step in creating the industry roadmap by publishing nine technical white papers,” said IEEE Fellow Elie Track, 2011-2014 President, IEEE Council on Superconductivity; Co-chair, IEEE RC; and CEO of nVizix. “Through the public availability of these white papers, we’re inviting computing professionals to participate in creating an innovative ecosystem that will set a new direction for the greater good of the industry. Today, I open an invitation to get involved with IEEE RC and the IRDS.”

The series of white papers delivers the starting framework of the IRDS roadmap—and through the sponsorship of IEEE RC—will inform the various roadmap teams in the broader task of mapping the devices’ and systems’ ecosystem:

“IEEE is the perfect place to foster the IRDS roadmap and fulfill what the computing industry has been searching for over the past decades,” said IEEE Fellow Thomas M. Conte, 2015 President, IEEE Computer Society; Co-chair, IEEE RC; and Professor, Schools of Computer Science, and Electrical and Computer Engineering, Georgia Institute of Technology. “In essence, we’re creating a new Moore’s Law. And we have so many next-generation computing solutions that could easily help us reach uncharted performance heights, including cryogenic computing, reversible computing, quantum computing, neuromorphic computing, superconducting computing, and others. And that’s why the IEEE RC Initiative exists: creating and maintaining a forum for the experts who will usher the industry beyond the Moore’s Law we know today.”

The IRDS leadership team hosted a winter workshop and kick-off meeting at the Georgia Institute of Technology on 1-2 December 2016. Key discoveries from the workshop included the international focus teams’ plans and focus topics for the 2017 roadmap, top-level needs and challenges, and linkages among the teams. Additionally, the IRDS leadership invited presentations from the European and Japanese roadmap initiatives. This resulted in the 2017 IRDS global membership expanding to include team members from the “NanoElectronics Roadmap for Europe: Identification and Dissemination” (NEREID) sponsored by the European Semiconductor Industry Association (ESIA), and the “Systems and Design Roadmap of Japan” (SDRJ) sponsored by the Japan Society of Applied Physics (JSAP).

The IRDS team and its supporters will convene 1-3 April 2017 in Monterey, California, for the Spring IRDS Workshop, which is part of the 2017 IEEE International Reliability Physics Symposium (IRPS). The team will meet again for the Fall IRDS Conference—in partnership with the 2017 IEEE International Conference on Rebooting Computing (ICRC)—scheduled for 6-7 November 2017 in Washington, D.C. More information on both events can be found here: http://irds.ieee.org/events.

IEEE RC is a program of IEEE Future Directions, designed to develop and share educational tools, events, and content for emerging technologies.

IEEE-SA’s IC Program helps incubate new standards and related products and services, by facilitating collaboration among organizations and individuals as they hone and refine their thinking on rapidly changing technologies.

A coalition of leaders from the global tech, defense, and aerospace industries, led by the Semiconductor Industry Association (SIA) and Semiconductor Research Corporation (SRC), today released a report identifying the key areas of scientific research needed to advance innovation in semiconductor technology and fulfill the promise of emerging technologies such as artificial intelligence (AI), the Internet of Things (IoT), and supercomputing. The report, titled Semiconductor Research Opportunities: An Industry Vision and Guide, also calls for robust government and industry investments in research to unlock new technologies beyond conventional, silicon-based semiconductors and to advance next-generation semiconductor manufacturing methods.

“Semiconductor technology is foundational to America’s innovation infrastructure and global technology leadership,” said John Neuffer, president and CEO of SIA, which represents U.S. leadership in semiconductor manufacturing, design, and research. “Our industry has pushed Moore’s Law to levels once unfathomable, enabling technologies that have driven economic growth and transformed society. Now, as it becomes increasingly challenging and costly to maintain the breakneck pace of putting more transistors on the same size of silicon real estate, industry, academia, and government must intensify research partnerships to explore new frontiers of semiconductor innovation and to foster the continued growth of emerging technologies. Taking swift action to implement the recommendations from the Vision report will help usher in a new era of semiconductor technology and keep America at the head of the class in technological advancement.”

Neuffer also noted concern in the tech, research, and academic communities about proposed cuts to basic scientific research outlined in the Trump Administration’s fiscal year 2018 budget blueprint. Basic scientific research funded through agencies such as the National Science Foundation (NSF), the National Institute of Standards and Technology (NIST), the Defense Advanced Research Projects Agency (DARPA), and the Department of Energy (DOE) Office of Science has yielded tremendous dividends, helping launch technologies that underpin America’s economic strength and global competiveness. The U.S. semiconductor industry invests about one-fifth of revenue each year in R&D – the highest share of any industry. Neuffer expressed the semiconductor industry’s readiness to work with the Administration and Congress to enact a budget that embraces the strategic importance of research investments to America’s continued economic and technological strength.

“Continued and predictable advancements in semiconductor technology have fueled the growth of many industries, including those historically based on mechanics such as automotive,” said Ken Hansen, president & CEO of SRC. “As the rate of dimensional scaling has slowed, the need to reinvigorate the investment in semiconductor research has become increasingly clear. Now is the time for industry, government, and academia to double down their resources and efforts to ensure the pace of renewal continues. Alternative strategies and techniques to the traditional scaling for performance are now being explored by SRC. Furthermore, with the support of SIA, SRC is building research programs that align with the Vision report, including complimentary technologies such as advanced packaging and communications. An infusion of funding is vital to expand the research breadth beyond the historical focus areas, enabling the industry to keep its promise of a continuous stream of products with improved performance at reduced cost. As industries look to future areas of growth and innovation, SIA and SRC are laying the groundwork for new discoveries through fundamental research.”

The Vision report is the culmination of work by a diverse group of industry experts and leaders, including chief technology officers at numerous leading semiconductor companies, who came together over a nine-month period in 2016-2017 to identify areas in which research is essential to progress. The report, which will be updated periodically moving forward, has active participation from the industry’s leading chip makers, fabless companies, IP providers, equipment and material suppliers, and research organizations. It will serve as a foundational guide for defining the semiconductor industry’s future research paths in 14 distinct but complimentary research areas. These areas, outlined in the Vision report, are as follows:

1. Advanced Devices, Materials, and Packaging2. Interconnect Technology and Architecture

3. Intelligent Memory and Storage

4. Power Management

5. Sensor and Communication Systems

6. Distributed Computing and Networking

7. Cognitive Computing

 8. Bio-Influenced Computing and Storage9. Advanced Architectures and Algorithms

10. Security and Privacy

11. Design Tools, Methodologies, and Test

12. Next-Generation Manufacturing Paradigm

13. Environmental Health and Safety: Materials and Processes

14. Innovative Metrology and Characterization