Category Archives: Wafer Level Packaging

Amkor Technology, Inc., a provider of semiconductor assembly and test services, today announced that it has granted GLOBALFOUNDRIES a non-exclusive license to its proprietary copper pillar wafer bump technology.  The agreement provides for the transfer of Amkor’s copper pillar wafer bump technology to GLOBALFOUNDRIES and a license under Amkor’s intellectual property to enable GLOBALFOUNDRIES to bump wafers based on this technology.

“Technology leadership and innovation are fundamental to Amkor’s success.  Since its introduction in 2010, our proprietary copper pillar wafer bump technology has been widely adopted for use in high volume production in many applications, including the smartphone and tablet markets,” said Dr. Choon Heung Lee, Amkor’s executive vice president and chief technology officer.  “We are pleased to license our copper pillar wafer bump technology to GLOBALFOUNDRIES, a world class, leading edge foundry.”

“GLOBALFOUNDRIES is committed to providing customers of our leading edge fab technology with fully integrated solutions.  Silicon to package integration is a key component of these solutions and we are pleased to have partnered with Amkor, a technology leader for outsourced semiconductor packaging and test services, to expand our wafer bumping services to include capabilities that can further extend our copper pillar bump manufacturing,” said David McCann, Vice President of Packaging R&D at GLOBALFOUNDRIES.  “Semiconductor device scaling drives higher density off chip interconnect requirements.  Copper pillar bumping is a critical part of bringing leading edge semiconductor devices to market and this capability enhances our growing open ecosystem of manufacturing services and partners.”

Amkor’s copper pillar wafer bump technology enables low profile and small area packaging, which is required for the mobile device market.  Copper pillar technology supports 3D fine pitch memory interfaces and is utilized in 2.5D packaging where fine pitch multi-die interconnects can reduce system level costs and shorten time-to-market as compared to SoC platforms.  In addition, Amkor’s copper pillar wafer bump technology supports substantial die-to-die bandwidth between memory and logic devices, greatly reduces power consumption in high-performance products, and enables high speed interfaces when applied to analog and RF applications.

The semiconductor equipment and materials industry is currently enjoying a double-digit annual growth rate and good prospects looking forward to 2015.  However, there are huge challenges around the corner with the move from planar to FinFET transistors, with 193nm immersion lithography being pushed well below 14nm, and with an explosion of new materials to integrate, among others.

The SEMI International Technology Partners Conference (ITPC 2014) convened on 9-12 November on the bright and crystalline Kohala Coast of the Big Island of Hawaii.  Like our industry, all looked calm and peaceful – yet just around the corner, the Kilauea Volcano was violently reshaping the landscape with rivers of molten lava in the town of Pahoa.

Living in the shadow of an active volcano and the sometimes spectacularly disruptive process of building an island – or the nano-electronics manufacturing industry in our case – was picked up in this year’s ITPC theme:  New Structures for Innovation.  Wholly new concepts for collaboration and partnerships to address the challenges and to enable innovation were discussed formally in the conference, as well as informally in the many networking opportunities.

The program included keynote presentations by driving IC manufacturers:  Intel, SMIC, SK Hynix, TSMC, and Micron to set the stage for the rest of the program by hitting the key issues:

  • Delivering density scaling benefits in an era of increased capital intensity and materials complexity (Intel and SMIC)
  • Trends in semiconductor development following changes in the mobile market (SK Hynix)
  • Limits of lithography beyond the 10nm node (TSMC)
  • Collaboration for innovation (Micron)

Each of these keynote presentations neatly distilled the related challenges and opportunities and provided richly provocative observations on what is needed to keep innovation as the fundamental enabler.

Beyond the exceptional insights and depth of these presentations, a few “fun facts” were captured below.

  • Intel’s pursuit of 450mmm has had a positive impact on 300mm productivity (Bob Bruck, Intel)
  • China’s overall two highest revenue imports are oil and ICs  (Tzu-Yin Chiu, SMIC)
  • To succeed in today’s IC manufacturing world there needs to be system-level and process-level partnership and collaboration across the extended supply chain  (Sungwook Park, SK Hynix)
  • Of the Fortune 500 companies from 30 years ago, only 15% remain today.  Large companies are often too slow to react to change (Mark Adams, Micron)
  • Facebook and Google are now among the top six server manufacturers in the world (Mark Adams, Micron)

The conference continued with an industry and market outlook segment with special attention to IoT, electric vehicles, and nanoelectronics “connecting lives to improving lives.”  This included some amazing video clips of Nissan’s autonomous driving electric vehicles in Japan traffic, and imec’s intense visualizations of next generation nano-bio applications.

Among the best appreciated sections, was the segment on new industry structure that featured speakers and panelists from Google (David Peterson), Robert Metcalfe (University of Texas), Dan Solomon (Solomon Consulting), and AlixPartners (Dan Fisher). David Peterson brought a perspective from outside of our industry which is useful to test ideas and refresh approaches. He asked the audience to start with the most difficult ideas: make the tough choices, ask the questions that no one else will, and nurture a vibrant, distinctive culture. On making the tough choice, he was specific – and it is indeed tough, “sub-optimize current performance to invest in future performance:  innovations, R&D, learning, leadership development, building an adaptable organization, experimenting with ideas and projects that may not succeed. This segment was capped by Shozo Saito (Toshiba) providing an overview on the connections of new market and industry structure by device platform development.

The final segment focused on technology with Frits van Hout of ASML presenting the EUVL transition from R&D to industrialization. Following this a panel, moderated by Dan Hutcheson of VLSI Research, focused on frontiers of technology with panelists Paul Boudre of Soitec, David Hemker of Lam Research, Michael Liehr of CNSE, and Omkaram Nalamasu of Applied Materials.

It was a fascinating conference that both discussed the need and models for new collaboration and partnerships – and brought our industry’s thought leaders together to have opportunities to find these connections during the conference.

A few more interesting “fun facts” “fun bits” from the conference:

  • China plans to spend $100B to build a China-local IC industry that will supply up to 40% of China’s IC consumption.
  • The era of planar technology is coming to an end – and this precipitates great changes.
  • There is virtually no viable small company R&D engine model remaining in ICs and semiconductor equipment.  The model for innovation in our industry has significantly changed in the last five years.
  • Collaborations and partnerships are more essential now than ever before for developing innovation.
  • To build trust in developing partnerships, potential partners should work together and take many small risks together quickly.
  • Among the top innovations in our industry is Moore’s law and inventing SEMI – this is one of the big successes in collaboration and co-opetition.
  • A twelve week cycle from tape-out to finished wafer is too long.  This must change to keep pace with product development innovation.
  • The semiconductor industry should quickly work to define standards/platforms for IOT to ensure the pace of growth and chip consumption
  • A favorite slide was from Google that reminded the audience that to win, we have to view any customer problem as our problem:

ITPC

To participate in other strategic events, consider the SEMI Industry Strategy Symposium U.S. 2015 in January or SEMI Industry Strategy Symposium Europe 2015 in February.

The Global Semiconductor Alliance (GSA) announced the recipients honored at the 2014 GSA Awards Dinner Celebration that took place in Santa Clara, California. The commemorative event celebrated GSA’s 20th year anniversary. Over the past 20 years, the awards program has recognized the achievements of semiconductor companies in several categories ranging from outstanding leadership to financial accomplishments, as well as overall respect within the industry.

This year, in recognition of GSA’s 20 years of global collaboration, there was a special presentation honoring past Dr. Morris Chang Exemplary Leadership Award recipients, GSA’s most prestigious award.

GSA members identified the Most Respected Public Semiconductor Company Award winners by casting ballots for the industry’s most respected companies for its products, vision and future opportunities. Winners include the “Most Respected Emerging Public Semiconductor Company Achieving $100 million to $250 million in annual sales Award” presented to Ambarella, Inc.; “Most Respected Public Semiconductor Company achieving $251 million to $1 billion in annual sales Award” awarded to InvenSense, Inc.; and “Most Respected Public Semiconductor Company achieving greater than $1 billion in annual sales Award” received by QUALCOMM Incorporated.

The “Most Respected Private Company Award” was voted on by GSA membership and presented to Spreadtrum Communications Inc. Other winners include “Best Financially Managed Company achieving up to $500 Million in annual sales Award” presented to Montage Technology and “Best Financially Managed Semiconductor Company achieving greater than $500 million in annual sales Award” earned by Skyworks Solutions, Inc. Both companies were recognized based on their continued demonstration of the best overall financial performance based on specific financial metrics.

GSA’s Private Awards Committee, made up of members of the Emerging Company CEO Council, venture capitalists and select industry entrepreneurs, chose the “Start-Up to Watch Award” winner by identifying a company that has demonstrated the potential to positively change its market or the industry through the innovative use of semiconductor technology or a new application for semiconductor technology. This year’s winner is Ineda Systems, Inc.

As a global organization, the GSA recognizes companies headquartered in the Europe/Middle East/Africa and Asia-Pacific regions. Award winners are chosen by the leadership council of each respective region and are semiconductor companies that demonstrate the most strength when measuring products, vision, leadership and success in the marketplace. The recipient of this year’s “Outstanding Asia-Pacific Semiconductor Company Award” is MediaTek Inc. and “Outstanding EMEA Semiconductor Company Award” is Infineon Technologies AG.

Semiconductor financial analyst Rajvindra Gill from Needham & Company presented this year’s “Favorite Analyst Semiconductor Company Award.” The criteria used in selecting this year’s winner included historical as well as projected data such as per cent stock and revenue increase, net profit margin, revenue forecasts, and product performance. Needham & Company presented to Synaptics, Inc.

The Awards Dinner Celebration was made possible by title sponsor TSMC, VIP and networking reception sponsor Optimal+, as well as general sponsors Advantest, Alix Partners, Altera, AMD, Amkor, ARM, ASE Group, Bank of America Merrill Lynch, Broadcom, Cadence Design Systems, CSR, eSilicon, GLOBALFOUNDRIES, IBM, Jefferies Group LLC, J.P. Morgan, KPMG, Marvell, MediaTek, Mentor Graphics, Micron, Microsemi, Model N, Morgan Stanley, Needham & Co., NVIDIA, Open-Silicon, QUALCOMM, Qorvo (RFMD + TriQuint), QuickLogic, Rambus, Samsung, SanDisk, Silicon Labs, SMIC, Synopsys, UMC, VeriSilicon and Wells Fargo.

Initially focused on the military, uncooled thermal camera sales have grown significantly due to substantial cost reduction of micro bolometers and growing adoption in commercial markets, including thermography, automotive and surveillance applications. The market research and strategy consulting company, Yole Développement (Yole) confirmed this growth last July: indeed, Yole announced +25% CAGR between 2014 and 2019 in its infrared imaging report, Uncooled Infrared Imaging Technology Market (Ed. July 2014).

In this report, Yole’s analysts also highlighted the consumer applications: this market has moved to a new phase of growth in 2013-2014. Under this context, FLIR introduced in 2014, two disruptive technologies: the LEPTON core and FLIR ONE smartphone plugin.

“A high number of pre-release reservations for FLIR ONE (more than 30K units in July 2014) already confirms the commercial success of this innovation,” said Yole.

System Plus Consulting (System Plus), a sister company of Yole, specialized in technology and electronic components and systems cost analysis, looked into new FLIR’s products and proposes today a complete teardown analysis, entitled System Plus’ report details the bill-of-material (BOM), the manufacturing process flow and related cost analysis, the supply chain evolution and a comparison with FLIR i7 infrared camera and microbolometer sensors. FLIR Systems FLIR ONE & LEPTON Consumer Thermal Imager with Microbolometer. FLIR is the world’s largest long wave IR (LWIR) camera manufacturer and main microbolometer supplier, and as such it drives the price war in the commercial market.

“FLIR’s strategy is to take volume leadership in multiple markets, make economies of scale and further decrease price,” explained Michel Allain, CEO, System Plus, the reverse costing & engineering company. “To achieve this it exploits a vertically-integrated business model and a fabless structure, with manufacturing subcontracted to ON Semiconductor,” he added.

FLIR also boosted that strategy by acquiring Indigo System’s IR imager business in 2004 and Tessera’s Digital Optics wafer-level optics (WLO) division in 2013.

This year, the company released two innovative solutions: the Lepton core and FLIR ONETM smartphone plugin. Plugged into the back of an iPhone 5 or 5S, the FLIR ONETM is the first consumer thermal camera featuring LWIR technology. It contains a visible VGA (640×480) camera and a thermal camera which provide images blended using FLIR MSX Technology.

The thermal camera uses FLIR’s new Lepton core, where costs have been reduced in every element. The most expensive component, the sensor, is an uncooled vanadium-oxide (VOx) microbolometer, featuring an 80×60 pixel resolution with 17μm pixel size. Vox provides a high temperature coefficient of resistance (TCR) and low 1/f noise, resulting in excellent thermal sensitivity and stable uniformity. The microbolometer array is grown monolithically on top of a readout integrated circuit (ROIC) to comprise the complete focal plane array (FPA). An anti-reflection (AR) coated window is bonded above the sensor array via a wafer-level packaging (WLP) process, encapsulating the array in a vacuum. The purpose of the vacuum is to provide high thermal resistance between the microbolometer elements and the ROIC substrate, allowing for maximum temperature change in response to incident radiation.

The system electronics that receive and process the signal is a custom application-specific integrated circuit (ASIC) device mounted in flip-chip on the substrate. Digital Optics’ WLO brings an important part of the cost reduction. The silicon lenses are made at the wafer level with lithography and etching processes. The final cost reduction comes from the core housing, which is a three-dimensional molded interconnected device (3D-MID). Incorporating a conductive circuit pattern inside the housing provides grounding and allows FLIR to integrate a temperature sensor.

“Thanks to its strong integration at the core level with innovative WLO, wafer-level packaging (WLP) and custom ASIC use, the FLIR Lepton is the world’s smallest microbolometer-based thermal imaging camera core,” comments Romain Fraux, Project Manager, MEMS Devices, IC’s and Advanced Packaging, System Plus.

Screen Shot 2014-12-11 at 4.54.19 PM

“The long term growth of the equipment & materials business will be supported by the expansion of 3D TSV stack platforms,” says Yole (Yole Développement) in its latest report, “Equipment & Materials for 3DIC & WLP Applications“. The market research and strategy consulting company, Yole proposes a deep analysis of the equipment & materials market for 3DIC & WLP applications. Under this new report, analysts announce a market multiplied by 2.5 in the next 5 years.

“Mainly supported today by flip-chip wafer bumping, the equipment market generated revenue of more than $930M in 2013,” said Amandine Pizzagalli, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing, Yole. “It is expected that this equipment market revenue will peak at almost $2.5B”, she added.

Equipment & Materials for 3DIC & WLP Applications report presents an overview of the main equipment and materials used in the 3D & WLP applications. Under this technology & market analysis, Yole’s analysts describe insights on a number of equipment tools, breakdown by wafer size & revenue, by type of equipment & materials and advanced packaging applications. Moreover, they also provide a detailed analysis dedicated to key suppliers, market shares and technological highlights that impact the 3D & WLP industry. Equipment & materials market forecasts are calculated from 2013 to 2019.

This market is fueled by the 3D IC technology with TSV interconnects, an area offering opportunities for new developments in equipment modification— equipment that is much more expensive than the tools used for established Advanced Packaging platforms :3D WLP, WLCSP and flip-chip wafer bumping. Indeed, according to Yole, 2015 will be the key turning point for the adoption of 3D TSV Stacks since the memory manufacturers, such as Samsung, SK Hynix, Micron, have already started to ship prototypes this year and might be ready to enter in high-volume manufacturing next year.

In its latest announcement (Source: Song Jung-a, Financial Times), Samsung Electronics reveals its $14.7 billion investment, to build a new semiconductor plant in South Korea. This investment becomes the biggest single expenditure on a memory chip factory.

“The materials market will grow from $789M in 2013 to over $2.1B with a CAGR of 18%”

According to the Korean company, construction of the world’s biggest plant will begin in the first half of next year and complete in the second half of 2017. In addition, logic manufacturers will diversify investments from System-on-Chip to Package-on-Package and will benefit from Advanced Packaging platforms such as 2.5D interposer and FOWLP to stimulate their high-volume production.

From the materials side, Yole confirmed: “The materials market will grow from $789M in 2013 to over $2.1B with a CAGR of 18%.”

Growth will mainly be driven by the expansion of the next generation Wafer-Level-Packaging platforms: 3D TSV stacked memories, multi-layer RDL for FOWLP & WLCSP. Such platforms are becoming more complex and requiring additional and various thin layers, as well as advanced materials, to achieve better performance.

Texas Instruments Incorporated (TI) today announced it will expand its manufacturing capacity in Chengdu, China, with a 300mm wafer bumping facility. The addition of this manufacturing process in Chengdu further increases TI’s 300mm analog capacity and its ability to support customer demand.

TI announced the new operation today in concert with an event celebrating the grand opening of its seventh assembly/test (A/T) facility. The 358,000 square-foot A/T facility was purchased from UTAC Chengdu Ltd. in December 2013 and is now qualified and in production using advanced quad-flat no-leads (QFN) packaging technology.

TI’s manufacturing investment in China began in 2010 with the opening of the company’s first wafer fabrication plant in Chengdu. TI extended its investment with the adjacent A/T facility, opening today. TI will now further extend its operations in Chengdu with a 300mm wafer bumping facility on its Chengdu High-tech Zone (CDHT) campus.

“The CDHT has been a dynamic area of economic development in West China, offering a strong environment for investment and government service,” said Kevin Ritchie, senior vice president of TI’s Technology & Manufacturing Group. “We’re pleased to extend our 300mm manufacturing capabilities at our world-class Chengdu facility to further ensure continuity of supply to our customers and support their growth.”

Wafer bumping is a manufacturing process for advanced packaging technologies, which is completed prior to assembly. The process replaces wire bonding as the interconnection by applying solder, in the form of bumps, or balls, to a device at the wafer level. Nearly 40 percent of TI’s wafer production is manufactured using bump techniques.

This investment plan does not change TI’s capital spending forecast. The company continues to expect its capital spending levels to remain about 4 percent of revenue.

TI has served a broad array of customers in China for more than 27 years. In addition to its manufacturing footprint in Chengdu, TI has established 18 offices providing sales and applications support, four R&D centers and a product distribution center in Shanghai.

TI has manufacturing operations throughout the world, including the United States, Mexico, Germany, Scotland, China, Malaysia, Japan, Taiwan and the Philippines. Its 300mm operations include the industry’s first 300mm Analog wafer fab in Richardson, Texas as well as its DMOS6 wafer fab in Dallas and bump operations in the Philippines and Dallas.

SEMI announced today that the deadline for presenters to submit an abstract for the 26th annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) is extended to November 11.  ASMC, which takes place May 3-6, 2015 in Saratoga Springs, New York, will feature technical presentations of more than 80 peer-reviewed manuscripts covering critical process technologies and fab productivity. This year’s event features keynotes, a panel discussion, networking events, technical sessions on advanced semiconductor manufacturing, and tutorials.

ASMC, in its 26th year, continues to fill a critical need in our industry and provides a venue for industry professionals to network, learn and share knowledge on new and best-method semiconductor manufacturing practices and concepts.  Selected speakers have the opportunity to present in front of IC manufacturers, equipment manufacturers, materials suppliers, chief technology officers, operations managers, process engineers, product managers and academia. Technical abstracts are now due November 11, 2014.

This year SEMI (www.semi.org) is including two new technology areas (3D/TSV/Interposer; Fabless Experience). SEMI is soliciting technical abstracts in these key technology areas:

·        3D/TSV/Interposer

·        Advanced Metrology

·        Advanced Equipment Processes and Materials

·        Advanced Patterning / Design for Manufacturability

·        Advanced Process Control (APC)

·        Contamination Free Manufacturing (CFM)

·        Data Management and Data Mining Tools

·        Defect Inspection and Reduction

·        Discrete Power Devices

·        Enabling Technologies and Innovative Devices

·        Equipment Reliability and Productivity Enhancements

·        Fabless Experience

·        Factory Automation

·        Green Factory

·        Industrial Engineering

·        Lean Manufacturing

·        Yield Enhancement

·        Yield Methodologies

Complete descriptions of each topic and author kit can be accessed at www.semi.org/en/node/38316.  If you would like to learn more about the conference and the selection process, please contact Margaret Kindling at [email protected] or call 1.202.393.5552.   

Papers co-authored between device manufacturers, equipment or materials suppliers, and/or academic institutions that demonstrate innovative, practical solutions for advancing semiconductor manufacturing are encouraged.  To submit an abstract, visit http://semi.omnicms.com/semi/asmc2015/collection.cgi

Technical abstracts are due November 10, 2014. Learn more about the Advanced Semiconductor Manufacturing Conference; visit www.semi.org/asmc2015.

IBM and GLOBALFOUNDRIES today announced that GLOBALFOUNDRIES will acquire IBM’s global commercial semiconductor technology business, including IBM’s intellectual property, technologists and technologies.

IBM will pay GLOBALFOUNDRIES $1.5 billion in cash over the next three years to take the chip operations off its hands. The cash consideration will be adjusted by the amount of working capital which is estimated to be $200 million.

Workers prep Global Foundries' newest semiconductor factory, "Fab 8" in Saratoga County, New York State Source: IBM

Workers prep Global Foundries’ newest semiconductor factory, “Fab 8” in Saratoga County, New York State. Source: IBM

GLOBALFOUNDRIES will also become IBM’s exclusive server processor semiconductor technology provider for 22nm, 14nm and 10nm semiconductors for the next 10 years.

It its official statement, IBM said the agreement will enable the company to further focus on fundamental semiconductor research and the development of future cloud, mobile, big data analytics, and secure transaction-optimized systems. IBM will continue its previously announced $3 billion investment over five years for semiconductor technology research to lead in the next generation of computing. GLOBALFOUNDRIES will have primary access to the research that results from this investment through joint collaboration at the Colleges of Nanoscale Science and Engineering (CNSE), SUNY Polytechnic Institute, in Albany, N.Y.

Through the acquisition, GLOBALFOUNDRIES will gain substantial intellectual property including thousands of patents, making GLOBALFOUNDRIES the holder of one of the largest semiconductor patent portfolios in the world.

GLOBALFOUNDRIES will acquire and operate existing IBM semiconductor manufacturing operations and facilities in East Fishkill, New York and Essex Junction, Vermont, adding capacity to serve its customers and thousands of jobs to GLOBALFOUNDRIES’ workforce. GLOBALFOUNDRIES plans to provide employment opportunities for substantially all IBM employees at the two facilities who are part of the transferred businesses, except for a team of semiconductor server group employees who will remain with IBM. After the close of this transaction, GLOBALFOUNDRIES will be the largest semiconductor technology manufacturing employer in the Northeast.

GLOBALFOUNDRIES will also acquire IBM’s commercial microelectronics business, which includes ASIC and specialty foundry, manufacturing and related operations and sales. GLOBALFOUNDRIES plans to invest to grow these businesses.

IBM took a related pre-tax charge of $4.7 billion in its third quarter. It also reported a 4 percent drop in revenue on Monday.

What the analysts are saying

In terms of its 14nm FinFET collaboration with Samsung, the acquisition and the sudden influx of top talent from IBM will certainly help get GLOBALFOUNDRIES up to speed, Robert Maire of Semiconductor Advisors LLC reported.

“Even though Samsung still holds the keys and most of the cards in their relationship, the addition of the IBM horsepower does help even things a little bit even though IBM hasn’t been a serious player in the semiconductor business for quite a while it still has a deep well of expertise,” said Mr. Maire.

Currently, analysts at Summit Research Partners are not concerned about the long-term financial impact of the acquisition.

“We think that at present, when the transfer of IBM’s chip manufacturing assets to GLOBALFOUNDRIES is done, this is a non-event to the semiconductor industry for the most part,”  said Srini Sundararajan, Semiconductor, Semi-cap Equipment Analyst at Summit Research Partners. “That is sad considering that there were times in the 90s that IBM and Intel competed with one another over bragging rights for technological advancements.”

“In terms of potential impact to semiconductor equipment companies, there would likely be minimal to no impact as potential capex spend would be absorbed within the capex spend of Global Foundries,” Mr. Sundararajan concluded.

By Bettina Weiss, VP, Business Development, SEMI

The 2nd annual SEMI Vietnam Semiconductor Strategy Summit, co-organized with the Saigon Hi-Tech Park and with FabMax as the premier sponsor, was held September 16-17, 2014 in Ho Chi Minh City. This year’s conference drew over 160 attendees from Vietnam, Europe, U.S. and other Southeast Asian countries for a full day of presentations, panel discussions, networking opportunities and interactions with government, the Ho Chi Minh City Semiconductor Industry Association (HSIA) and the Saigon Hi-Tech Park (SHTP).

Fig 1

 

Building on the success of the inaugural Summit in September of 2013, attendees and speakers commented on the sense of progress and growing vitality of the emerging semiconductor manufacturing ecosystem in Vietnam. In his welcome remarks, Kai Fai Ng, president, SEMI Southeast Asia spoke to the importance of Vietnam in Southeast Asia, and SEMI’s plans to facilitate business interactions between Vietnamese and Southeast Asian companies, support efforts in workforce development and education, and continue to strengthen the relationship with key stakeholders in the country.

Of particular interest to the audience was the keynote presentation by Dr. Pham Ba Tuan, senior expert at CNS, the company tasked with executing the 200mm fab project in Saigon Hi-Tech Park that was announced last year. Tuan stressed the importance of domestically manufactured devices to satisfy a rapidly growing need in Vietnam thanks to the country’s young population and high university graduation rates. Tuan indicated that, depending on the product choice and the cost structure of the new wafer fab, at least 5,000 wafer starts per months would be needed. Fab capacity would be a function of product mix, so wafer starts need to be adjustable from 5,000 to 10,000 wafer starts per month. This would necessitate an investment of “a few million USD” to enable equipment purchases, fab construction and infrastructure readiness.

Source: Saigon Industry Corporation (CNS)

Source: Saigon Industry Corporation (CNS)

Tuan emphasized the fact that the choice of technology was a crucial factor for the wafer fab, since it influences investment volume, product portfolio, as well as the ability to develop a skilled workforce throughout the manufacturing process. The choice for the wafer fab in Saigon Hi-Tech Park is 180nm on 200mm wafers, a node and substrate size choice that will enable the production of a wide variety of products. According to CNS, revenue from all products made in technologies down to 180nm already account for US$1 billion.

Fig 3

The project timeline presented at the SEMI conference shows construction to begin in Q3 2015 and equipment move-in starting in Q2 2016.

Fig 4

The CNS presentation was followed by a brief company introduction to NXP delivered by Mr. Frederic Vincentini.

Kicking of the second session on Semiconductor Manufacturing in Vietnam, Ms. Sherry Boger, general manager, Intel Vietnam, provided an update on Intel’s plans to extend the production of flagship products to Vietnam — such as the Haswell microprocessor, which was recently announced. Intel’s Vietnam facility is the largest assembly and test facility in the global Intel network, employing over 3,000 Vietnamese employees when fully ramped.

Fab-Finder’s Todd Curtis shared his company’s learning experiences when they started doing business in Vietnam. He stated that the Fab-Finder management team brought over 100 years of semiconductor experience to the table — but 0 years in this country, making it imperative to rapidly get up to speed with respect to laws and taxes, cultural differences and sensitivities and different business practices. Mr. Curtis made a point of thanking his Vietnamese business partners, legal and tax advisors, HSIA and the Saigon Hi-Tech Park for the education they provided.

Prof. Cor Claeys of Imec presented Imec’s Open Innovation Model. Given the ever shrinking features, the complexity of new devices and applications and the rising cost in R&D, Claeys stressed the need for collaborative efforts in the semiconductor industry in order to keep up with the increasing need and speed of innovation.

Open Innovation

Source: Samsung

Source: Samsung

Contrasting Imec’s Open Innovation model with the traditional R&D approach – where most of the R&D is done in-house, no IP is shared and projects occur in silos –Claeys emphasized the need to share risk, cost, talent and IP among R&D partners in order to jointly reap the benefits of an accelerated, cost-effective RD activity.

This discussion provided a nice introduction into two presentations in the afternoon addressing technology transfers, IP creation and protection. Ms. Radhika Snirivasan, Ph.D., from IBM talked about the process by which technology transfers occur, and how opportunities and risks can be managed. Snirivasan described technology transfers as “quintessential” to any technology installation and shared IBM’s methodology, from preparation and training through installation and debug, qualification and yield learning to product qualification and ramp. She pointed to the added value when IP transfers are managed in highly customizable and flexible scenarios, providing protection and safeguards against risks such as the transfer infrastructure, adequacy of documentation and lack of technology readiness/maturity.

Fig 6

Dr. John Schmitz of NXP elaborated on the subject by presenting NXP’s view on the growing importance of Intellectual Property Rights (IPRs) since knowledge has become a critical driver in the economy. “IPRs are the economical manifestation of technical and business knowledge,” said Schmitz, stressing that IPRs provide a mechanism of protection against misuse. Speaking to current and future patent portfolios, he stated the requirement for future patents to be aligned with the overall company strategy, but stressed the inherent risk of having to look at least 5 years ahead — a mandate he contrasted with the product lifecycle of mobile phones, which is currently about 6 months.

The last formal presentation of the day was M+W Group’s “Integrated Approach for Semiconductor Wafer Fab Implementation,” presented by Mr. Andreas Authenrieth, M+W Group. His presentation focused on the prerequisites for a sustainable and cost-effective fab design, with particular emphasis on energy efficiency, environmental technology and the use of renewable energy. Authenrieth also included the use of secondary equipment in his presentation, explaining the importance of correlating tool specifications with technology requirements, paying close attention to consumables and spares and managing equipment testing and documentation. These considerations could be of particular importance for the CNS wafer fab project.

The 2nd annual SEMI Vietnam Semiconductor Strategy Summit concluded with two panel discussions: The first panel – investing and operating in the technology sector in Vietnam – was moderated by Eduard Hoeberichts, FabMax and included two presentations which addressed both the side of the operator and the side of the government. Johnny Choo of ON Semiconductor shared the experience as an operator of two back-end facilities in Vietnam and highlighted the very positive experience over the last several years as well as some of the areas for potential improvement.

This perspective was consistent with the observations that Sherry Boger of Intel made in the morning presentation. Dr. Le Hoai Quoc as president of Saigon High Tech Park presented the capabilities of the High Tech Park as well as the general government support in various areas for operators and new investors in Vietnam. The “two sides of the coin” perspective led to a lively discussion at the end of the panel session.

Fig 7

 

The second panel – Education and Workforce Development – was moderated by Ms. Bettina Weiss, SEMI, and included: Ms. Sherry Boger, Intel Vietnam; Dr. Carel von der Poel, Technical University Delft; Dr. Pham Ba Tuan, CNS; and Cao Nguyen, ON Semiconductor. The importance of developing a skilled talent pool in Vietnam was also a prominent topic in SEMI’s 2013 Vietnam Semiconductor Strategy Summit. Panelists engaged in a lively debate about the need to do more for women in high tech, partnerships with international universities and special programs like HEEAP (Higher Engineering Education Alliance Program) which Intel is very actively supporting, as well as the Technical University Delft/DIMES Center, which has been engaged with Vietnam’s Hanoi University of Technology, Hanoi University of Civil Engineering and the Ministry of Science and Technology in various programs. According to Dr. van der Poel, it would be fairly easy to extend these programs to the semiconductor space, as Vietnam starts focusing on workforce readiness in this sector.

At the networking reception, attendees and speakers alike commented on the sense of progress and excitement over the last 12 months. Local attendees in particular appreciated the rich presentations and perspectives from the conference speakers, and international companies, including our sponsors, left with a lot of new contacts and business opportunities in country — and the sense that Vietnam is very serious about becoming a stakeholder in the global semiconductor market.

SEMI is grateful for the support of the sponsoring companies who helped make this year’s Summit possible:  FabMax, CNS, M+W Group, Advantest, Fab-Finder, GES, Lam Research, NXP, QAM, and Surplus Global.

India has a very large industry base of electronics items, but there is little manufacturing base for semiconductors. As of now India doesn’t have any operational wafer fabrication plants and depends extensively on the imports. Semiconductor industry is 100 percent import based with India importing semiconductors worth $10 billion in 2013. Since In 2013, India spent $169 billion on oil imports, $54 billion on gold imports and $31.5 billion on electronic imports.

Semiconductors are used extensively in various applications, which offer immense potential for the growth of this industry in India.  Semiconductors are used majorly in Mobile Devices, Telecommunications, Information Technology & Office Automation (IT & OA), Industrial, Automotive and other industries (Aerospace, Defense and Medical industries).

The latest research report by NOVONOUS finds that the semiconductor industry is estimated to grow from $10.02 billion in 2013 to $52.58 billion in 2020 at CAGR of 26.72 percent.

According to this research report, mobile devices are expected to grow at CAGR of 33.4 percent from 2013 to 2020. The contribution to semiconductor revenue is expected to grow from 35.4 percent in 2013 to 50.7 percent in 2020.

Telecommunication segment is expected to grow at CAGR of 26.8 percent from 2013 to 2020 and its contribution to total revenue will remain the same at 19.7 percent in 2020.

IT&OA contribution to the total semiconductor revenue will come down from 28.3 percent in 2013 to 17.4 percent in 2020 due to consolidation in this sector. This segment will grow at CAGR of 18.2 percent over the next seven years.

Consumer electronics segment is expected to grow at CAGR of 18.8 percent and the contribution to the total semiconductor revenue will come down from the current level of 5.6 percent in 2013 to 3.5 percent in 2020. Industrial electronics segment is expected to grow at CAGR of 19.6 percent and the contribution to the total semiconductor revenue will come down from current level of 4 percent to 2.7 percent.

Automotive electronics segment is expected to grow faster at CAGR of 30.5 percent from 2013 to 2020; its revenue contribution will increase from 3.2 percent in 2013 to 3.9 percent in 2020.