Category Archives: Wafer Level Packaging

SEMI, the industry association representing the global electronics manufacturing supply chain, and TechSearch International today reported that the global semiconductor packaging materials market reached $16.7 billion in 2017. While slower growth of smartphones and personal computers – the industry’s traditional drivers – is reducing material consumption, the slowdown was offset by strong unit growth in the cryptocurrency market in 2017 and early 2018. Flip chip package shipments into the cryptocurrency market, while providing a windfall to many suppliers, are not expected to remain at high levels.

The Global Semiconductor Packaging Materials Outlook shows that, despite growth in automotive electronics and high-performance computing, continuing price pressure and declining material consumption will constrain future material revenue growth to steady single-digits, with the materials market forecast to reach $17.8 billion in 2021. IC leadframes, underfill, and copper wire are among the materials segments that will see single-digit unit volume growth through 2021.

Laminate substrate suppliers participating in the sale of flip chip substrates for cryptocurrency saw volume increases in 2017, but this segment continues to be battered by increased use of multi-die solutions and the shift to wafer level packages (WLPs), including fan-out WLP, slowing growth. Wafer-level packaging (WLP) dielectrics and plating chemistry suppliers will experience stronger revenue growth as the adoption of advanced packaging continues.

Over the next several years, advances in the semiconductor materials market will present a number of opportunities driven by trends including:

  • Continued adoption of FO-WLP including FO-on-substrate solutions with high density geometries down to 2µm lines and spaces
  • Liquid crystal polymer (LCP) under consideration as a possible material option because of its good electrical performance and low moisture absorption, especially for mmWave applications such as 5G
  • Adoption of low-cost package solutions such as MIS and other routable-QFN technologies
  • PPF QFN volumes are rising with automotive applications, driving a requirement for roughened plating to deliver needed reliability
  • Expansion of photoresist plating capability for selective plating of leadframes
  • Thermally enhanced and high-voltage mold compounds for power and automotive devices
  • Thermally conductive die attach materials other than solder die attach for power applications

Report highlights include:

  • Laminate substrates represent the largest revenue segment of the materials market with more than $6 billion in sales for 2017.
  • Overall leadframe shipments are forecast to grow at a 3.9 percent CAGR from 2017 through to 2021, with LFCSP (QFN type) experiencing the strongest unit growth, an 8 percent CAGR.
  • Following five years of decline, gold wire shipments increased in both 2016 and 2017 though represent just 37 percent of the total bonding wire shipments in 2017.
  • Liquid encapsulant revenues totaled $1.3 billion in 2017 with single-digit expected through 2021. LED packaging applications are driving the revenue growth over the forecast period though downward pricing pressures are a constant in the market.
  • Die attach material revenues reached $741 million in 2017 with single digit growth to 2021. DAF materials will experience higher unit growth, though downward pricing trends continue.
  • Solder ball revenues reached $231 million in 2017. The revenue outlook depends on fluctuations in metal pricing.
  • The wafer-level plating chemical market was put at $263 million in 2017 with strong growth through 2021. RDL and Cu pillar will be the key growth segments.

SEMI and TechSearch International, Inc. teamed up again to develop the 8th edition of the Global Semiconductor Packaging Materials Outlook, a comprehensive market research study on the semiconductor packaging materials market. Interviews were conducted with more than 130 semiconductor manufacturers, packaging subcontractors, fabless semiconductor companies, and packaging material suppliers to gather information for the report. The report covers the following semiconductor packaging materials segments: substrates, leadframes, bonding wire, mold compounds, underfill materials, liquid encapsulants, die attach materials, solder balls, wafer level package dielectrics, and wafer-level plating chemicals.

By Emir Demircan, Senior Manager Advocacy and Public Policy, SEMI Europe

With its leading research and development hubs, materials and equipment companies and chipmakers, the EU is in a strategic position in the global electronics value chain to support the growth of emerging applications such as autonomous driving, internet of things, artificial intelligence and deep learning. Underpinning the European electronics industry’s competitive muscle requires a new EU-wide strategy aimed at strengthening the value chain and connecting various players. Specializing and investing in key application segments, such as automotive where the EU enjoys a central place at global level, is crucial to help European electronics industry hold its ground.  In parallel, Europe’s production capabilities need bolstered, requiring effective use of Important Projects of Common European Interest (IPCEI).

On research, development and innovation (RD&I), the upcoming Framework Programme 9 (FP9) must provide unprecedented collaboration and funding opportunities to Europe’s electronics players. Concerning small and medium enterprises (SMEs) and startups, it is vital that EU policies are aligned with global trends and small and young companies benefit from a business-friendly regulatory framework. And as an overarching action, building a younger, bigger and more diverse talent pipeline is paramount for Europe to innovate in the digital economy.

Laith Altimime, President at SEMI Europe, opening speech at ISS Europe 2018

Laith Altimime, President at SEMI Europe, opening speech at ISS Europe 2018

These were the clarion messages that emerged from the Industry Strategy Symposium (ISS) Europe organized by SEMI in March, an event that brought together more than 100 industry, research and government representatives for in-depth discussions on strategies and innovations for Europe to compete globally. Here are the key takeaways:

1) Build a strong electronics value chain with a focus on emerging demands

In recent years the EU has focused on beefing up semiconductor production in Europe within the 2020-25 window, starting with the EU 10|100|20 Electronic Strategy of 2013. The strategy aims to secure about 20 percent of global semiconductor manufacturing by 2020 with the help of € 10 billion in public and private funding and € 100 billion investment from the industry. Today, Europe is not nearly on track to achieving this target. Supply-side policies have done little to help grow the EU semiconductor industry. Now is the time to change our thinking.

To nourish the electronics industry in Europe, we need to shift our focus to demand. Semiconductors are a key-enabling technology for autonomous driving, wearables, healthcare, virtual and augmented reality (VR/AR), artificial intelligence (AI) and all other internet of things (IoT) and big data applications. To become a world leader in the data economy and energize its semiconductor industry, Europe needs to start by better understanding the evolution of data technologies and their requirements from electronics players, then design and implement an EU-wide strategy focused on strengthening collaboration within the value chain.

2) Specialize and invest in Europe’s strengths that are enabled by electronics

Jens Knut Fabrowsky, Executive VP Automotive Electronics at Bosch

Jens Knut Fabrowsky, Executive VP Automotive Electronics at Bosch

Fueled by increasing demand for smaller, faster and more reliable products with greater power, the global electronics industry has developed a sophisticated global value chain. Europe brings to this ecosystem leading equipment and materials businesses, world-class R&D and education organizations, and key microelectronics hubs throughout Europe that are home to multinationals headquartered both in and outside of the EU. Nevertheless, global competition is growing ever fiercer in the sectors where the European microelectronics industry is most competitive: automotive, energy, healthcare and industrial automation. In the future, Europe is likely to be more challenged between the disruptive business models of North America and the manufacturing capacity of East Asia. The European electronics industry must re-evaluate its strengths and set a strategic direction.

Make no mistake: Europe is in a strong position to advance its microelectronics industry. The EU already boasts leading industries that rely on advances made by electronics design and manufacturing. Take the automotive industry – crucial to Europe’s prosperity. Accounting for 4 percent of the EU GDP and providing 12 million jobs in Europe, according to the European Commission, the EU automotive industry exerts an important multiplier effect in the economy. Automotive is essential to both upstream and downstream industries such as electronics – a level of importance not lost on the EU’s GEAR 2030 Group. Since the 1980s, automotive industry components have increasingly migrated from mechanical to electrochemical and electronics.

Today, electronic components represent close to a third of the cost of an automobile, a proportion that will grow to as high as 50 percent by 2030 with the rise of autonomous and connected vehicles. Automotive experts anticipate that over the next five to 10 years, new cars will feature at least some basic automated driving and data exchange capabilities as electronics deepen their penetration into the automotive value chain. Europe’s leadership position and competitive edge in automotive are under threat by competitors across the world as they invest heavily in information and communications technologies (ICT) and electronics for autonomous driving and connected vehicles. Investing in next-generation cars will help the European electronics industry retain its strong competitive position, as will investments in other key application areas such as healthcare, energy and industrial automation where Europe is a global power.

3) Make better use of Important Projects of Common European Interest (IPCEI)

Microelectronics is capital-intensive, with a state-of-the-art fab easily costing billions of euros. That’s why countries around the world are making heavy government-backed investments to build domestic fabs. For instance, China’s “Made in China 2025” initiative, which establishes an Integrated Circuit Fund to support the development of the electronics industry, calls for 150 billion USD in funding to replace imported semiconductors with homegrown devices. In 2014, the European Commission adopted new rules to IPCEI, giving Member States a tool for financing large, strategically important transnational projects. IPCEI should help Member States fill funding gaps to overcome market failures and reinvigorate projects that otherwise would not have taken off. To fully benefit from the IPCEI, the industry requires Member States involved in a specific IPCEI to work in parallel and at the same pace and faster approvals of state-supported manufacturing projects.

4) Use FP9 to strengthen Europe’s RD&I capabilities

Panel Discussion on growing Europe in the global value chain. (L-R) Bryan Rice, GLOBALFOUNDRIES; James Robson, Applied Materials Europe; Joe De Boeck, imec; Leo Clancy, IDA Ireland; James O’Riordan, S3; Colette Maloney, European Commission; Moderator: Andreas Wild

Panel Discussion on growing Europe in the global value chain. (L-R) Bryan Rice, GLOBALFOUNDRIES; James Robson, Applied Materials Europe; Joe De Boeck, imec; Leo Clancy, IDA Ireland; James O’Riordan, S3; Colette Maloney, European Commission; Moderator: Andreas Wild

A top EU priority in recent years has been to enhance Europe’s position as a world leader in the digital economy. Fulfilling this mission requires an innovative electronics industry in Europe. To this end, FP9 should encourage greater collaboration between large and small companies to leverage their complementary strengths – the dynamism, agility and innovation of smaller companies and the ability of larger companies to mature and scale new product ideas on the strength of their extensive private funding instruments and testing and demonstration facilities. Also, future EU-funded research actions should prioritize electronics projects involving players across the value chain, starting with materials and equipment providers and spanning chipmakers, system integrators and players from emerging “smart” verticals such as automotive, medical technology and energy. FP9 should also play the pivotal role of setting clear objectives, increasing investments, and easing rules for funding. These measures would help expand the European electronics ecosystem, accelerate R&D results and defray the rising costs of developing cutting-edge solutions key to the growth of emerging industry verticals.

5) Support high-tech SMEs, entrepreneurship and startups to become globally competitive

European SMEs, the backbone of EU’s manufacturing, are already strong players in the global economy, making outsize contributions to Europe’s innovation. Yet more of Europe’s small and young businesses with limited resources are challenged in Europe’s regulatory labyrinth. Only by improving the European regulatory environment in a way that supports young and small businesses can Europe fulfill its vision of a dynamic electronics ecosystem and digital economy. Access to finance must also be easier, particularly as underinvested startups struggle under a European venture capital apparatus that is smaller and more fragmented than those in North America and Asia. Early-stage funding instruments such as bank loans are essential for young businesses but they often face barriers to finance due to the sophistication of their proposed business models that are difficult to be understood and supported by banks.

One answer is to better familiarize Europe’s financial sector with industrial SMEs and startups so they can co-develop financial tools that support the growth of small and young businesses. Also, the narrow European definition of SME with staff headcount limited to 250 block innovative companies from access to financial tools exclusively provided to SMEs. By contrast, the United States defines SMEs as businesses with as many as 500 employees, placing their EU counterparts at distinct funding disadvantage. EU should ensure that its SME policy is aligned with global trends and industry needs.

6) Create a bigger and more diverse talent pipeline with a hybrid skills set 

Europe’s world-class education and research capabilities help supply the electronics industry with skilled workforce. Yet the blistering pace of technology innovation calls for rapidly evolving skills sets, a trend that has led to worker shortages at electronics companies and left the sector fighting to diversify its workforce and strengthen its talent pipeline. The deepening penetration of electronics in AI, IoT, AR/VR, high-performance computing (HPC), cybersecurity and smart verticals is giving rise to a new set of skills that blend production technologies, software and data analytics. As more technologies converge, the gap between university education and business needs continues to widen.

One solution is work-based learning – allowing students to build job skills in a setting related to their career pathway. Encouraging higher female participation in STEM education programs at the high school and university levels is also a must to overcome the traditionally low number of females entering high technology. To build on its reputation as “a place to work” in the eyes of the international job seekers, Europe also needs a more flexible immigration framework to attract skilled labour to high-tech jobs.

Save the Date: Industry leaders, research and government representatives will meet again next year at the ISS Europe organized by SEMI on 28-30 April 2019 in Milan, Italy. More details regarding the event will be published soon on www.semi.org/eu.

The 2018 Symposia on VLSI Technology & Circuits will deliver a unique perspective into the technological ecosystem of converging industry trends – machine learning, IoT, artificial intelligence, wearable/implantable biomedical applications, big data, and cloud computing – the emerging technologies needed for ‘smart living.’ In a weeklong conference packed with technical presentations, a demonstration session, panel discussions, focus sessions, short courses, and a new “Friday Forum” on machine learning, the microelectronics industry’s premiere international conference covers technology, circuits, and systems with a range and scope unlike any other conference.

Built around the theme of “Technology, Circuits & Systems for Smart Living,” the Symposia programintegrates advanced technology developments, innovative circuit design, and the applications that they enable as part of our global society’s adoption of smart, connected devices and systems that change the way humans interact with each other.

Plenary Sessions (June 19):
The Symposia will open with two technology plenary sessions, including “Memory Technology: The Core to Enable Future Computing Systems” by Scott DeBoer, executive VP for technology development, Micron; and “Revolutionizing Cancer Genomic Medicine by Artificial Intelligence & Supercomputing with Big Data” by Satoru Miyano, director of the Human Genome Center, Institute of Medical Science at University of Tokyo.

The following Circuits plenary sessions include “Hardware-Enabled Artificial Intelligence” by Dr. Bill Dally, chief scientist & senior VP, Nvidia; and “Semiconductor Technologies Accelerate Our Future Vision: ‘ANSHIN Platform'” by Tsuneo Komatsuzaki, advisor, SECOM.

Focus Sessions (June 19, 20 & 21):
As part of the Symposia’s ongoing program integration, a series of joint focus sessions will be held to present contributed papers from the Technology and Circuits Symposia on June 20 and 21. Topics will include: “Heterogeneous System Integration,” “Power Devices & Circuits,” “New Devices & Systems for AI,” and “Design & Technology Co-Optimization (DTCO) in Advanced CMOS Technology.”

On June 19, the Technology focus sessions will include: “Back-End Compatible Devices & Advanced Thermal Management“ and “Sensors and Devices for IoT, Medicine, & Smart Living.” The Circuits focus sessions, held on June 21, include “Machine Learning Circuits & SoCs,” and “Advanced Wireline Techniques.”

Evening Panel Sessions (June 18 & 19):
A joint panel discussion, bringing together leading experts from Technology & Circuits programs will be held June 18 to answer the question, “Is the CPU Dying or Dead? Are Accelerators the Future of Computation?”

As Moore’s Law slows down and processor architecture innovations move away from single thread performance, the future of computing seems to be moving away from the general purpose CPU. Is the era of the CPU over? Will future CPUs simply coordinate activity among accelerators and other specialized processing units? The panel will examine future computing workloads as well as the innovative technology and circuit solutions that enable them, from moving computation closer to memory, and developing bio-inspired systems.

The Technology evening panel session panel discussion, held on June 19 will examine “Storage Class Memories: Who Cares? DRAM is Scaling Fine, NAND Stacking is Great.” Memory – DRAM and NAND scaling – though difficult, has persisted due to rapid innovations and continued engineering. Although there are new economic and fundamental challenges posed to continued memory scaling, a new class of memories – Storage Class memories, appears to bridge the latency gap that exists in the memory hierarchy and promises to improve system performance. Now the real question becomes – who really cares now? System architects, DRAM/NAND manufacturers? End users? The panel will discuss the challenges and opportunities of storage class memories in the environment where DRAM and NAND scaling continue.

The question to be addressed by the Circuits evening panel session, also held on June 19, is “What’s The Next Big Thing After Smartphones?” Although smartphones have driven the industry for more than a decade, the pace of innovation is slowing, and market saturation is occurring. What will be the next big thing? The Internet of Things? Automotive electronics? Virtual reality? Something else? A set of panelists with diverse expertise will discuss the possibilities.

Thursday Luncheon (June 21):
Continuing the Symposia’s tradition of thought-provoking presentations centered around the conference theme is the Thursday luncheon talk, entitled “The Hardware of The Mind, from Turing to Today,” by Grady Booch, chief scientist for software engineering at IBM Research. As scientists continue to the computing power of the human mind, they strive to bridge the gap between the physicality of silicon and the exquisite wonder of the brain. This presentation examines the journey of the hardware of the mind – from the Iliad, to da Vinci, to Edison, to Turing, to today – including an examination of how the growing understanding of the brain transforms the engineering of silicon, and how the laws of physics as well as the laws of humanity constrain that journey.

Full Day Short Courses (June 18):
The Technology Short Course – “Device & Integration Technologies for Sub-5nm CMOS & the Next Wave of Computing” will cover a range of topics, including CMOS technology beyond the 5nm node, MOL/BEOL interconnects, atomic-level analysis for FinFET & Nanowire design, 3D integration for image sensors, neuromorphic AI hardware, memory technologies for AI/machine learning, and sensors & analog devices for next generation computing.

The first Circuits Short Course – “Designing for the Next Wave of Cloud Computing” will address advanced computer architectures, GPU applications and FPGA acceleration, the evolution of memory and in-memory computation, and advanced packaging, power delivery and cooling for cloud computing, as well as the impact of quantum computing.

The second Circuits Short Course – “Bio-Sensors, Circuits & Systems for Wearable & Implantable Medical Devices” will cover circuits and systems for mobile healthcare, analog front-ends for bio-sensors, digital phenotyping using wearable sensors, bi-directional neural interfacing, body-area networking and body-coupled communications, ultrasound-on-a-chip, as well as a CMOS-based implantable retinal prosthesis.

Demonstration Session (June 18):
Following a successful launch last year in Kyoto, the popular demonstration session will again be part of the Symposia program, providing participants an opportunity for in-depth interaction with authors of selected papers from both Technology and Circuits sessions. These demonstrations will illustrate technological concepts and analyses through table-top presentations that show device characterization, chip operational results, and potential applications for circuit-level innovations.

Friday Forum (June 22):
New to the Symposia program this year will be the Friday Forum – a full-day series of presentations focusing on how technology and circuit designers engage in and drive the future of AI/machine learning systems, a subject area that continues to evolve as an impactful driver of the integrated systems that are part of the Symposia’s “Smart Living” theme. “Machine Learning Today & Tomorrow: A Technology, Circuits & Systems View” will provide the foundations and performance metrics for machine learning systems, an examination of advanced and emerging circuit architectures for next-generation systems, as well as highlighting tools and datasets for benchmarking and evaluating service-oriented architecture (SoA) machine learning systems.

The annual Symposium on VLSI Technology & Circuits will be held at the Hilton Hawaiian Village in Honolulu, Hawaii from June 18-22, 2018, with Short Courses held on June 18 and a special Friday Forum dedicated to machine learning/AI topics on June 22. The two conferences have been held together since 1987, providing an opportunity for the world’s top device technologists, circuit and system designers to exchange leading edge research on microelectronics technology, with alternating venues between Hawaii and Japan. A single registration enables participants to attend both Symposia.

By Jamie Girard, Sr. Director, Public Policy, SEMI

Although many months past due, Congress on March 23 finalized the federal spending for the remainder of fiscal year (FY) 2018, only hours before a what would have been the third government shutdown of the year. Congressional spending has been allocated in fits and starts since the end of FY 2017 last September, with patchwork deals keeping things running amid pervasive uncertainty. While this clearly isn’t an ideal way to fund the federal government, the end result will make many in the business of research and development pleased with the addition of more resources for science and innovation.

There was grave concern over the future of federal spending with the release of the president’s FY 2018 budget, which would have cut the National Science Foundation (NSF) budget by 11 percent and National Institutes of Standards & Technology (NIST) spending by 30 percent. Relief came with early drafts from Congress that whittled those cuts down to between 2-9 percent. But the real boost was a February bipartisan Congressional agreement that lifted self-imposed spending caps and introduced a generous dose of non-defense discretionary spending, increasing NSF spending 3.9 percent over the previous year and the NIST budget an astounding 25.9 percent over FY 2017 levels.

SEMI applauds this much-needed support for basic research and development (R&D) at these agencies after their budgets were cut or flat-funded for multiple cycles. It is well understood that federal R&D funding is critical to U.S. competitiveness and future economic prosperity. With the stakes that high, full funding of R&D programs at the NSF and NIST should be a bipartisan national priority backed by a strong and united community of stakeholders and advocates in the business, professional, research, and education communities.

With the work for FY 2018 completed, Congress will now turn to FY 2019 spending – already behind schedule due to the belated completion of the previous year’s budget. With 2018 an election year, Congress will likely begin work on the FY 2019 budget in short order, but probably won’t complete its work prior to the November elections.  SEMI will continue to work with lawmakers to support the R&D budgets at the agencies and their important basic science research. If you’d like to know how you can be more involved with SEMI’s public policy work, please contact Jamie Girard, Sr. Director, Public Policy at [email protected].

Leti, a research institute of CEA Tech, today announced Leti’s silicon photonics process design kit (PDK) for photonic circuits is available in the Synopsys PhoeniX OptoDesigner suite.

Leti’s integrated silicon photonics platform has been developed for high-speed optical transceivers and highly-integrated optical interposer applications. The process design kit contains the design rules and building blocks for multi-project wafer and custom runs on Leti’s Si310 platform. It also includes a catalogue of components available at Leti, allowing Synopsys PhoeniX OptoDesigner customers to select the ones they need to build their circuits. Once the customers have a completed circuit design, Leti produces a proof of concept on a multi-project wafer run.

Used by more than 300 designers worldwide, OptoDesigner gives access to a complete set of passive components, such as grating couplers, silicon waveguides and transitions; and active components, such as high-speed Mach Zehnder modulators and high-speed germanium photodiodes based on Leti’s fab. It also includes physical verification tools checking whether the contributions meet the design rules defined by the fabrication constraints in Leti’s clean room.

“On the same mask, with this design kit, we are able to have photonic circuits performing various functions, according to the area of expertise of the different contributors,” said Andre Myko, responsible of MPW runs at Leti. “Fabless companies and academics therefore can realize substantial cost savings by ‘sharing’ production costs on multi-project wafer runs.”

Leti is a world leader in silicon photonics technology. Its photonic platform is France’s largest R&D center for the development, characterization and simulation of optoelectronic systems and components. Its activities range from component design through component fabrication, integration into systems and packaging.

“Leti’s process design kit available for Synopsys’ PhoeniX OptoDesigner is a licensed plug-in library of solutions that support multi-project wafers and custom runs provided by Leti,” said Niek Nijenhuis, global business development manager of Synopsys’ PhoeniX OptoDesigner products. “In addition to the photonic elements from the standard OptoDesigner library, Leti’s PDK contains technology-specific information like mask layer names, design rules, validated building blocks, die sizes and GDS file settings.”

Leti’s silicon photonics platform is also fully compatible with STMicroelectronics’ platform in Crolles, which enables fabless customers to take their new circuits to high-volume production.

Nobuaki Kurumatani today took office as the first Chairman and CEO of Toshiba Corporation (TOKYO:6502) to be appointed from outside the company in over 50 years.

Commenting on his appointment as Representative Executive Officer and Chairman and CEO, Mr. Kurumatani said, “I am honored to be appointed CEO, and very much aware of the responsibilities I take on. Toshiba is not just any company. Its corporate DNA has realized countless Japan- and world-first technologies and products, made Toshiba a source of pride in Japan for nearly 145 years, and also made us a global leader.

“I believe that helping Toshiba back on its feet is my true calling. I am here at Toshiba to support change and transformation, and I see my role as to build on the company’s resilience and to lead its recovery. To secure growth, we must radically improve our earning power and reinforce our finances. We must move out of our comfort zone and promote fundamental reforms.”

Mr. Kurumatani most recently served as President of CVC Asia Pacific Japan (CVC). Before joining CVC in May 2017, he was Deputy President and a Director of Sumitomo Mitsui Financial Group, one of the largest financial institutions in Japan, where his career was devoted to corporate planning, public relations and internal auditing. He is a graduate of the University of Tokyo, where he studied Economics.

Satoshi Tsunakawa has taken on a new role in Toshiba as Representative Executive Officer and President, and Chief Operations Officer (COO). From today on, Mr. Kurumatani and Mr. Tsunakawa will together execute the management of Toshiba Group.

Fueled by heavy government investment, IC packaging and testing in China generated $29 billion in revenue in 2017, making China the world’s largest consumer of packaging equipment and materials, according to SEMI’s recent China Semiconductor Packaging Industry Outlook report. The report, based on research conducted between July 2017 through the end of January 2018, also revealed that China’s IC packaging and testing industry is more mature than its IC manufacturing and design sectors, though IC packaging and testing revenue growth has slowed in recent years.

SEMI surveyed 87 semiconductor packaging- and assembly-related companies for the research report, including key semiconductor packaging manufacturers in China. More than 100 companies compete in China’s packaging and assembly market, including leading multinational companies and emerging domestic players. More than half of China’s packaging companies are located in the Yangzi delta region, while midwestern China has emerged as a hotbed for packaging plants.

Additional report highlights:

  • Compared to other world regions, China’s investments in IC packaging and testing saw the fastest growth over the past decade, with domestic manufacturers securing strong support from both national and local governments to ramp capacity and technical capabilities.
  • The top three domestic packaging companies – JCET, Huatian, and TFME – all entered the top 10 global OSAT rankings following expansions and acquisitions from 2012 to early 2016.
  • Packaging companies such as SPIL, TFME, NCAP continue to build new plants.
  • As a major manufacturing region for LED products, China has become more prominent within the semiconductor packaging industry. China’s LED product sector grew to $13.4 billion (half of IC packaging) in 2017.
  • In 2017, China accounted for about 26 percent of the global packaging materials market, with China’s packaging materials revenue forecast to exceed $5.2 billion in 2018.
  • In 2017, the China assembly equipment market reached $1.4 billion in revenue, remaining the world’s largest with 37 percent share.
  • In 2017, assembly equipment manufactured in China (including assembly equipment made by foreign-owned companies and JVs) accounted for 17 percent of China’s assembly equipment market.
  • With the fast growth in the semiconductor packaging market, domestic packaging materials suppliers are expanding with the industry and now starting to serve leading international packaging houses.

The SEMI report also elucidates the importance of both central and local government support, guidelines and policies on China’s semiconductor industry. The National Fund and local IC funds, created in 2014, and the Made in China 2025 policy provided a second boost to China’s IC industry growth. For packaging and testing enterprises, maintaining strong communications and relations with relevant government bodies and industry associations is essential to securing both political and financial support, in part because China’s semiconductor manufacturers and IC assembly and packaging companies are expected to purchase equipment and materials made in China.

 

Bringing together a technical program that encompasses ‘big integration’ of a number of critical industry trends – machine learning, IoT, artificial intelligence, wearable/implantable biomedical applications, big data, and cloud computing – the 2018 Symposia on VLSI Technology & Circuits will showcase a convergence of technologies needed for ‘smart living.’ As the microelectronics industry’s premiere international conference covering technology, circuits, and systems, the Symposia continues to define the evolution of innovations that will shape the future of our increasingly connected world.

The Symposia theme of “Technology, Circuits & Systems for Smart Living” connects the related plenary presentations, panel discussions, focus sessions, short courses, along with a new Friday Forum on machine learning to provide a unique synergy between advanced technology developments, innovative circuit design, and the applications that they enable – as part of our global society’s transition to a new frontier of smart, connected devices and systems that change the way humans interact with technology – and with each other.

“This year’s Technology program is focused on the critical building blocks needed to realize a truly integrated IoT,” said Mukesh Khare, Symposium on VLSI Technology general chair. “Advanced memory technologies for AI and machine learning, the next wave of advanced computing (supercomputing/cloud/neuromorphic), the cutting edge of CMOS scaling (beyond 5nm/nanowire devices), and the advanced low-power sensors needed to connect them all are just some of the highlights of the Technology program.”

“The Circuits program will examine how the next wave of computing systems need to be designed to realize the potential of AI, machine learning, SOC technology, wearable/implantable biomedical systems, and the IoT,” explained Gunther Lehmann, Symposium on VLSI Circuits general chair. “A demonstration session that showcases real-life applications is designed to enable conference participants to see these innovations first hand.”

The Symposia will also include a series of joint focus sessions that include invited and contributed papers on topics of mutual interest to both technology and circuit attendees. As part of the unique Symposia program, these joint Technology & Circuits focus sessions enable participants to engage in meaningful interaction with their colleagues in different disciplines. In addition, there will be a joint evening panel session by leading industry experts to address critical issues surrounding major industry developments.

Capping off the joint Symposia program will be a series of nine presentations comprising the Friday Forum on machine learning, a subject area that continues to evolve as an impactful driver of the integrated systems that are part of the Symposia’s “Smart Living” theme.

The annual Symposium on VLSI Technology & Circuits will be held at the Hilton Hawaiian Village in Honolulu, Hawaii from June 19-21, 2018, with Short Courses held on June 18 and a special Friday Forum dedicated to machine learning/AI topics on June 22. The two conferences have been held together since 1987, providing an opportunity for the world’s top device technologists, circuit and system designers to exchange leading edge research on microelectronics technology, with alternating venues between Hawaii and Japan. A single registration enables participants to attend both Symposia.

The Symposium on VLSI Technology is sponsored by the IEEE Electron Devices Society and the Japan Society of Applied Physics, in cooperation with the IEEE Solid State Circuits Society.

The Symposium on VLSI Circuits is sponsored by the IEEE Solid State Circuits Society and the Japan Society of Applied Physics, in cooperation with the Institute of Electronics, Information and Communication Engineers.

By Jay Chittooran, SEMI Public Policy

Following through on his 2016 campaign promise, President Trump is implementing trade policies that buck conventional wisdom in Washington, D.C. and among U.S. businesses. Stiff tariffs and the dismantling of longstanding trade agreements – cornerstones of these new actions – will ripple through the semiconductor industry with particularly damaging effect. China, a chief target of criticism from President Trump, has again found itself in the crosshairs of the administration, with trade tensions rising to a fever pitch.

The Trump Administration has long criticized China for what it considers unfair trade practices, often zeroing in on intellectual property. In August 2017, the Office of the U.S. Trade Representative (USTR), charged with developing and recommending U.S trade policy to the president, launched a Section 301 investigation into whether China’s practice of forced technology transfer has discriminated against U.S. firms. As the probe continues, it is becoming increasingly clear that the United States will impose tariffs on China based on its current findings. Reports suggest that the tariffs could come soon, hitting a range of products from consumer electronics to toys. Other measures could include tightening restrictions on the trade of dual-use goods – those with both commercial and military applications – curbing Chinese investment in the United States, and imposing strict limits on the number of visas issued to Chinese citizens.

With China a major and intensifying force in the semiconductor supply chain, raising tariffs hangs like the Sword of Damocles over the U.S. and global economies. A tariff-ignited trade war with China could stifle innovation, undermine the long-term health of the semiconductor industry, and lead to unintended consequences such as higher consumer prices, lower productivity, job losses and, on a global scale, a brake on economic growth.

Other recently announced U.S. trade actions could also cloud the future for semiconductor companies. The Trump administration, based on two separate Section 232 investigations claiming that overproduction of both steel and aluminum are a threat to U.S. national security, recently levied a series of tariffs and quotas on every country except Canada and Mexico. While these tariffs have yet to take effect, the mere prospect has angered U.S. trading partners – most notably Korea, the European Union and China. Several countries have threatened retaliatory action and others have taken their case to the World Trade Organization.

Trade is oxygen to the semiconductor industry, which grew by nearly 30 percent last year and is expected to be valued at an estimated $1 trillion by 2030. Make no mistake: SEMI fully supports efforts to buttress intellectual property protections. However, the Trump administration’s unfolding trade policy could antagonize U.S. trade partners.

For its part, SEMI is weighing in with USTR on these issues, underscoring the critical importance of trade to the semiconductor industry as we educate policymakers on trade barriers to industry growth and encourage unobstructed cross-border commerce to advance semiconductors and the emerging technologies they enable. On behalf of our members, we continue our work to increase global market access and lessen the regulatory burden on global trade. If you are interested in more information on trade, or how to be involved in SEMI’s public policy program, please contact Jay Chittooran, Public Policy Manager, at [email protected].

Originally published on the SEMI blog.

SEMICON West, the flagship U.S. event for connecting the electronics manufacturing supply chain, has opened registration for the July 10-12, 2018, exposition at the Moscone Center in San Francisco, California. Building on a year of record-breaking industry growth, SEMICON West 2018 will highlight the engines of future industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

Themed BEYOND SMART, SEMICON West 2018 sets it sights on the growing impact of cognitive learning technologies and other industry disruptors with programs and new Smart Pavilions including Smart Manufacturing and Smart Transportation to showcase interactive technologies for immersive, virtual experiences. Each Pavilion will feature a Meet the Experts Theater with an intimate setting for attendees to engage informally with industry thought leaders.

Smart Workforce Pavilion: Connecting Next-Generation Talent with the Microelectronics Industry

The SEMI Smart Workforce Pavilion at SEMICON West 2018 leverages the largest microelectronic manufacturing event in North America to draw the next generation of innovators. Reliant on a highly skilled workforce, the industry today is saddled with thousands of job openings and fierce competition for workers, bringing renewed focus to strengthening its talent pipeline. Educational and engaging, the Pavilion connects the microelectronics industry with college students and entry-level professionals interested in career opportunities.

In the Workforce Pavilion “Meet the Experts” Theater, industry engineers will share insights and inspiration about their personal working experiences and career advisors will offer best practices. Recruiters from top companies will be available for on-the-spot interviews, while career coaches offer mentoring, tips on cover letter and resume writing, job-search guidance, and more. Visitors will learn more about the industry’s vital role in technological innovation in today’s connected world.

This year, SEMI will also host High Tech U (HTU) in conjunction with the SEMICON West Smart Workforce Pavilion. The highly-interactive program supported by Advantest, Edwards, KLA-Tencor and TEL exposes high school students to STEM education pathways and stimulates excitement about careers in the industry.

Free registration with three-day access and shuttle service to SEMICON West are available to all college students. Students are encouraged to register for the mentor program, attend keynotes and tour the exposition hall to see everything the industry has to offer.  To learn more, visit Smart Workforce Pavilion and College Track to preview how students can enter to win a $500 hiring bonus!

Three Ways to Experience the Expo

Attendees can tailor their SEMICON West experience to meet their specific interests. The All-In pass covers every program and event, while the Thought-Leadership and Expo-Only packages offer scaled pricing and program options. Attendees can also purchase select events and programs à la carte, including exclusive IEEE-sponsored sessions, the SEMI Market Symposium, and the STEM Rocks After-hours Party, a fundraising event to support the SEMI Foundation.