Category Archives: Wafer Level Packaging

October 31, 2011 — ON Semiconductor Corporation (Nasdaq:ONNN) believes that its SANYO Semiconductor division’s Thai operations in the Rojana Industrial Park in Ayutthaya, Thailand have been severely damaged by the flood. Another facility in Bang Pa In, previously unaffected, is now flooded. ONNN says none of its employees in Thailand have been endangered by flood waters on-site.

Operations at Rojana remain suspended, and ONNN has not been able to enter the 160000sq.ft. site, which employs 2000 people. The company believes it will be unable to re-start semiconductor probe, assembly and test operations at Rojana indefinitely. The flood damage is likely to exceed On Semi’s $50 million of potential insurance proceeds at Rojana.

Production is being moved to other facilities within and outside the global ON Semiconductor manufacturing network. Certain products will be sourced from alternative assembly and test locations beginning in Q4 2011, while more complex production transfers may take multiple quarters to be restored to full production capacity.

The newly flooded Bang Pa In location has had to suspend operations and evacuate. The ONNN equipment is located above the ground floor, but the company is not yet able to assess damage to the 8000sq.ft. location. 150 employees work here.

Rojana Industrial Park produced approximately 10-12% of ON Semiconductor

October 31, 2011 – PRNewswire — Flash memory provider Spansion Inc. (NYSE:CODE) will consolidate its 2 semiconductor assembly and test services (SATS) operations, closing its facility in Kuala Lumpur, Malaysia, to reduce costs by about $30 million annually.

John Kispert, Spansion president and CEO, referenced the "global economic challenges" in announcing the cost-cutting measure. Spansion emerged from bankruptcy in May 2010. TI took over a Spansion fab in Japan later that year.

Spansion released operating results for its third fiscal quarter ended September 25, 2011. On a U.S. GAAP basis, Spansion reported net sales of $258.2 million, operating income of $23.2 million, and net income of $7.3 million. On a non-GAAP basis, net sales totaled $258.2 million, adjusted operating income was $46.7 million and adjusted net income was $30.3 million. For the fourth quarter of 2011, Spansion estimates U.S. GAAP net sales in the range of $205 million to $225 million, GAAP net loss per share of ($1.12) to ($0.53).

Upon emergence from bankruptcy on May 10, 2010, Spansion adopted fresh start accounting in accordance with U.S. GAAP. The adoption of fresh start accounting resulted in Spansion becoming a new entity for financial reporting purposes, whereby the U.S. GAAP financial statements on or after May 10, 2010 are not comparable to the financial statements prior to that date. Fresh start accounting required resetting the historical net book values of Spansion’s assets and liabilities to the related fair values. References to "Successor" refer to Spansion and its consolidated subsidiaries after May 10, 2010, after giving effect to the cancellation of old common stock issued prior to May 10, 2010, the issuance of new common stock and settlement of existing debt and other adjustments in accordance with the reorganization plan, and the application of fresh start accounting. References to "Predecessor" refer to Spansion and its consolidated subsidiaries prior to May 10, 2010.

Spansion (NYSE: CODE) offers a broad Flash memory product portfolio. For more information, visit http://www.spansion.com.

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October 28, 2011 — Semiconductor test equipment maker Multitest debuted the Quad Tech concept, next-generation vertical contact technology with a barrel-less architecture.

The design has 4 continuously engaged internal contact points. Quad Tech features high current capabilities, high bandwidth and low inductance. A large mechanical compliance window accommodates stack height tolerances.

Probe life and cleaning intervals are improved by the design, which enables excellent plating, Multitest reports.

Currently, Multitest offers Mercury, Gemini, and Gemini Kelvin probes based on Quad Tech.

Multitest is a designer and manufacturer of final test handlers, contactors and load boards used by integrated device manufacturers (IDMs) and final test subcontractors worldwide. For more information about Multitest

October 28, 2011 – PRNewswire — Global Unichip Corp. (GUC; TW:3443) refined its business and technology model to become a full-service, flexible ASIC company. President Jim Lai refers to the model as GUC’s branded Flexible ASIC Model, covering SoC integration, implementation methodologies, and integrated manufacturing.

"Going forward, we will focus on penetrating specific segments inside the mobile, networking, computing, and consumer electronics markets where we are establishing design expertise and domain knowledge," Lai said.

Also read: Design your own ASIC

The company works with traditional ASIC designs and customized projects, providing 28nm and 40nm designs. Over the past few years, GUC has dedicated resources to developing advanced technology, low-power design expertise, a robust segment-specific IP portfolio and system-in-package (SiP) technology. Global Unichip Corp. can provide the integrated services of an IDM and a la carte services (IP licensing and customization, system-on-chip [SoC] design, physical implementation, design consultation and licensing, design for test [DFT]/design for manufacturing [DFM], package design, and supply chain management).

GUC is strongly aligned with TSMC as a foundry partner and has developed close relationship with packaging and testing companies. On the IP and tool side, GUC has strengthened its ARM hardening capabilities and has developed strong ties with Synopsys and Cadence.

GUC was ranked 14th largest ASIC company in 2010, with $327 million revenue, by the Gartner Group. GUC jumped 2 spots in the rankings from 2009.

GUC will continue to provide local ASIC, design, and business services through its global operations in China, Europe, Japan, Korea, North America, as well as from its headquarters in Taiwan. For more information, go to www.globalunichip.com.

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October 27, 2011 – Marketwire — Levi & Korsinsky is bringing a class action lawsuit against OmniVision Technologies Inc. (NASDAQ:OVTI) on behalf of stockholders that allege that OmniVision failed to disclose properly the loss of an exclusive contract with Apple for image sensors, in-house production delays, as well as other counts.

The complaint alleges that OmniVision and certain of its officers and directors misrepresented and/or failed to disclose that: (a) the Company had lost its exclusive contract with Apple Inc. ("Apple") regarding the supply of imaging sensors for the Apple iPhone; (b) delays in the development of its 8-megapixel product line threatened its financial prospects; (c) competition within the smartphone industry threatened the Company’s leadership position; (d) as a result of the aforementioned, defendants lacked a reasonable basis for their positive statements about the Company and its prospects.

Also read: Ziptronix accuses Omnivision, TSMC of patent infringement  and OmniVision brings wafer-level lens fab in-house, for $45 million

On August 25, 2011, OmniVision announced its results for the fiscal first quarter of 2012, provided guidance for the fiscal second quarter of 2012 that was well below analyst expectations and also disclosed delays in the production of its new 8-megapixel product line. The next day, OmniVision’s stock declined $7.55 per share, 30.4%, on heavy trading volume.

The case is brought in the United States District Court for the Northern District of California on behalf of purchasers of OmniVision Technologies Inc. common stock between August 27, 2010 and October 13, 2011. For more information, visit http://zlk.9nl.com/omnivision-technologies or contact Joseph E. Levi, Esq. at [email protected] or (877) 363-5972.

Levi & Korsinsky has expertise in prosecuting investor securities litigation and extensive experience in actions involving financial fraud and represents investors throughout the nation, concentrating its practice in securities and shareholder litigation. Internet: www.zlk.com.

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October 26, 2011 — North Dakota State University, Fargo, researchers have developed a packaging technology using Thermo-Mechanical Selective Laser Assisted Die Transfer (tmSLADT) to reduce the size and cost of microelectronics packages.

Laser-Enabled Advanced Packaging (LEAP) can be scaled to high volumes, and is a contactless assembly method for ultrathin semiconductor chips onto rigid and flexible substrates. NDSU researchers have successfully implemented LEAP to fabricate a functional electronic device on a flexible substrate.

Figure 1. Microelectronics packaging developed at North Dakota State University, Fargo. Laser-Enabled Advanced Packaging (LEAP) uses Thermo-Mechanical Selective Laser Assisted Die Transfer (tmSLADT).

The technology has been under development by the Advanced Electronics Packaging research group at the North Dakota State University Center for Nanoscale Science and Engineering (CNSE), Fargo, N. D., since 2008. The research group is led by Dr. Val Marinov, associate professor of manufacturing engineering; and includes Dr. Orven Swenson, associate professor of physics at NDSU; Ross Miller, research engineer apprentice; and CNSE research staff, graduate students and undergraduate research assistants.

The laser-assisted packaging process selectively and rapidly places ultra-thin (<50

October 21, 2011 — Imec engineers fabricated <1 picoliter sealed cavities directly on 200mm silicon wafers, using freestanding thin membranes of nanoporous anodic alumina (PAA). The thin-film vacuum wafer processing technology can package micro electro mechanical systems (MEMS) at the wafer level with strong, hermetic results.

Traditional thin-film wafer-level MEMS packaging techniques use lithography-defined release holes to remove the sacrificial layer and form the microcavity between the MEMS and the capping layer, potentially enabling sealing material to leak inside the cavity, onto the MEMS structures.

In Imec’s MEMS packaging method, nanopores serve as release etch holes. The cap layer with nanopores is a freestanding PAA membrane around 2-3µm thick. The cylindrical nanopores boast a 15-20nm diameter, creating an aspect ratio of >100. The high aspect ratio lets these holes close very rapidly during the first stage of sealing.

Figure. Scanning electron microscopy (SEM) images of empty PAA-based thin-film packages, together with cross-section schematics (a-e) showing the process steps.

First, a 3µm chemical vapor deposition (CVD) oxide sacrificial layer is deposited, patterned to obtain anchors and supporting pillars for the package. Next, a 1-1.5µm aluminium layer is sputtered. This layer is anodized, using a mask to define the microcavity areas. PAA membranes are typically 50% thicker than the original aluminium layer. Next, the sacrificial oxide layer under the membranes is etched away by exposing the wafer to HF vapour. Finally, the packages are sealed using a 4µm plasma-enhanced CVD (PECVD) silicon nitride layer.

Imec aimed to perform thin-film wafer-level MEMS packaging with reduced complexity. The wafer-level packaging (WLP) process takes place at low temperatures. It is reportedly simple, non-organic, and RF-compatible (the packages have a negligible impact on RF transmission for signal frequencies up to 67GHz). The dielectric caps are optically transparent, suiting optical MEMS applications.

Imec performs world-leading research in nanoelectronics. Further information on imec can be found at www.imec.be. Also read: Imec: First poly-SiGe MEMS on Cu-backend CMOS

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October 19, 2011 – PRNewswire-Asia — NEXX Systems shipped a Stratus electrochemical deposition tool to Nantong Fujitsu Microelectronics Co. Ltd. (NFME), based in Jiangsu province, China. NFME will use the Stratus for copper pillar and re-distributed layer (RDL) advanced packaging applications.

The Stratus is a fully automated electrochemical deposition system that deposits thick metal layers. Wafers are processed in a vertical orientation for higher quality results and higher-throughput concurrent processing.

The Nexx tool will help NFME "keep pace with [its] aggressive roadmap," said NFME’s president, member of board, Mr. Shilei, adding that the tool will be used to package diverse chips for international customers. NEXX CEO Tom Walsh noted that the Stratus deposition system is well suited to packaging consumer mobile ICs.

The sale into China is a milestone in NEXX’s infrastructure and staff expansion in the region, where NEXX added a Shanghai office. NEXX sees China’s semiconductor packaging industry shifting to leading-edge packaging technologies, citing Prismark Partners’ Brandon Prior, who notes that China is becoming "a key region" for advanced packaging such as wafer-level technologies (WLCSP, FOWLP), through silicon vias (TSV), and copper pillar bumps.

NFME is a technology and market leader that focuses on testing and assembling semiconductors for more than half of the top semiconductor manufacturers. Learn more at http://www.fujitsu-nt.com/en/

NEXX provides the global semiconductor industry with productive, flexible and efficient deposition technology for advanced packaging applications. Learn more at http://www.nexxsystems.com/

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October 17, 2011 — In its iPhone 4S teardown, IHS (NYSE:IHS) found "key changes" in the iPhone components. Jim Morrison, product manager at Chipworks, called the iPhone 4S "something of a hybrid" of the iPhone 4 and iPad 2, in his teardown analysis.

Notably, the iPhone 4S uses a 5-lens camera module, which is a first encountered in a smartphone during a IHS iSuppli Teardown Analysis. The 4S camera module is an autofocus device with an 8-megapixel (MP) resolution, compared to 5MP in the iPhone 4 models. Like the iPhone 4, the 4S employs backside illumination (BSI) technology.

Attend the free, on-demand webcast: Lens Tilt in Small Auto-Focus Cameras from DigitalOptics Corporation, a wholly owned subsidiary of Tessera Technologies.

The apps processor is the same dual-core A5 seen in the iPad 2, says IHS, likely along with the same SDRAM memory configuration at 4 Gigabits (Gb). Low memory density is evidence of Apple’s software + hardware efficiency approach to device design, IHS points out. Chipworks is investigating if the A5 is still made by Samsung, or if it has moved to TSMC for 40nm low-power production.

Chipworks is posting de-capsulated die-level images of the iPhone 4S components at http://www.chipworks.com/en/technical-competitive-analysis/resources/recent-teardowns.

A cellular radio makes the iPhone 4S a "true world phone," said Wayne Lam, senior analyst at IHS. iPhone 4S merges the HSPA and CDMA radio capabilities found separately in the two previous iPhone 4 models into a single product that can address global wireless networks. No other handset OEM produces a single device for multiple operators and for multiple geographies on this scale, making the phone operational with AT&T, Verizon, and Sprint carriers. Changes to the radio design include the use of an updated Qualcomm baseband processor, the MDM6610.

The baseband processor is now discrete, no longer integrated with the RF transceiver (which is a dual-mode Qualcomm RTR8605). The IHS iSuppli Teardown Analysis Service has seen this RF set-up in other handset designs, such as the Hewlett-Packard Veer and HTC Thunderbolt.

The 4S also likely makes use of three different power amplifier module (PAM) module suppliers: Avago, Skyworks and TriQuint, a jump from the iPhone 4 CDMA version where only Avago appeared. Both Skyworks and TriQuint were featured in the HSPA/GSM version of the iPhone.

See IHS’s table of iPhone 4S components here.

IHS iSuppli soon will reveal the results of its full physical teardown that will provide actual data on iPhone 4S components and features. IHS (NYSE: IHS) provides research and analysis on energy and power; design and supply chain; defense, risk and security; environmental, health and safety (EHS) and sustainability; country and industry forecasting; and commodities, pricing and cost. Learn more at www.ihs.com.

Chipworks provides reverse engineering and patent infringement analysis of semiconductors and electronic systems. Learn more at www.chipworks.com, or read Chipworks Real Chips by blogger Dick James.

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