Category Archives: Wafer Level Packaging

August 15, 2011 – BUSINESS WIRE — Tessera Technologies Inc. (Nasdaq:TSRA) appointed Anthony J. Tether, Ph.D., to its board of directors. Tether is CEO of The Sequoia Group (TSG), which provides program management and strategy development consulting.

Tether is a former director of the Defense Advanced Research Projects Agency (DARPA), the US Department of Defense’s principal agency for R&D and demonstration of advanced new technologies. Tether was DARPA’s Director from 2001 to 2009, managing development of more than $20 billion of projects in new semiconductor devices and computer architectures, as well as system-level technologies. He had almost 10 years experience within the DoD in the 1970s and 80s.

Tether has served on US Army, Navy and Defense Science boards, and on the Office of National Drug Control Policy Research and Development Committee. He has been honored with three medals from the U.S. Central Intelligence and Defense departments, and is a distinguished fellow with the Council on Competitiveness in Washington D.C.

Tether, who founded TSG, also served in executive roles at Dynamics Technology Inc. (CEO); Science Applications International Corporation’s Advanced Technology Sector (VP and GM); and Ford Aerospace Corp.’s Technology and Advanced Development division (VP).

Tether sits on the board of directors and has seats on the technical advisory boards of several private companies.

Robert A. Young, CEO and president, Tessera Technologies Inc., praises Tether’s "more than 40 years of industrial and government experience" and "expansive contact network."

Tether holds a Ph.D. and M.S. in Electrical Engineering from Stanford University, and a Bachelors in Electrical Engineering from Rensselaer Polytechnic Institute in Troy, N.Y.

Tessera Technologies Inc. develops innovative miniaturization technologies and products for wireless and computing products. For information, go to www.tessera.com. 

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August 12, 2011 — SEMI will hold the first-ever SiP Global Summit, September 7-9, co-located with SEMICON Taiwan. Three forums cover system in package (SiP) test, the "3D IC era," and the requirements of mobile electronics.

Participants will include ASE, Qualcomm, Sony, TSMC, Verigy; and R&D and market research organizations including Gartner, Fraunhofer IZM, IMEC, Yole Development and ITRI.  

SEMI cites mobile electronics — smartphones, e-book readers, etc. — as a major driver for SiP heterogeneous architectures. An ITRI recent forecast indicates that production value of 3D-ICs for mobile phone applications will hit $3.65 billion by 2015.

Three major forums comprise the first SiP Global Summit: 3D-IC Test Forum, 3D-IC Technology Forum and Embedded Substrate Forum. Representatives from 25 firms will speak on 3D-IC, TSV, silicon interposer and embedded substrate technologies.

The test section — 3D-IC Test Forum: Finding Heterogeneous Integration Solutions — will outline package test challenges that inhibit yields. Executives from ASE, KYEC, and Qualcomm will discuss 3D TSV challenges and cost strategy from the operators’ perspective. FormFactor and Teradyne executives will discuss how equipment makers attack the challenges facing test operators.

3D-IC Technology Forum: Ringing in the 2.5D- and 3D-IC Era will cover the transition from 2D form factors into the Z space. How will packaging houses balance performance optimization, time-to-market expedition and cost reduction? Speakers will discuss different materials, equipment, process nodes, and product standardization and commercialization methods. Organized by IMEC and SEMI, this forum gathers presentations by ASE, IEEE-CPMT, IMEC and Xilinx.

The Embedded Substrate Forum: Last Mile to a Heterogeneous Integration forum will feature R&D staffers from Nokia, who will discuss the differences between packaging substrates, module substrates and motherboards with an eye on mobile technologies. TechSearch International will also share information on the embedded substrate developmental trend.

Free registration for the event is available at www.sipglobalsummit.org

"Cost control, design, mass production, and testing" need improvements as commercialization ramps up, noted Dr. Ho-Ming Tong, general manager and chief R&D officer of ASE. Deployment of silicon interposer, or 2.5D IC,  technology is expediting migration from the 40 to 28nm node. "Commercialization of 2.5D- and 3D-ICs may take place in 2013," says Tong.

SEMICON Taiwan, held simultaneously with the SiP Global Summit, will feature the Advanced Packaging/Testing Gallery sponsored by ASE and KYEC, showcasing cutting-edge testing/packaging technologies and applications. Learn more at http://www.semicontaiwan.org/en/

SEMI is a global industry association serving the manufacturing supply chains for the microelectronic, display and photovoltaic industries. For more information, visit www.semi.org.

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August 11, 2011 – BUSINESS WIRE — Nordson MARCH, plasma processing technology provider, and Science College of Donghua University, Shanghai, China launched a joint laboratory for plasma research and education: Nordson MARCH-Science College of Donghua University Joint Laboratory. The college and supplier will share equipment, research projects, personnel resources, and additional resources as needed.

Nordson MARCH specializes in advanced plasma processes and equipment for semiconductor packaging, printed circuit board, and other manufacturing industries. Science College of Donghua supports plasma physics and applications studies, with a Master’s degree program in Physics and Optical Engineering.

Professors and graduate students from the college will work with Dr. James Getty, VP, applications and business development and Dr. Jiangang (Jack) Zhao, chief scientist of Nordson MARCH, who have been named adjunct professors.

Nordson MARCH contributed an AP-600 Plasma Treatment System to the lab, which also boasts an electron microscope, surface energy tester, and mass spectrometer contributed by the school.

Donghua University is a public university in Shanghai, China administered by the Chinese Ministry of Education and the Shanghai municipality.

Nordson MARCH provides plasma processing technology for the semiconductor, printed circuit board (PCB), microelectronics, and medical & life science device manufacturing industries. Visit the Nordson MARCH website for more details: http://www.nordsonmarch.com.

Nordson Corporation is a diverse producer of precision dispensing equipment, equipment used in the testing and inspection of electronic components, technology-based systems for UV curing, and surface treatment equipment. Visit Nordson on the web at www.nordson.com.

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August 10, 2011 – Ron Huemoeller, SVP of advanced 3D interconnects at Amkor, participated in two panels at SEMICON West 2011: 2.5D silicon interposer packaging technologies and supply chain, and 3D packaging technology and the ecosystem. He shared his thoughts on the panel topics during a video interview at the show.

Among the issues Huemoeller sought to emphasize via the 2.5D panel is the importance of silicon interposers, the timeline with respect to their integration, and the assembly and supply constraint challenges. With respect to the latter, he said the industry is suffering from a lack of supply on the part of interposers, which could negatively impact the industry with respect to product timing and the release of products. Furthermore, there are hand-off issues that take place from the interposer side to assemblers (e.g., chip/package interactions).

In going from 2.5D to 3D packaging technology, Huemoeller explained that the industry needs to have the right design tools in place, i.e., EDA tool sets and the software. Still another challenge is the thermal issues that emerge when stacking die. "The 3D sector has not addressed these thermal issues," he said, whereas, "the 2.5D sector has addressed these nicely." A second problem is how cost will affect the dovetailing of products into one to meet customer timing requirements. He anticipates that 2.5D technology will remain in play for a long period of time. 3D technology should start to come into play with the smart phone sector, followed by larger die sector/higher power applications in the latter part of this decade. "[3D] probably won’t be fully adopted until 2019/2010, primarily because of the software issues," he said.

August 10, 2011 — The University of Waterloo, Ontario, Canada, through the Applied Research and Commercialization Initiative, is supporting several companies researching and developing new products. One company receiving aid from the school is Microbonds, maker of semiconductor bonding wire.

Last year, under the Applied Research and Commercialization Initiative, the University of Waterloo was approved for up to $750,000 from FedDev Ontario to partner with small- and medium-sized businesses on activities such as applied research, engineering design, technology development, product testing, and certification.

Microbonds is researching, developing and applying insulated bonding wire technology for semiconductor packaging and microchip industries. The University of Waterloo will help Microbonds commercialize low processing temperatures for semiconductor package wire bonds.

Microbond’s past partnerships to develop the insulated wire bonding technology have taken place with Promex Industries Inc., Cookson, March Plasma Systems, and SPT.

Local small- and medium-sized enterprises contribute to the Waterloo Region and Canada’s national economy, said Feridun Hamdullahpur, President, University of Waterloo. "This funding will assist us in our research and development partnerships, which are aimed at improving the performances of these highly innovative companies."

The initiative will also fund work at Clearpath Robotics, Integran Technologies Inc., Teledyne DALSA, Tyco Electronics Canada ULC, and others.

FedDev Ontario was created as part of Canada’s Economic Action Plan to support businesses and communities in southern Ontario. Now in its second year of operation, the Agency has launched a number of initiatives to create a Southern Ontario Advantage and place the region in a strong position to compete in the global economy. These initiatives are designed to support businesses and other organizations through partnerships and investments in skills and training; innovation; research and development; and increased productivity. To learn more, please visit www.feddevontario.gc.ca

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August 10, 2011 — Multitest, semiconductor test equipment maker, launched a 16-site tri-temp pick-and-place handler, the MT9510 x16.

The 16-site handler operates from -55

August 9, 2011 – Amkor has extended its Quad Flat No-Lead (QFN) package design kit to be the first such kit available for Agilent Technologies’ Advanced Design System (ADS) electronic design automation software.

Based on Amkor’s MicroLeadFrame (MLF) packages, the package design kit enables mutual Amkor and Agilent customers to significantly improve their RFIC/MMIC design quality and time-to-market. Designers can quickly explore various design specifications with accurate package information and implement optimized RFIC/MMIC designs, providing a greater range of choices and more flexibility when designing QFN packages.

The Amkor package design kit contains models for 3×3, 4×4, 5×5, and 6×6 MLF QFNs. All die are scalable, and their material properties can easily be modified. The Amkor package design kit also includes scalable models for bond pad arrays and board via arrays. The Amkor package design kit was developed for use with ADS 2009 Update 1 and ADS 2011.01.

"Our customers are looking for easy ways to accurately characterize vendor-supplied packages, both alone and with ICs and laminates mounted," said Todd Cutler, planning and marketing senior manager with Agilent’s EEsof EDA organization, in a statement.

"As Agilent is the RF and microwave CAD leader and many of our customers already use ADS for circuit design and characterization, we are excited to offer this first ever package design kit to our mutual customers," added ChoonHeung Lee, Amkor Technology Korea’s corporate VP and CTO.

Customers can request the QFN Package Design Kit from the Amkor website.

August 8, 2011 – Prices for gold have been climbing to near record levels, now at $1700/oz, closing in on the 1980s’ inflation-adjusted peak, and spiking again now thanks to the US credit rating downgrade. And that’s putting more juice behind industry efforts to transition from gold to copper wire for fine-wire applications, notes TechSearch International in a new report.

The new survey sought to determine how much of the market is copper, what the split is between bare and palladium-coated copper (PCC), and how fast the two wire types are growing. Also the company investigated the percentage of PBGA, FBGA (laminate CSP), QFN (leadframe CSP), and stacked-die CSP packages that shipped worldwide with copper wire in 2010, and estimate those numbers for 2011 and 2015. Numbers for 2010 were compiled using package shipments and the percentage of each that used copper for each company. For assemblers, leadframe packages (specifically QFPs) were implemented in copper wire first, with PBGAs starting later.

For many companies, TechSearch determined, 2010 was the first year that copper was implemented in volume production. But the ramp is significant — some companies are forecasting that 30%-50% of all packages will ship with copper wire by the end of 2011, and TechSearch says copper wire shipments will double in 2011.

The full Advanced Packaging Update report also includes an economic update for the semiconductor packaging industry, new developments in QFN packages, and a synopsis of challenges associated with testing wafers with through-silicon vias (TSVs).

August 6, 2011 — Nomura Principal Finance Co. Ltd., a wholly owned subsidiary of Nomura Holdings Inc., transferred all the shares it owns in Eastern Co. Ltd. to Eastern. The sale is in accordance with a resolution of the shareholders’ meeting of Eastern held on June 29, 2011, regarding its share repurchase plan.

Established in 1961, Eastern manufactures and sells semiconductor packaging substrates and electronic equipment such as power supply units.

With production bases in Japan and China, Eastern had capital of 3,500 million yen and employed 1,217 people as of the end of March 2011.

Nomura is a leading financial services group and the Asia-based investment bank with global reach. For further information about Nomura, please visit www.nomura.com. 

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August 4, 2011 — Light emitting diodes (LEDs), silicon germanium (SiGe) semiconductors, and wafer-level packaging (WLP) bumps each present their own challenges to metrology systems, says Alon Kapel, Jordan Valley Semiconductor. He speaks with Debra Vogler at SEMICON West 2011.


LEDs are growing very fast, and the metal-organic MOCVD tool is the heart of the process, says Kapel. For about every 10 MOCVD tools, users need 1 metrology tool. Every MOCVD batch takes 12 hours, so measurement needs to be very fast, allowing the next substrate to begin processing.

Other areas where metrology is helping advance semiconductor technology include the move to triple-layer SiGe on the front-end, and wafer-level packaging on the back-end. Metrology tools must keep up with the pace of production and still offer the highest level of accuracy possible. (Last year Jordan Valley debuted the JVX7200 HRXRD/XRR for in-line SiGe process monitoring.) In wafer-level packaging, silver/tin bumps must be measured on-wafer and on-line.

Jordan Valley is collaborating on 450mm projects and participates in consortia, but Kapel noted that 450mm is a burden on vendors and the question still being asked is, "where