Category Archives: Wafer Processing

On the heels of a 37.3% growth in wafer front end (WFE) semiconductor equipment growth in 2017, the market will grow only 10% in 2018 to $62.3 billion, according to the report “The Global Semiconductor Equipment: Markets, Market Shares, Market Forecasts,” recently published by The Information Network, (www.theinformationnet.com) a New Tripoli, PA-based market research company.

For the first six months of 2018, WFE billings were $35.3 billion, meaning billings of $27.0 billion will be registered in the second half of 2018 if the sector as a whole grows 10% in CY 2018.

This means a drop of 24% between 1H 2018 and 2H 2018.

The chart below shows that U.S. equipment companies held a 48.8% share of the total sector in 1H 2018 followed by Japan with a 30.3% share and ROW (primarily Europe) with a 26.9% share. For 2H 2018, the weak Japanese Yen means Japan will have a 29.1% share, but stronger EUV sales by ASML will mean Europe’s share will grow to 28.0%.

The memory market is moving into a period of oversupply: NAND oversupply started six months ago and has resulted in device price drops, while DRAMs will reach an oversupply situation in the next few months. As a result, market leader Samsung Electronics has pushed out purchases. Foundry leader TSMC has reduced its estimate for sales revenue growth in 2018 and its capital expenditure budget.

Synopsys, Inc. (Nasdaq: SNPS) today announced a collaboration with IBM to apply design technology co-optimization (DTCO) to the pathfinding of new semiconductor process technologies for the 3-nanometer (nm) process node and beyond. DTCO is a methodology for efficiently evaluating and down-selecting new transistor architectures, materials and other process technology innovations using design metrics, starting with an early pathfinding phase before wafers become available. The collaboration will extend the current Synopsys DTCO tool flow to new transistor architectures and other technology options while enabling IBM to develop early process design kits (PDKs) for its partners to assess the power, performance, area, and cost (PPAC) benefits at IBM’s advanced nodes.

“Process technology development beyond 7 nanometers requires the exploration of new materials and transistor architectures to achieve optimum manufacturability, power, performance, area, and cost. A major challenge for foundries is to converge on the best architecture in a timely manner while vetting all the possible options,” said Dr. Mukesh Khare, vice president of Semiconductor Research, IBM Research Lab. “Our DTCO collaboration with Synopsys allows us to efficiently select the best transistor architecture and process options based on metrics derived from typical building blocks, such as CPU cores, thus contributing to faster process development at reduced cost.”

In this collaboration, IBM and Synopsys are developing and validating new patterning techniques with Proteus™ mask synthesis, modeling new materials with QuantumATK, optimizing new transistor architectures with Sentaurus™ TCAD and Process Explorer, and extracting compact models with Mystic. Design rules and process assumptions derived from these process innovations are used to design and characterize a standard cell library while Fusion Technology™ at the block level using the Synopsys physical implementation flow based on IC Compiler™ II place-and-route, StarRC™ extraction, SiliconSmart® characterization, PrimeTime® signoff, and IC Validator physical verification benefits the evaluation of PPAC.

The scope of the joint development agreement covers multiple facets, including:

  • DTCO to optimize transistor- and cell-level design across routability, power, timing, and area
  • Evaluate and optimize new transistor architectures, including gate-all-around nanowire and nanoslab devices, with process and device simulation
  • Optimize variation-aware models for SPICE simulation, parasitic extraction (PEX), library characterization, and static timing analysis (STA) to accurately encapsulate the effects of variation on timing and power for highest-reliability design with least over-design and design flow runtime overhead
  • Gather gate-level design metrics to refine the models, library architecture, and design flows to maximize PPAC benefits

“Synopsys has developed the only complete DTCO solution, from materials exploration to block-level physical implementation,” said Dr. Antun Domic, chief technology officer at Synopsys. “IBM’s extensive process development and design know-how makes them an ideal partner for extending our DTCO solution to 3 nanometers and beyond.”

Cabot Microelectronics Corporation (Nasdaq: CCMP), a supplier of chemical mechanical planarization (CMP) polishing slurries and second largest CMP pads supplier to the semiconductor industry, and KMG Chemicals, Inc. (NYSE: KMG), a global provider of specialty chemicals and performance materials, have entered into a definitive agreement under which Cabot Microelectronics will acquire KMG in a cash and stock transaction with a total enterprise value of approximately $1.6 billion. Under the terms of the agreement, KMG shareholders will be entitled to receive, per KMG share, $55.65 in cash and 0.2000 of a share of Cabot Microelectronics common stock, which represents an implied per share value of $79.50 based on the volume weighted average closing price of Cabot Microelectronics common stock over the 20-day trading period ended on August 13, 2018.  The transaction has been unanimously approved by the Boards of Directors of both companies and is expected to close near the end of calendar year 2018.

The combined company is expected to have annual revenues of approximately $1 billion and approximately $320 million in EBITDA, including synergies, extending and strengthening Cabot Microelectronics’ position as one of the leading suppliers of consumable materials to the semiconductor industry.  Additionally, the combined company will be a leading global provider of performance products and services for improving pipeline operations and optimizing throughput.

“We are excited about the combination of two world-class organizations with dedicated and talented employees that provide innovative, high quality solutions to solve our customers’ most demanding challenges,” said David Li, President and CEO of Cabot Microelectronics. “KMG’s industry-leading electronic materials business is highly complementary to our CMP product portfolio, while its performance materials business broadens our product offerings into the fast-growing industry for pipeline performance products and services.  We welcome KMG’s employees to our team and look forward to our future together as one company.”

Chris Fraser, KMG Chairman and CEO, said, “This is an outstanding combination, bringing together two leading companies that will benefit from increased size, scale and geographic reach. For KMG shareholders, this transaction creates significant and immediate value while also providing participation in the future growth of the combined company.  Thanks to the dedication and hard work of KMG employees around the world, KMG has achieved significant progress over the past several years, and I am confident that Cabot Microelectronics will continue to build on this success to further enhance value for our shareholders.”

SEMI today announced that all legal requirements have been met for the ESD (Electronic Systems Design) Alliance to become a SEMI Strategic Association Partner.

Full integration of the Redwood City, California-based association representing the semiconductor design ecosystem is expected to be complete by the end of 2018. The integration will extend ESD Alliance’s global reach in the electronics manufacturing supply chain and strengthen engagement and collaboration between the semiconductor design and manufacturing communities worldwide.

As a SEMI Strategic Association Partner, the ESD Alliance will retain its own governance and continue its mission to represent and support companies in the semiconductor design ecosystem.

The ESD Alliance will lead its strategic goals and objectives as part of SEMI, leveraging SEMI’s robust global resources including seven regional offices, expositions and conferences, technology communities and activities in areas such as advocacy, international standards, environment, health and safety (EH&S) and market statistics.

With the integration, SEMI adds the design segment to its electronics manufacturing supply chain scope, connecting the full ecosystem. The integration is a key step in streamlining SEMI members’ collaboration and connection with the electronic system design, IP and fabless communities. The Strategic Association Partnership will also enhance collaboration and innovation across the collective SEMI membership as ESD Alliance members bring key capabilities to SEMI’s vertical application platforms such as Smart Transportation, Smart Manufacturing and Smart Data as well as applications including AI and Machine Learning.

“The addition of ESD Alliance as a SEMI Strategic Association Partner is a milestone in our mission to drive new efficiencies across the full global electronics design and manufacturing supply chain for greater collaboration and innovation,” said Ajit Manocha, president and CEO of SEMI. “This partnership provides opportunities for all SEMI members for accelerated growth and new business opportunities in end-market applications. We welcome ESD Alliance members to the SEMI family.”

“Our members are excited about becoming part of SEMI’s broad community that spans the electronics manufacturing supply chain,” said Bob Smith, executive director of the ESD Alliance. “Global collaboration between design and manufacturing is a requirement for success with today’s complex electronic products. Our new role at SEMI will help develop and strengthen the connections between the design and manufacturing communities.”

All ESD Alliance member companies, including global leaders ARM, Cadence, Mentor, a Siemens business, and Synopsys, will join SEMI’s global membership of more than 2,000 companies while retaining ESD Alliance’s distinct self-governed community within SEMI.

The demise of Qualcomm’s pending $44 billion purchase of NXP Semiconductors in late July along with growing regulatory reviews of chip merger agreements, efforts by countries to protect domestic technology, and the escalation of global trade friction all suggest semiconductor acquisitions are hitting a ceiling in the size of doable deals.  It is becoming less likely that semiconductor acquisitions over $40 billion can be completed or even attempted in the current geopolitical environment and brewing battles over global trade.

IC Insights believes a combination of factors—including the growing high dollar value of major chip merger agreements, complexities in combining large businesses together, and greater scrutiny of governments protecting their domestic base of suppliers—will stifle ever-larger mega-transactions in the semiconductor industry in the foreseeable future.  Figure 1 ranks the 10 largest semiconductor merger and acquisition announcements and underscores the growth in size of these M&A transactions.  Eight of the 10 largest announcements occurred in the last three years with only the biggest deal (Qualcomm buying NXP) failing to be completed.

Figure 1

It is important to note that IC Insights’ M&A list only covers semiconductor suppliers, chipmakers, and providers of integrated circuit intellectual property (IP) and excludes acquisitions of software and system-level businesses by IC companies  (such as Intel’s $15.3 billion purchase of Mobileye, an Israeli-based developer of digital imaging technology for autonomous vehicles, in August 2017).  This M&A list also excludes transactions involving semiconductor capital equipment suppliers, material producers, chip packaging and testing companies, and design automation software firms.

Qualcomm’s $44 billion cash purchase of NXP would have been the largest semiconductor acquisition ever if it was completed, but the deal—originally announced in October 2016 at nearly $39 billion and raised to $44 billion in February 2018—was canceled in the last week of July because China had not cleared the transaction.  China was the last country needed for an approval of the merger, and it was believed to be close to clearing the purchase in 2Q18, but growing threats of tariffs in a brewing trade war with the U.S. and moves to block Chinese acquisitions of American IC companies caused China to taken no action on the $44 billion acquisition in time for a deadline set by Qualcomm and NXP.  U.S.-based Qualcomm canceled the acquisition on July 26 and quickly paid NXP in the Netherlands a $2 billion breakup fee so the two companies could move on separately.

Prior to Qualcomm’s failed $44 billion offer for NXP, the largest semiconductor acquisition was Avago Technologies’ $37 billion cash and stock purchase of Broadcom in early 2016.  Avago renamed itself Broadcom Limited after the purchase and launched a failed $121 billion hostile takeover bid for Qualcomm at the end of 2017.  It lowered the unsolicited bid to $117 billion in February 2018 after Qualcomm raised its offer for NXP to $44 billion.  In March 2018, U.S. President Donald Trump blocked Broadcom’s $117 billion takeover bid for Qualcomm after concerns were raised in the U.S. government about the potential loss of cellular technology leadership to Chinese companies, if the hostile acquisition was completed. After the presidential order, Broadcom executives said the company was considering other acquisition targets, with cash, that would be smaller and more focused.

The global semiconductor industry has been reshaped by a historic wave of mergers and acquisitions during the past three years, with about 100 M&A agreements being reached between 2015 and the middle of 2018 with the combined value of these transactions being more than $245 billion, based on data collected by IC Insights and contained within its Strategic Reviews database subscription service and in The 2018 McClean Report on the IC Industry.  A record-high $107.3 billion in semiconductor acquisition agreements were announced in 2015.  The second highest total for semiconductor M&A agreements was then reached in 2016 at $99.8 billion.   Semiconductor acquisition announcements reached a total value of $28.3 billion in 2017, which was twice the industry’s annual average of about $12.6 billion in the first half of this decade but significantly less than 2015 and 2016, when M&A was sweeping through the chip industry at historic levels.  In the first six months of 2018, semiconductor acquisition announcements had a total value of about $9.6 billion, based on IC Insights’ running tally of announced M&A deals.

By Walt Custer

2Q’18 Electronic Supply Chain Growth Update

  • Chart 1 is a preliminary estimate of global growth of the electronic supply chain by sector for 2Q’18 vs 2Q’17. Note the strong performance of semiconductors, SEMI capital equipment and passive components.
  • Chart 2 gives preliminary 2Q’18 world electronic equipment growth by type. Global electronic equipment sales rose an estimated 9%+ when consolidated into US dollars in the second quarter of this year compared to the same quarter in 2017.
  • Based on this, data global electronic equipment sales growth appears to have now peaked on a 3/12 growth basis for this present business cycle (Chart 3).

As a caution these charts are based on a combination of actual company financial reports and estimates for companies that have not yet reported their calendar second quarter financial results. A number of large companies have yet to report but these early estimates have historically been close to final growth values.  We will update Chart 1 next month.

Semiconductor Capital Equipment Business Cycle

  • Semiconductor capital equipment sales are historically very volatile, with their growth fluctuating MUCH MORE than electronic equipment (Chart 4). However, both series appear to have peaked on a 3/12 basis for this current cycle.

  • Semiconductors, SEMI capital equipment and Taiwan chip foundry sales all are seeing slower growth. 3/12 values >1 still indicate an expansion but slower growth is indicated.

Supply chain performance in the second half of this year bears careful watching!

Walt Custer of Custer Consulting Group is an analyst focused on the global electronics industry.

Originally published on the SEMI blog.

Pioneering engineers working with terahertz frequency technology have been researching how individual frequencies are selected when a laser is turned on, and how quickly the selection is made.

The development of specific terahertz equipment has allowed them to investigate this process for the first time. Their results, published in Nature Communications, will underpin the future development of semiconductor lasers, including those used in public and private sector-owned telecommunications systems.

For many years, it has been predicted that operating frequencies within semiconductor lasers stabilise on a timescale of a few nanoseconds (ie a few billionths of a second) and can be changed within a few hundreds of picoseconds (ie thousandths of a nanosecond).

Until now, though, no detector has been capable of measuring and proving this precisely, and the best results have only been achieved on nanosecond timescales, which are too slow to allow really efficient analysis or to be used to develop the most effective new systems.

The University of Leeds researchers, working with international colleagues at École Normal Supérieure in Paris, France and the University of Queensland in Brisbane, Australia have now used terahertz frequency quantum cascade lasers and a technique called terahertz time-domain spectroscopy to understand this laser stabilisation process.

The terahertz-powered technology can measure the wavelength of light in periods of femtoseconds (ie millionths of a nanosecond) giving unprecedented levels of detail. By knowing the speed at which wavelengths change within lasers, and what happens during that process within miniscule time frames, more efficient devices and systems can be built.

The Leeds elements of the study were carried out in the University’s Terahertz Photonics Laboratory, part of the University’s Bragg Centre for Materials Research.

Dr Iman Kundu, principal author of the research paper explaining the group’s findings, said: “We’ve exploited the ultrafast detection capabilities of terahertz technology to watch laser emissions evolve from multiple colours to a single wavelength over less than a billionth of a second.

“Now that we can see the detailed emission of the lasers over such incredibly small time frames, we can see how the wavelength of light changes as one moves from one steady state to a new steady state.

“The benefits for commercial systems designers are potentially significant. Terahertz technology isn’t available to many sectors, but we believe its value lies in being able to highlight trends and explain the detailed operation of integrated photonic devices, which are used in complex imaging systems which might be found in the pharmaceutical or electronics sectors.

“Designers can then apply these findings to lasers operating at different parts of the electromagnetic spectrum, as the underlying physics will be very similar.”

Professor Edmund Linfield, Chair of Terahertz Electronics at the University of Leeds, who was also involved in the study said: “We’re using the highly advanced capabilities of terahertz technology to shine a light on the operation of lasers.

“Our research is aimed at showing engineers and developers where to look to drive increased performance in their own systems. By doing this, we will increase the global competitiveness of the UK’s science and engineering base.”

CyberOptics® Corporation (NASDAQ: CYBE), a global developer and manufacturer of high precision 3D sensing technology solutions, announces it will demonstrate its next generation Airborne Particle Sensor™ technology (APS3) 300mm with new ParticleSpectrum™ software at SEMICON Taiwan, September 5-7 at the Nangang Exhibition Center in Taipei in booth #L312.

CyberOptics’ WaferSense® APS3 speeds equipment set-up and long-term yields in semiconductor fabs by wirelessly detecting, identifying and monitoring airborne particles. Now in a thinner and lighter form factor to travel through semiconductor tools with ease, the APS3 offers leading accuracy and sensitivity valued by equipment and process engineers.

“Semiconductor fabs worldwide have adopted our Airborne Particle Sensors,” said Dr. Subodh Kulkarni, President and CEO, CyberOptics. “We have further advanced the technology that they rely on to significantly improve their yields and tool uptime.”

The APS3 solution incorporates ParticleSpectrum software – a completely new, touch-enabled interface with user-friendly functionality, making it simple to read, record and review small to large airborne particle data and see the effects of cleanings, adjustments and repairs in real-time.

At SEMICON Taiwan, CyberOptics will also demonstrate the proprietary 3D Ultra High-Resolution Multi-Reflection Suppression (MRS) Sensor technology that meticulously identifies and rejects reflections caused by shiny components and surfaces. Effective suppression of multiple reflections is critical for highly accurate measurements. Offering an unmatched combination of accuracy and speed, MRS sensors are widely used for inspection and measurement in the SMT, metrology and in semiconductor markets. This best in class, ultra high-resolution technology used in back-end inspection applications, is ideally suited for IC package, wafer bump inspection and mid-end semiconductor applications where the highest degree of precision is required.

Rudolph Technologies, Inc. announces the appointment of David B. Miller to the role of Chairman of the Board of Directors with an effective date of August 5, 2018. Mr. Miller’s appointment is subsequent to the Company’s receipt of Thomas G. Greig’s resignation from the position.

“I am grateful for and enjoyed the opportunity to have served as Lead Director and Chairman of the Rudolph Board of Directors,” said Tom Greig. “Dave Miller brings the right skills and industry background to the chairmanship role in order to continue to drive Rudolph’s success. I look forward to supporting him as I continue to serve on our Board of Directors.”

“We greatly appreciate Tom Greig’s leadership over the past six years and his ongoing service,” commented Michael Plisinski, chief executive officer, Rudolph Technologies. “We are pleased to have Dave Miller’s leadership as Chairman while the company continues to focus on the strategy to build a well-balanced and sustainable growth company.”

Mr. Miller, who has been an independent member of Rudolph’s Board for three years, brings significant leadership and practical experience to the chairmanship role. This experience includes over 40 years within the electronics industry, including six years as president of DuPont Electronics & Communications, as well as prior service on the board of SEMI International. He brings to the role a broad international perspective and understanding of global semiconductor and display markets which have been cultivated not only from his global work experience but also as a result of residing in Asia for three years. Mr. Miller’s experience and leadership will further the market growth of Rudolph as it continues to drive its position as a vital supplier within the semiconductor value chain.

ClassOne, a supplier of new electroplating and wet process tools to the 200mm and smaller semiconductor manufacturing industry, today announced the sale its flagship Solstice® S8 CopperMax™ electroplating tool to i3 of Binghamton, NY.  i3 is rapidly expanding its St. Petersburg, FL facility to accommodate volume production work, and they need an automated plating tool with the ability to grow in tandem. CopperMax™ has been chosen to cost-effectively automate the facility’s wet-bench electroplating processes, with flexibility to easily add related downstream processes.

“i3 has selected CopperMax™ for several excellent reasons,” said ClassOne CEO Byron Exarcos. “Our proprietary CopperMax™ cation exchange membrane technology is simply unrivaled in this market. The plating chamber has been designed to dramatically reduce consumables cost while maintaining extremely high levels of feature quality—even for challenging deposition processes such as TSV. CopperMax customers routinely see reductions in additive consumables cost approaching 95%. What’s more, our Solstice platform is engineered for easy expansion, and is designed to support multiple independent processes simultaneously. It’s a perfect fit for facilities that want to grow beyond wet bench work.”

The Solstice S8 CopperMax platform can be configured with from 2 to 8 entirely independent, field-retrofittable process chambers. CopperMax™ also supports multiple wafer sizes simultaneously, allowing i3 to easily migrate from 4- to 6-inch wafers as their production requirements change. i3 will be working with ClassOne to add Solvent and UBM processing chambers to the same CopperMax™ tool in the coming months.

“CopperMax is a perfect fit for our needs,” said Neal Driver, VP-General Manager of i3 Microsystems. “The tool is incredibly flexible and will grow with us as we expand our production environment. We have also been impressed by ClassOne’s outstanding commitment to helping us develop and perfect our deposition processes. They’ve made a serious corporate commitment to customer service, and it shows.”

i3 is a highly-secure, vertically-integrated semiconductor supplier to the defense and aerospace industries. With Solstice® platforms now in production at several of the world’s foremost defense contractors, ClassOne has emerged as the supplier of choice for the exacting requirements of the defense and aerospace industries.