Category Archives: Wafer Processing

Noting the startling advances in semiconductor technology, Intel co-founder Gordon Moore proposed that the number of transistors on a chip will double each year, an observation that has been born out since he made the claim in 1965. Still, it’s unlikely Moore could have foreseen the extent of the electronics revolution currently underway.

Today, a new breed of devices, bearing unique properties, is being developed. As ultra-miniaturization continues apace, researchers have begun to explore the intersection of physical and chemical properties occurring at the molecular scale.

Advances in this fast-paced domain could improve devices for data storage and information processing and aid in the development of molecular switches, among other innovations.

Nongjian “NJ” Tao and his collaborators recently described a series of studies into electrical conductance through single molecules. Creating electronics at this infinitesimal scale presents many challenges. In the world of the ultra-tiny, the peculiar properties of the quantum world hold sway. Here, electrons flowing as current behave like waves and are subject to a phenomenon known as quantum interference. The ability to manipulate this quantum phenomenon could help open the door to new nanoelectronic devices with unusual properties.

“We are interested in not only measuring quantum phenomena in single molecules, but also controlling them. This allows us to understand the basic charge transport in molecular systems and study new device functions,” Tao says.

Tao is the director of the Biodesign Center for Bioelectronics and Biosensors. In research appearing in the journal Nature Materials, Tao and colleagues from Japan, China and the UK outline experiments in which a single organic molecule is suspended between a pair of electrodes as a current is passed through the tiny structure.

The researchers explore the charge transport properties through the molecules. They demonstrated that a ghostly wavelike property of electrons–known as quantum interference– can be precisely modulated in two different configurations of the molecule, known as Para and Meta.

It turns out that quantum interference effects can cause substantial variation in the conductance properties of molecule-scale devices. By controlling the quantum interference, the group showed that electrical conductance of a single molecule can be fine-tuned over two orders of magnitude. Precisely and continuously controlling quantum interference is seen as a key ingredient in the future development of wide-ranging molecular-scale electronics, operating at high speed and low power.

Such single-molecule devices could potentially act as transistors, wires, rectifiers, switches or logic gates and may find their way into futuristic applications including superconducting quantum interference devices (SQUID), quantum cryptography, and quantum computing.

For the current study, the molecules–ring-shaped hydrocarbons that can appear in different configurations–were used, as they are among the simplest and most versatile candidates for modeling the behavior of molecular electronics and are ideal for observing quantum interference effects at the nanoscale.

In order to probe the way charge moves through a single molecule, so-called break junction measurements were made. The tests involve the use of a scanning tunneling microscope or STM. The molecule under study is poised between a gold substrate and gold tip of the STM device. The tip of the STM is repeatedly brought in and out of contact with the molecule, breaking and reforming the junction while the current passes through each terminal.

Thousands of conductance versus distance traces were recorded, with the particular molecular properties of the two molecules used for the experiments altering the electron flow through the junction. Molecules in the ‘Para’ configuration showed higher conductance values than molecules of the ‘Meta’ form, indicating constructive vs destructive quantum interference in the molecules.

Using a technique known as electrochemical gating, the researchers were able to continuously control the conductance over two orders of magnitude. In the past, altering quantum interference properties required modifications to the charge-carrying molecule used for the device. The current study marks the first occasion of conductance regulation in a single molecule.

As the authors note, conductance at the molecular scale is sensitively affected by quantum interference involving the electron orbitals of the molecule. Specifically, interference between the highest occupied molecular orbital or HOMO and lowest unoccupied molecular orbital or LUMO appears to be the dominant determinant of conductance in single molecules. Using an electrochemical gate voltage, quantum interference in the molecules could be delicately tuned.

The researchers were able to demonstrate good agreement between theoretical calculations and experimental results, indicating that the HOMO and LUMO contributions to the conductance were additive for Para molecules, resulting in constructive interference, and subtractive for Meta, leading to destructive interference, much as waves in water can combine to form a larger wave or cancel one another out, depending on their phase.

While previous theoretical calculations of charge transport through single molecules had been carried out, experimental verification has had to wait for a number of advances in nanotechnology, scanning probe microscopy, and methods to form electrically functional connections of molecules to metal surfaces. Now, with the ability to subtly alter conductance through the manipulation of quantum interference, the field of molecular electronics is open to a broad range of innovations.

Critical subsystems for the IC equipment market continued to grow to a new record of $11 billion in 2018. While 2019 is expected to be a downturn year, the long-term outlook remains unchanged with an average growth rate of 3 percent.

Last year may have been a new high for revenues, but it will be remembered as a year of two parts: record quarterly revenues in Q1, followed by rapidly falling orders in Q3 and Q4. Normally, this would not be a problem as suppliers are used to managing volatility in their businesses. However, encouraged by solid end market drivers and optimistic customers, the timing of this downturn was particularly bad as it coincided with the addition of significant new manufacturing capacity for critical subsystems that will be needed to supply the industry into the next decade. The resulting step change in costs against the backdrop of falling revenues has put strain on the financials of these suppliers. Although current visibility is poor, the order decline appears to be stabilising and the worst is nearly over. Revenues are expected to recover in the second half of 2019 followed by a promising outlook for the following three years.

Critical Subsystems for IC equipment history and forecast to 2022. After a pause in 2019, the trend is expected to continue to reach new industry records.

Suppliers of subsystems used in vacuum process tools, such as deposition and etch, have benefited the most from critical subsystems growth since 2012. Vacuum intensity of semiconductor processing continues to grow and in 2018 the value of vacuum process tools exceeded the value of non-vacuum process tools for the first time. This trend is expected to continue with vacuum based semiconductor process equipment accounting for over 60 percent of wafer fab equipment revenues by 2023.

In summary, 2019 is expected to be down 10 percent to 20 percent as the industry digests the recent large additions to semiconductor manufacturing capacity, followed by a new cycle starting in 2020.

Julian West is a technical and marketing analyst at VLSI Research Europe.

Source: SEMI Blog

China has been the largest consuming country for ICs since 2005, but large increases in IC production within China have not immediately followed, according to data presented in the new 500-page 2019 edition of IC Insights’ McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry (released in January 2019).  As shown in Figure 1, IC production in China represented 15.3% of its $155 billion IC market in 2018, up from 12.6% five years earlier in 2013.  Moreover, IC Insights forecasts that this share will increase by 5.2 percentage points from 2018 to 20.5% in 2023.

Figure 1

Currently, China-based IC production is forecast to exhibit a very strong 2018-2023 CAGR of 15%.  However, considering that China-based IC production was only $23.8 billion in 2018, this growth is starting from a relatively small base.  In 2018, SK Hynix, Samsung, Intel, and TSMC were the major foreign IC manufacturers that had significant IC production in China.  In fact, SK Hynix’s 300mm China fab had the most installed capacity of any of its fabs in 2018 at 200,000 wafers per month (full capacity).

Intel’s 300mm fab in Dalian, China (Fab 68 that started MCU production in late October 2010), was idled in 3Q15 as the company switched the fab to 3D NAND flash manufacturing.  This conversion was completed in late 2Q16.  Intel’s China fab had an installed capacity of 70,000 300mm wafers per month in December of 2018 (full capacity).

In early 2012, Samsung gained approval from the South Korean government to construct a 300mm IC fabrication facility to produce NAND flash memory in in Xian, China.  Samsung started construction of the fab in September of 2012 and production began in 2Q14.  The company invested $2.3 billion in the first phase of the fab with $7.0 billion budgeted in total.  This facility was the primary fab for 3D NAND production for Samsung in 2017 with an installed capacity of 100,000 wafers per month as of December 2018 (the company plans to expand this facility to 200,000 wafers per month).

Significant increases in IC sales over the next five years are also expected from existing indigenous Chinese companies including pure-play foundries SMIC and Huahong Group and memory startups YMTC and ChangXin Memory Technologies (CXMT, formerly Innotron). DRAM startup JHICC is currently on hold pending the sanctions imposed on the company by the U.S.  Moreover, there are likely to be new companies looking to establish IC production in China like Taiwan-based Foxconn, which announced in December of 2018 that it intended to build a $9.0 billion fab in China to offer foundry services as well as produce TV chipsets and image sensors.

If China-based IC production rises to $47.0 billion in 2023 as IC Insights forecasts, it would still represent only 8.2% of the total forecasted 2023 worldwide IC market of $571.4 billion.  Even after adding a significant “markup” to some of the Chinese producers’ IC sales figures (since many of the Chinese IC producers are foundries that sell their ICs to companies that re-sell these products to the electronic system producers), China-based IC production would still likely represent only about 10% of the global IC market in 2023.

Even with new IC production being established by China-based startups such as YMTC and CXMT, IC Insights believes that foreign companies will continue to be a large part of the IC production base in China.  As a result, IC Insights forecasts that at least 50% of IC production in China in 2023 will come from foreign companies with fabs in China such as SK Hynix, Samsung, Intel, TSMC, UMC, GlobalFoundries, and Foxconn.

Given the sheer size of China’s investment plans over the next five years, it is likely that China will achieve some level of success with their strategy to become less reliant on IC imports.  However, given increased government scrutiny of Chinese attempts at purchasing foreign technology companies and the legal challenges that the Chinese startups are likely to face in the future, IC Insights believes that China’s current strategy with regard to the IC industry will fall far short of the level of success that China’s government has targeted with its “Made in China 2025” plan (i.e., 40% self-sufficiency by 2020 and 70% by 2025).

Governor Andrew M. Cuomo today announced that IBM (NYSE: IBM), a long-time anchor tenant at the SUNY Polytechnic Institute campus in Albany, plans to invest over $2 billion to grow its high-tech footprint at the campus and throughout New York State. This includes the establishment of an “AI Hardware Center” at SUNY Poly for artificial intelligence-focused computer chip research, development, prototyping, testing and simulation. Once established, the AI Hardware Center will be the nucleus of a new ecosystem of research and commercial partners, and further solidify the Capital Region’s position as “Tech Valley” – a global hub for innovative research and development.

“New York has always been at the forefront of emerging industries, and this private sector investment to create a hub for artificial intelligence research will attract world-class minds and drive economic growth in the region,” Governor Cuomo said. “Artificial intelligence has the potential to transform how we live and how businesses operate, and this partnership with IBM will help ensure New York continues to be on the cutting edge developing innovative technologies.”

“This investment by IBM will continue to grow New York’s high-tech industry in the Capital Region and across the state,” said Lieutenant Governor Kathy Hochul. “The artificial intelligence hardware center will expand research and partnerships at SUNY Polytechnic Institute, and ensure Tech Valley attracts innovative business and development that drives economic development in the region.”

IBM’s expected $2 billion investment will be made at SUNY Poly and other IBM facilities in New York State. IBM plans to provide at least $30 million in cash and in-kind contributions for artificial intelligence research across the SUNY system, with SUNY matching up to $25 million for a combined total of $55 million. Empire State Development will provide a $300 million capital grant over five years, to the Research Foundation for SUNY to purchase, own and install tools necessary to support the AI Hardware Center.

IBM also plans to expand and extend its partnership with SUNY Poly for the Center for Semiconductor Research (CSR), which is set to expire at the end of 2021, through at least 2023, with an option to extend the CSR for an additional five years through 2028.

The AI Hardware Center will attract new AI industry companies and federal research to the state, while fostering economic development and working to create several hundred new jobs and retain hundreds of other existing jobs at the SUNY Poly campus and at IBM’s and its collaborators’ facilities.

Mentor, a Siemens business, today announced that artificial intelligence (AI) semiconductor innovator Graphcore (Bristol, U.K.) successfully met its silicon test requirements and achieved rapid test bring-up on its Colossus Intelligence Processing Unit (IPU) by using Mentor’s Tessent™ product family.

Graphcore’s recently announced Colossus IPU targets machine intelligence training and inference in datacenters. The first-of-its-kind device lowers the cost of accelerating AI applications in cloud and enterprise datacenters, while increasing the performance of both training and inference by up to 100x compared to the fastest systems today.

Graphcore required a DFT solution that could reduce the cost and time challenges associated with testing the Colossus IPU’s novel architecture and exceptionally large design. Integrating 23.6 billion transistors and more than a thousand IPU cores, Colossus is one of the largest processors ever fabricated.

Mentor’s Tessent is the market leading DFT solution, helping companies achieve higher test quality, lower test cost and faster yield ramps. The register-transfer level (RTL)-based hierarchical DFT foundation in Tessent features an array of technologies specifically suited to address the implementation and pattern generation challenges of AI chip architectures.

Graphcore leveraged these capabilities and the Tessent SiliconInsight integrated silicon bring-up environment on Graphcore’s Colossus IPU to meet its test requirements, while minimizing cycle time for DFT implementation, pattern generation, verification and silicon validation.

“We used Mentor’s fully automated Tessent platform for our series of initial silicon parts, together with an all-Mentor DFT flow, allowing us to ship fully tested and validated parts within the first week,” said Phil Horsfield, vice president of Silicon at Graphcore. “We were able to have Logic BIST, ATPG and Memory BIST up and running in under three days. This was way ahead of schedule.”

Research firm IBS, Inc. estimates that AI-related applications consumed $65 billion (USD) of processing technology last year, growing at an 11.5 percent annual rate and significantly outpacing other segments. This processing demand has until now been supplied by microprocessors not fully optimized for high AI workloads. To meet this growing demand while significantly lowering computational cost, more than 70 companies have announced plans to create new processing architectures based on massive parallelism and specialized for AI workloads.

“Hardware acceleration for AI is now a very competitive and rapidly evolving market. As a result, fast time to market is a leading concern for this segment,” said Brady Benware, senior marketing director for the Tessent product family at Mentor, a Siemens business. “Companies participating in this market are choosing Tessent because its RTL-based hierarchical DFT approach provides extremely efficient test implementation for massively parallel architectures, and Tessent’s SiliconInsight debug and characterization capabilities eliminate costly delays during silicon bring-up.”

The American Institute for Manufacturing Integrated Photonics (AIM Photonics) today announced a number of technical updates leading to best-in-class 300mm silicon (Si) photonics-based multi-project wafer (MPW) performance for the Department of Defense-sponsored initiative led by SUNY Polytechnic Institute (SUNY Poly). Complementing these developments, AIM Photonics’ Si photonics process design kit (PDK) continues to advance, enabling industry-leading performance as a result of AIM Photonics’ library of both active and passive high-performance photonic components, as well as interfaces, schematics, and models for the development of optical modules and systems.

“AIM Photonics is proud to continue to provide the most advanced capabilities to this growing industry, which is critical to our national technological and economic strength. Our best-in-class MPW offerings are a testament to our deep bench of experts and collaborators who support our more than 100 signed partners and other interested collaborators,” said Dr. Michael Liehr, AIM Photonics CEO and SUNY Polytechnic Institute Executive Vice President for Innovation and Technology. “Combined with our recent announcement that our Multi-Project Wafer processing time has decreased from 130 days in 2016 to fewer than 90 days, AIM Photonics remains focused on achieving impactful, world-class quality and repeatability to drive development and commercialization of the advanced technologies that will shape our world.”

AIM Photonics’ superior MPW performance is the result of new, ultra low-loss waveguides, featuring attenuation that is less than .25 and .10 dB/cm for 220nm silicon and 220nm silicon nitride (SiN), respectively, in addition to around 1dB/facet edge coupler for both transverse electric (TE) and transverse magnetic (TM) polarization. With only 90-day fabrication time for full actives to be processed on 300mm silicon on insulator (SOI) wafers, and using the same toolset that produces 14nm and smaller circuits, these capabilities also enable easy transfer to similar high-volume equipped foundries if needed.

The MPW also features fusion bonding of the photonic integrated circuit (PIC) and an active interposer to allow for the entire design area to be utilized for photonics or metal routing, in addition to lasers that can be soldered into pockets and deep trenches for coupling. As part of AIM Photonics’ MPW offering, its passive interposer also features a 100µm-thick Si substrate with a through-silicon-via (TSV) SiN waveguide with three front-side and one back-side metal wiring levels, in addition to pockets for laser and PIC chips, which can be flip chip soldered in deep trenches for edge or evanescent fiber coupling.

With a comprehensive set of silicon PIC component libraries and by leveraging SUNY Poly’s process capabilities, AIM Photonics’ PDK now consists of more than 50 reliable photonics components, including passive components such as waveguides, edge couplers, and layer transitions, in addition to active devices such as C, C+L, and O Band photodetectors; microdisk switches and modulators; thermo-optic phase shifters and switches; and variable optical attenuators, among others, that are verified by top university and industry experts. Combined with data that can be obtained from a 14nm toolset to validate designs, this information can also help those working with AIM Photonics to achieve top-tier performance.

Key features of the latest AIM Photonics Analog Photonics/SUNY PDK include:

  • O Band modulation, detection and coupling support.
  • C+L Band modulation, detection, filtering, switching, monitoring and coupling support.
  • Single-level and Multi-level modulation format support at 50Gbps, namely NRZ and PAM-4.
  • Continued multi-vendor Electronics-Photonics-Design-Automation (EPDA) support with integrated EPDA PDK flow for hierarchical design and system-level simulation.

The combined PDK and MPW offering provides unmatched access for all customers[1] to PIC systems, especially for small to medium-size companies that desire a reduction in the time to market, as well as lower product development risk and investment. By incorporating the design, verification, and process development within the PDK, such companies are able to quickly and efficiently modify their designs as they simultaneously reduce their cost per gigabit.

“Companies operating within the integrated photonics space face a number of challenges as they seek to provide cost-effective, high-quality products. With AIM Photonics’ continually updated PDK, as well as our best-in-class, cost-effective MPW that offers a broad component library, we are thrilled to assist the industry, and especially small and medium-sized enterprises, with the capabilities and technical expertise they require to provide innovative and timely solutions to current technological challenges,” said Dr. Douglas Coolbaugh, AIM Photonics COO and SUNY Polytechnic Institute Associate VP for Photonics Development.

AIM Photonics will also be offering new incentives to parties interested in the most recent upcoming MPW runs. These incentives will be available at the AIM Photonics Booth #4425 Hall EF (North) during Photonics West 2019 in San Francisco, CA, February 5th – 7th or can be requested from AIM Photonics by contacting the MPW team at [email protected].

AIM Photonics is leveraging SUNY Poly’s state-of-the-art facilities for three total full-build/passive MPW runs that incorporate the latest PDK, with on-demand Active/Passive PIC; Passive PIC; Passive Interposer; and Active Interposer MPW runs scheduled throughout 2019. To ensure space for all interested parties, AIM Photonics is accepting reservations for these MPW runs; those interested in participating should contact[email protected]. Interested parties can also sign up for the 2019 runs by visiting the AIM Photonics’ website at the following link: http://www.aimphotonics.com/mpw-schedule/. PDK and MPW fab access is solely available through the AIM Photonics MPW aggregator, MOSIS. Please contact MOSIS for access to the most current PDK version release at the following link: www.mosis.com/vendors/view/AIM.

By bombarding an ultrathin semiconductor sandwich with powerful laser pulses, physicists at the University of California, Riverside, have created the first “electron liquid” at room temperature.

The achievement opens a pathway for development of the first practical and efficient devices to generate and detect light at terahertz wavelengths — between infrared light and microwaves. Such devices could be used in applications as diverse as communications in outer space, cancer detection, and scanning for concealed weapons.

The research could also enable exploration of the basic physics of matter at infinitesimally small scales and help usher in an era of quantum metamaterials, whose structures are engineered at atomic dimensions.

The UCR physicists published their findings online Feb. 4 in the journal Nature Photonics. They were led by Associate Professor of Physics Nathaniel Gabor, who directs the UCR Quantum Materials Optoelectronics Lab. Other co-authors were lab members Trevor Arp and Dennis Pleskot, and Associate Professor of Physics and Astronomy Vivek Aji.

A video depicting the research is available here.

In their experiments, the scientists constructed an ultrathin sandwich of the semiconductor molybdenum ditelluride between layers of carbon graphene. The layered structure was just slightly thicker than the width of a single DNA molecule. They then bombarded the material with superfast laser pulses, measured in quadrillionths of a second.

“Normally, with such semiconductors as silicon, laser excitation creates electrons and their positively charged holes that diffuse and drift around in the material, which is how you define a gas,” Gabor said. However, in their experiments, the researchers detected evidence of condensation into the equivalent of a liquid. Such a liquid would have properties resembling common liquids such as water, except that it would consist, not of molecules, but of electrons and holes within the semiconductor.

“We were turning up the amount of energy being dumped into the system, and we saw nothing, nothing, nothing — then suddenly we saw the formation of what we called an ‘anomalous photocurrent ring’ in the material,” Gabor said. “We realized it was a liquid because it grew like a droplet, rather than behaving like a gas.”

“What really surprised us, though, was that it happened at room temperature,” he said. “Previously, researchers who had created such electron-hole liquids had only been able to do so at temperatures colder than even in deep space.”

The electronic properties of such droplets would enable development of optoelectronic devices that operate with unprecedented efficiency in the terahertz region of the spectrum, Gabor said. Terahertz wavelengths are longer than infrared waves but shorter than microwaves, and there has existed a “terahertz gap” in the technology for utilizing such waves. Terahertz waves could be used to detect skin cancers and dental cavities because of their limited penetration and ability to resolve density differences. Similarly, the waves could be used to detect defects in products such as drug tablets and to discover weapons concealed beneath clothing.

Terahertz transmitters and receivers could also be used for faster communication systems in outer space. And, the electron-hole liquid could be the basis for quantum computers, which offer the potential to be far smaller than silicon-based circuitry now in use, Gabor said.

More generally, Gabor said, the technology used in his laboratory could be the basis for engineering “quantum metamaterials,” with atom-scale dimensions that enable precise manipulation of electrons to cause them to behave in new ways.

In further studies of the electron-hole “nanopuddles,” the scientists will explore their liquid properties such as surface tension.

“Right now, we don’t have any idea how liquidy this liquid is, and it would be important to find out,” Gabor said.

Gabor also plans to use the technology to explore basic physical phenomena. For example, cooling the electron-hole liquid to ultra-low temperatures could cause it to transform into a “quantum fluid” with exotic physical properties that could reveal new fundamental principles of matter.

In their experiments, the researchers used two key technologies. To construct the ultrathin sandwiches of molybdenum ditelluride and carbon graphene, they used a technique called “elastic stamping.” In this method, a sticky polymer film is used to pick up and stack atom-thick layers of graphene and semiconductor.

And to both pump energy into the semiconductor sandwich and image the effects, they used “multi-parameter dynamic photoresponse microscopy” developed by Gabor and Arp. In this technique, beams of ultrafast laser pulses are manipulated to scan a sample to optically map the current generated.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced the global semiconductor industry posted sales of $468.8 billion in 2018, the industry’s highest-ever annual total and an increase of 13.7 percent compared to the 2017 total. Global sales for the month of December 2018 reached $38.2 billion, a slight increase of 0.6 percent over the December 2017 total, but down 7.0 percent compared to the total from November 2018. Fourth-quarter sales of $114.7 billion were 0.6 percent higher than the total from the fourth quarter of 2017, but 8.2 percent less than the third quarter of 2018. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Global demand for semiconductors reached a new high in 2018, with annual sales hitting a high-water mark and total units shipped topping 1 trillion for the first time,” said John Neuffer, SIA president and CEO. “Market growth slowed during the second half of 2018, but the long-term outlook remains strong. Semiconductors continue to make the world around us smarter and more connected, and a range of budding technologies – artificial intelligence, virtual reality, the Internet of Things, among many others – hold tremendous promise for future growth.”

Several semiconductor product segments stood out in 2018. Memory was the largest semiconductor category by sales with $158.0 billion in 2018, and the fastest growing, with sales increasing 27.4 percent. Within the memory category, sales of DRAM products increased 36.4 percent and sales of NAND flash products increased 14.8 percent. Logic ($109.3 billion) and micro-ICs ($67.2 billion) – a category that includes microprocessors – rounded out the top three product categories in terms of total sales. Other fast-growing product categories in 2018 included power transistors (14.4 percent growth/total sales of $14.4 billion) and analog products (10.8 percent growth/total sales of $58.8 billion). Even without sales of memory products, sales of all other products combined increased by nearly 8 percent in 2018.

Annual sales increased substantially across all regions: China (20.5 percent), the Americas (16.4 percent), Europe (12.1 percent), Japan (9.2 percent), and Asia Pacific/All Other (6.1 percent). For the month of December 2018, year-to-year sales increased in China (5.8 percent), Europe (2.8 percent), and Japan (2.3 percent), but fell in Asia Pacific/All Other (-0.7 percent) and the Americas (-6.2 percent). Sales in December 2018 were down compared to November 2018 across all regions: Japan (-2.2 percent), Asia Pacific/All Other (-3.1 percent), Europe (-4.9 percent), China (-8.1 percent), and the Americas (-12.4 percent).

“A strong semiconductor industry is critical to America’s economic strength, national security, and global technology leadership,” said Neuffer. “We urge Congress and the Trump Administration to enact polices in 2019 that promote continued growth and innovation, including robust investments for basic scientific research, long-overdue high-skilled immigration reforms, and initiatives that promote free and open trade, such as the U.S.-Mexico-Canada Agreement (USMCA). We look forward to working with policymakers in the year ahead to further strengthen the semiconductor industry, the broader tech sector, and our economy.”

For comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, consider purchasing the WSTS Subscription Package. For detailed historical information about the global semiconductor industry and market, consider ordering the SIA Databook.

Intel names Robert Swan CEO


January 31, 2019

Intel Corporation (NASDAQ: INTC) today announced that its board of directors has named Robert (Bob) Swan as chief executive officer. Swan, 58, who has been serving as Intel’s interim CEO for seven months and as chief financial officer since 2016, is the seventh CEO in Intel’s 50-year history. Swan has also been elected to Intel’s board of directors.

Intel Corporation has named Robert Swan as its chief executive officer. His promotion was announced Jan. 31, 2019. Swan, who previously served as the company’s chief financial officer and interim CEO, is the seventh CEO to lead the company based in Santa Clara, Calif. (Credit: Intel Corporation)

Todd Underwood, vice president of Finance and director of Intel’s Corporate Planning and Reporting, will assume the role of interim chief financial officer as the company undertakes an internal and external search for a permanent CFO.

“As Intel continues to transform its business to capture more of a large and expanding opportunity that includes the data center, artificial intelligence and autonomous driving, while continuing to get value from the PC business, the board concluded after a thorough search that Bob is the right leader to drive Intel into its next era of growth,” said Chairman Andy Bryant. “The search committee conducted a comprehensive evaluation of a wide range of internal and external candidates to identify the right leader at this critical juncture in Intel’s evolution. We considered many outstanding executives and we concluded the best choice is Bob. Important in the board’s decision was the outstanding job Bob did as interim CEO for the past seven months, as reflected in Intel’s outstanding results in 2018. Bob’s performance, his knowledge of the business, his command of our growth strategy, and the respect he has earned from our customers, our owners, and his colleagues confirmed he is the right executive to lead Intel.”

“In my role as interim CEO, I’ve developed an even deeper understanding of Intel’s opportunities and challenges, our people and our customers,” Swan said. “When I was first named interim CEO, I was immediately focused on running the company and working with our customers. When the board approached me to take on the role permanently, I jumped at the chance to lead this special company. This is an exciting time for Intel: 2018 was an outstanding year and we are in the midst of transforming the company to pursue our biggest market opportunity ever. I’m honored to have the chance to continue working alongside our board, our leadership team, and our more than 107,000 superb employees as we take the company forward.”

Swan is a proven leader with a strong track record of success both within and outside Intel. As interim CEO, Swan has managed the company’s operations in close collaboration with Intel’s senior leadership team. Swan has been Intel’s CFO since October 2016. In this role, he led the global finance, mergers and acquisitions, investor relations, IT and corporate strategy organizations. Prior to joining Intel, Swan served as an operating partner at General Atlantic LLC and served on Applied Materials’ board of directors. He previously spent nine years as CFO of eBay Inc., where he is currently a director. Earlier in his career, he was CFO of Electronic Data Systems Corp. and TRW Inc. He also served as CFO, COO and CEO of Webvan Group Inc., and began his career at General Electric, serving for 15 years in several senior finance roles.

Vanguard International Semiconductor Corporation (VIS) and GLOBALFOUNDRIES (GF) today announced that VIS will acquire GF’s Fab 3E in Tampines, Singapore. The transaction includes buildings, facilities, and equipment, as well as IP associated with GF’s MEMS business. GF will continue to operate the facility through the end of 2019, providing a transition period to facilitate technology transfers for VIS and existing GF customers. Fab 3E currently manages a monthly capacity of approximately 35,000 8-inch wafers. The transaction amounts to $236 million USD and the transfer of ownership is set to be completed on December 31st, 2019.

VIS and GF have already reached consensus on the transfer of Fab 3E’s employees and customers. Both companies believe that employees are the most important assets of a company, so their interests should be put as the first priority during the transition; while ensuring no disruption to customers whose products are in production at the fab. Under this premise, VIS will extend employment offers to all employees currently working at Fab 3E, as well as continuously provide existing customers at Fab 3E with its foundry service, including MEMS customers.

“I appreciate the support of GF’s board and management team for this transaction, giving VIS an opportunity to continue expanding its capacity and reinforce momentum for future growth,” said Mr. Leuh Fang, Chairman of VIS. “Since its foundation, VIS has already had three separate experiences of successfully transforming a DRAM fab into a foundry fab. We believe this transaction is a win-win for both VIS and GF; and to VIS, it is also a decision that benefits all of our customers, employees, and shareholders. VIS will uphold its philosophy and principles to continue satisfying customers’ demands in capacity and technology, sustaining profitability and growth, and rewarding our shareholders.”

“This transaction is part of our strategy to streamline our global manufacturing footprint and increase our focus in Singapore on technologies where we have clear differentiation such as RF, embedded memory and advanced analog features,” said GF CEO Tom Caulfield. “Consolidating our 200mm operations in Singapore into one campus will also help reduce our operating costs by leveraging the scale of our gigafab facility in Woodlands. VIS is the right partner to leverage the Fab 3E asset going forward.”

VIS’s capacity has been fully utilized since 2018, and it is in the interests of its customers that VIS expands capacity to meet growing demands. The new fab is expected to contribute more than 400,000 8-inch wafers per year. This acquisition demonstrates the determination and commitment of VIS to accelerate capacity expansion.