Category Archives: Wafer Processing

By Jay Chittooran, SEMI Public Policy

Following through on his 2016 campaign promise, President Trump is implementing trade policies that buck conventional wisdom in Washington, D.C. and among U.S. businesses. Stiff tariffs and the dismantling of longstanding trade agreements – cornerstones of these new actions – will ripple through the semiconductor industry with particularly damaging effect. China, a chief target of criticism from President Trump, has again found itself in the crosshairs of the administration, with trade tensions rising to a fever pitch.

The Trump Administration has long criticized China for what it considers unfair trade practices, often zeroing in on intellectual property. In August 2017, the Office of the U.S. Trade Representative (USTR), charged with developing and recommending U.S trade policy to the president, launched a Section 301 investigation into whether China’s practice of forced technology transfer has discriminated against U.S. firms. As the probe continues, it is becoming increasingly clear that the United States will impose tariffs on China based on its current findings. Reports suggest that the tariffs could come soon, hitting a range of products from consumer electronics to toys. Other measures could include tightening restrictions on the trade of dual-use goods – those with both commercial and military applications – curbing Chinese investment in the United States, and imposing strict limits on the number of visas issued to Chinese citizens.

With China a major and intensifying force in the semiconductor supply chain, raising tariffs hangs like the Sword of Damocles over the U.S. and global economies. A tariff-ignited trade war with China could stifle innovation, undermine the long-term health of the semiconductor industry, and lead to unintended consequences such as higher consumer prices, lower productivity, job losses and, on a global scale, a brake on economic growth.

Other recently announced U.S. trade actions could also cloud the future for semiconductor companies. The Trump administration, based on two separate Section 232 investigations claiming that overproduction of both steel and aluminum are a threat to U.S. national security, recently levied a series of tariffs and quotas on every country except Canada and Mexico. While these tariffs have yet to take effect, the mere prospect has angered U.S. trading partners – most notably Korea, the European Union and China. Several countries have threatened retaliatory action and others have taken their case to the World Trade Organization.

Trade is oxygen to the semiconductor industry, which grew by nearly 30 percent last year and is expected to be valued at an estimated $1 trillion by 2030. Make no mistake: SEMI fully supports efforts to buttress intellectual property protections. However, the Trump administration’s unfolding trade policy could antagonize U.S. trade partners.

For its part, SEMI is weighing in with USTR on these issues, underscoring the critical importance of trade to the semiconductor industry as we educate policymakers on trade barriers to industry growth and encourage unobstructed cross-border commerce to advance semiconductors and the emerging technologies they enable. On behalf of our members, we continue our work to increase global market access and lessen the regulatory burden on global trade. If you are interested in more information on trade, or how to be involved in SEMI’s public policy program, please contact Jay Chittooran, Public Policy Manager, at [email protected].

Originally published on the SEMI blog.

SEMICON West, the flagship U.S. event for connecting the electronics manufacturing supply chain, has opened registration for the July 10-12, 2018, exposition at the Moscone Center in San Francisco, California. Building on a year of record-breaking industry growth, SEMICON West 2018 will highlight the engines of future industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

Themed BEYOND SMART, SEMICON West 2018 sets it sights on the growing impact of cognitive learning technologies and other industry disruptors with programs and new Smart Pavilions including Smart Manufacturing and Smart Transportation to showcase interactive technologies for immersive, virtual experiences. Each Pavilion will feature a Meet the Experts Theater with an intimate setting for attendees to engage informally with industry thought leaders.

Smart Workforce Pavilion: Connecting Next-Generation Talent with the Microelectronics Industry

The SEMI Smart Workforce Pavilion at SEMICON West 2018 leverages the largest microelectronic manufacturing event in North America to draw the next generation of innovators. Reliant on a highly skilled workforce, the industry today is saddled with thousands of job openings and fierce competition for workers, bringing renewed focus to strengthening its talent pipeline. Educational and engaging, the Pavilion connects the microelectronics industry with college students and entry-level professionals interested in career opportunities.

In the Workforce Pavilion “Meet the Experts” Theater, industry engineers will share insights and inspiration about their personal working experiences and career advisors will offer best practices. Recruiters from top companies will be available for on-the-spot interviews, while career coaches offer mentoring, tips on cover letter and resume writing, job-search guidance, and more. Visitors will learn more about the industry’s vital role in technological innovation in today’s connected world.

This year, SEMI will also host High Tech U (HTU) in conjunction with the SEMICON West Smart Workforce Pavilion. The highly-interactive program supported by Advantest, Edwards, KLA-Tencor and TEL exposes high school students to STEM education pathways and stimulates excitement about careers in the industry.

Free registration with three-day access and shuttle service to SEMICON West are available to all college students. Students are encouraged to register for the mentor program, attend keynotes and tour the exposition hall to see everything the industry has to offer.  To learn more, visit Smart Workforce Pavilion and College Track to preview how students can enter to win a $500 hiring bonus!

Three Ways to Experience the Expo

Attendees can tailor their SEMICON West experience to meet their specific interests. The All-In pass covers every program and event, while the Thought-Leadership and Expo-Only packages offer scaled pricing and program options. Attendees can also purchase select events and programs à la carte, including exclusive IEEE-sponsored sessions, the SEMI Market Symposium, and the STEM Rocks After-hours Party, a fundraising event to support the SEMI Foundation.

GLOBALFOUNDRIES today announced a new ecosystem partner program, called RFWave, designed to simplify RF design and help customers reduce time-to-market for a new era of wireless devices and networks.

The last few years there has been an increasing demand for connected devices and systems that will require innovations in radio technologies to support the new modes of operation and higher capabilities. The RFWave Partner Program builds upon GF’s 5G vision and roadmap, with a focus on the company’s industry-leading radio frequency (RF) solutions, such as FD-SOI, RF CMOS (bulk and advanced CMOS nodes), RF SOI and silicon germanium (SiGe) technologies. The program provides a low-risk, cost-effective path for designers seeking to build highly optimized RF solutions for a range of wireless applications such as IoT across various wireless connectivity and cellular standards, standalone or transceiver integrated 5G front end modules, mmWave backhaul, automotive radar, small cell and fixed wireless and satellite broadband.

RFWave enables customers to build innovative RF solutions as well as packaging and test solutions. Initial partners have committed a set of key offerings to the program, including:

  • tools (EDA) that complement industry leading design flows by adding specific modules to easily leverage features of GF’s RF technology platforms,
  • a comprehensive library of design elements (IP), including foundation IP, interfaces and complex IP to enable foundry customers to start their designs using pre-validated IP elements,
  • resources (design consultation, services), trained and globally distributed, for Partners to gain easy access to support in developing solutions using GF’s RF technologies

“An explosion of digital information is expected to drive an enormous amount of growth in the coming years and our customers are already preparing for a future of seamless, reliable ultra high data rate wireless connectivity everywhere,” said Bami Bastani, senior vice president of GF’S RF Business Unit. “As a leader in RF, GF’s RFWave program takes industry collaboration to a new level, enabling our customers to build differentiated, highly integrated RF-tailored solutions that are designed to accelerate the next wave of technology.”

The RFWave Partner Program creates an open framework to allow selected partners to integrate their products or services into a validated, plug-and-play catalog of design solutions. This level of integration allows customers to create high-performance designs while minimizing development costs through access to a broad set of quality offerings, specific to RF technology. The partner ecosystem positions members and customers to take advantage of ubiquitous connectivity and the broad adoption of GF’s industry-leading RF technology platforms.

Initial members of the RFWave Partner Program are: asicNorth, Cadence, CoreHW, CWS, Keysight Technologies, Spectral Design, and WEASIC. These companies have already initiated work to deliver innovative, highly optimized RF solutions.

UnitySC, a developer of advanced inspection and metrology solutions, today announced it acquired 100% of the shares of HSEB Dresden, GmbH (HSEB), a supplier in optical inspection, review and metrology for high-value semiconductor applications. Following the acquisition, the new entity’s extended line of leading-edge process control solutions will provide a unique and essential inspection and metrology capability to semiconductor manufacturers. Together, the entity’s offerings span substrate, front-end-of-line (FEOL) manufacturing, wafer-level packaging, 3D ICs and power semiconductors. Further, bringing together the two companies will strengthen worldwide customer support for all platforms.

The combined product portfolio and future common platforms of UnitySC and HSEB will support manufacturing of devices used in mobility, automotive and internet of things applications. Combined, these markets are expected to reach a 14% CAGR, far outpacing the 8% growth forecast of the rest of the semiconductor industry. This will require the expansion and construction of new manufacturing facilities with novel equipment lines.

“Thanks to the proprietary technologies developed by both companies, this strategic acquisition further strengthens our capacity for development and innovation, enabling us to be the preferred partner to meet new customer requirements,” said Patrick Leteurtre, president of UnitySC. “Our product portfolio now spans the spectrum required for substrate control of new FEOL, advanced packaging applications such as fan-out wafer-level packaging, embedded dies and through silicon vias, resulting in a value-added market positioning that will further accelerate our growth.”

The new entity is distinguished by its strong semiconductor legacy and focus on technology development. More than 50% of its 140 employees are dedicated to R&D. Its extensive patent portfolio comprises 46 key patent families related to new semiconductor applications, and the management team is deeply rooted in the semiconductor industry. 

UnitySC and HSEB products are already in service in the top five foundries and the top 10 OSATs, supported by an experienced service team. The acknowledgment of its products as tools-of-record by customers working on next-generation processes has generated a growth rate of more than 50% in a market that generally does not exceed 10% CAGR.

At closing, UnitySC paid an undisclosed fixed price for 100% of the shares of HSEB. Jointly, the two entities achieved a turnover of $20 million in 2017, and recorded $22 million in bookings by the end of February 2018.

The ConFab — an executive invitation-only conference now in its 14th year — brings together influential decision-makers from all parts of the semiconductor supply chain for three days of thought-provoking talks and panel discussions, networking events and select, pre-arranged breakout business meetings.

In the 2018 program, we will take a close look at the new applications driving the semiconductor industry, the technology that will be required at the device and process level to meet new demands, and the kind of strategic collaboration that will be required. It is this combination of business, technology and social interactions that make the conference so unique and so valuable. Browse this slideshow for a look at this year’s speakers, keynotes, panel discussions, and special guests.

Visit The ConFab’s website for a look at the full, three-day agenda for this year’s event.

KEYNOTE: How AI is Driving the New Semiconductor Era

Rama Divakaruni_June_2014presented by Rama Divakaruni, Advanced Process Technology Research Lead, IBM

The exciting results of AI have been fueled by the exponential growth in data, the widespread availability of increased compute power, and advances in algorithms. Continued progress in AI – now in its infancy – will require major innovation across the computing stack, dramatically affecting logic, memory, storage, and communication. Already the influence of AI is apparent at the system-level by trends such as heterogeneous processing with GPUs and accelerators, and memories with very high bandwidth connectivity to the processor. The next stages will involve elements which exploit characteristics that benefit AI workloads, such as reduced precision and in-memory computation. Further in time, analog devices that can combine memory and computation, and thus minimize the latency and energy expenditure of data movement, offer the promise of orders of magnitude power-performance improvements for AI workloads. Thus, the future of AI will depend instrumentally on advances in devices and packaging, which in turn will rely fundamentally on materials innovations.

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A research team from Tokyo Institute of Technology (Tokyo Tech) and Waseda University have successfully produced high-quality thin film monocrystalline silicon with a reduced crystal defect density down to the silicon wafer level at a growth rate that is more than 10 times higher than before. In principle, this method can improve the raw material yield to nearly 100%. Therefore, it can be expected that this technology will make it possible to drastically reduce manufacturing costs while maintaining the power generation efficiency of monocrystalline silicon solar cells, which are used in most high efficient solar cells.

This is the monocrystalline Si thin film peeled off using adhesive tape. Credit: CrystEngComm

This is the monocrystalline Si thin film peeled off using adhesive tape. Credit: CrystEngComm

Background

Solar power generation is a method of generating power where solar light energy is converted directly into electricity using a device called a “solar cell.” Efficiently converting the solar energy that is constantly striking the earth to generate electricity is an effective solution to the problem of global warming related to CO2emissions. By making the monocrystalline Si solar cells that are at the core of solar power generation systems thinner, it is possible to greatly reduce raw material costs, which account for about 40% of the current module, and by making them flexible and lighter, usage can be expected to expand and installation costs can be expected to decrease.

In addition, as a method of reducing manufacturing cost, thin-film monocrystalline Si solar cells that use porous silicon (Double Porous Silicon Layer: DPSL) via lift-off are attracting attention as having a competitive edge in the future.

Among the technical challenges related to monocrystalline Si solar cells using lift-off are 1) the formation of a high-quality thin film Si at the Si wafer level, 2) achieving a porous structure that can easily be lifted off (peeled off), 3) improving the growth rate and Si raw material yield (necessary equipment costs are determined by the growth rate), and 4) being able to use the substrate after lift-off without any waste.

In order to overcome challenge 1), it was necessary to clarify the main factors that determine the quality of thin film crystals grown on porous silicon, and to develop a technique for controlling these.

Overview of research achievement

A joint research team consisting of Professor Manabu Ihara and Assistant Professor Kei Hasegawa of the Tokyo Tech, and Professor Suguru Noda of Waseda University has developed a high-quality thin film monocrystalline silicon with a thickness of about 10 μm and a reduced crystal defect density down to the silicon wafer level at a growth rate that is more than 10 times higher than before. First, double-layer nano-order porous silicon is generated on the surface of a monocrystalline wafer using an electrochemical technique. Next, the surface was smoothed to a roughness of 0.2 to 0.3 nm via a unique zone heating recrystallization method (ZHR method), and this substrate was used for high-speed growth to obtain a moonocrystalline thin film with high crystal quality. The grown film can easily be peeled off using the double-layer porous Si layer, and the substrate can be reused or used as an evaporation source for thin film growth, which greatly reduces material loss. When the surface roughness of the underlying substrate is reduced by changing the ZHR method conditions, the defect density of the thin film crystal that was grown decreased, and the team eventually succeeded in reducing it to the Si wafer level of about 1/10th. This quantitatively shows that a surface roughness in the range of only 0.1-0.2 nm (level of atoms to several tens of layers) has an important impact on the formation of crystal defects, which is also of interest as a crystal growth mechanism.

The film formation rate and the conversion rate of the Si source to the thin film Si are bottlenecks in the production of thin-film monocrystalline Si. With chemical vapor deposition (CVD), which is mainly used for epitaxy, the maximum film forming rate is a few μm/h and the yield is about 10%. At the Noda Laboratory of Waseda University, instead of the regular physical vapor deposition (PVD) where raw Si is vaporized at around its melting point of 1414 ?C, by vaporizing the raw Si at much higher temperature of >2000 ?C, a rapid evaporation method (RVD) was developed with a high Si vapor pressure capable of depositing Si at 10 μm/min.

It was found that the ZHR technology developed this time can resolves technical problems and drastically reduce the manufacturing cost of the lift-off process.

Future development

Based on the results of this study, not only did the team discover the main factors for improving the quality of crystals during rapid growth on porous silicon used for the lift-off process, they succeeded in controlling these. In the future, measurement of the carrier lifetime of the thin film, which is directly connected to the performances of solar cells, and fabrication of solar cells will be carried out with the goal of putting the technology into practical use. The use of this Si thin films as low cost bottom cells in tandem type solar cells with an efficiency of over 30% will also be considered.

The results are published in the Royal Society of Chemistry (RSC) journal CrystEngComm and will be featured on the inside front cover of the issue.

One of the problems for Javier Vela and the chemists in his Iowa State University research group was that a toxic material worked so well in solar cells.

And so any substitute for the lead-containing perovskites used in some solar cells would have to really perform. But what could they find to replace the perovskite semiconductors that have been so promising and so efficient at converting sunlight into electricity?

What materials could produce semiconductors that worked just as well, but were safe and abundant and inexpensive to manufacture?

“Semiconductors are everywhere, right?” Vela said. “They’re in our computers and our cell phones. They’re usually in high-end, high-value products. While semiconductors may not contain rare materials, many are toxic or very expensive.”

Vela, an Iowa State associate professor of chemistry and an associate of the U.S. Department of Energy’s Ames Laboratory, directs a lab that specializes in developing new, nanostructured materials. While thinking about the problem of lead in solar cells, he found a conference presentation by Massachusetts Institute of Technology researchers that suggested possible substitutes for perovskites in semiconductors.

Vela and Iowa State graduate students Bryan Rosales and Miles White decided to focus on sodium-based alternatives and started an 18-month search for a new kind of semiconductor. The work was supported by Vela’s five-year, $786,017 CAREER grant from the National Science Foundation. CAREER grants are the foundation’s most prestigious awards for early career faculty.

They came up with a compound that features sodium, which is cheap and abundant; bismuth, which is relatively scarce but is overproduced during the mining of other metals and is cheap; and sulfur, the fifth most common element on Earth. The researchers report their discovery in a paper recently published online by the Journal of the American Chemical Society.

The paper’s subtitle is a good summary of their work: “Toward Earth-Abundant, Biocompatible Semiconductors.”

“Our synthesis unlocks a new class of low-cost and environmentally friendly ternary (three-part) semiconductors that show properties of interest for applications in energy conversion,” the chemists wrote in their paper.

In fact, Rosales is working to create solar cells that use the new semiconducting material.

Vela said variations in synthesis – changing reaction temperature and time, choice of metal ion precursors, adding certain ligands – allows the chemists to control the material’s structure and the size of its nanocrystals. And that allows researchers to change and fine tune the material’s properties.

Several of the material’s properties are already ideal for solar cells: The material’s band gap – the amount of energy required for a light particle to knock an electron loose – is ideal for solar cells. The material, unlike other materials used in solar cells, is also stable when exposed to air and water.

So, the chemists think they have a material that will work well in solar cells, but without the toxicity, scarcity or costs.

“We believe the experimental and computational results reported here,” they wrote in their paper, “will help advance the fundamental study and exploration of these and similar materials for energy conversion devices.”

IC Insights’ latest market, unit, and average selling price forecasts for 33 major IC product segments for 2018 through 2022 is included in the March Update to the 2018 McClean Report (MR18).  The Update also includes an analysis of the major semiconductor suppliers’ capital spending plans for this year.

The biggest adjustments to the original MR18 IC market forecasts were to the memory market; specifically the DRAM and NAND flash segments.  The DRAM and NAND flash memory market growth forecasts for 2018 have been adjusted upward to 37% for DRAM (13% shown in MR18) and 17% for NAND flash (10% shown in MR18).

The big increase in the DRAM market forecast for 2018 is primarily due to a much stronger ASP expected for this year than was originally forecast.  IC Insights now forecasts that the DRAM ASP will register a 36% jump in 2018 as compared to 2017, when the DRAM ASP surged by an amazing 81%.  Moreover, the NAND flash ASP is forecast to increase 10% this year, after jumping by 45% in 2017.  In contrast to strong DRAM and NAND flash ASP increases, 2018 unit volume growth for these product segments is expected to be up only 1% and 6%, respectively.

At $99.6 billion, the DRAM market is forecast to be by far the largest single product category in the IC industry in 2018, exceeding the expected NAND flash market ($62.1 billion) by $37.5 billion.  Figure 1 shows that the DRAM market has provided a significant tailwind or headwind for total worldwide IC market growth in four out of the last five years.

The DRAM market dropped by 8% in 2016, spurred by a 12% decline in ASP, and the DRAM segment became a headwind to worldwide IC market growth that year instead of the tailwind it had been in 2013 and 2014.  As shown, the DRAM market shaved two percentage points off of total IC industry growth in 2016.  In contrast, the DRAM segment boosted total IC market growth last year by nine percentage points. For 2018, the expected five point positive impact of the DRAM market on total IC market growth is forecast to be much less significant than it was in 2017.

Figure 1

Figure 1

GLOBALFOUNDRIES today revealed new details of its silicon photonics roadmap to enable the next generation of optical interconnects for datacenter and cloud applications. The company has now qualified the industry’s first 90nm manufacturing process using 300mm wafers, while also unveiling its upcoming 45nm technology to deliver even greater bandwidth and energy efficiency.

GF’s silicon photonics technologies are designed to support the massive growth in data transmitted across today’s global communication infrastructure. Instead of traditional interconnects that transmit data using electrical signals over copper wires, silicon photonics technology uses pulses of light through optical fibers to move more data at higher speeds and over longer distances, while also minimizing energy loss.

“The explosive need for bandwidth is fueling demand for a new generation of optical interconnects,” said Mike Cadigan, senior vice president of sales and ASIC business unit at GF. “Our silicon photonics technologies enable customers to deliver unprecedented levels of connectivity for transferring massive amounts of data, whether it’s between chips inside a datacenter or across cloud servers separated by hundreds and even thousands of miles. When combined with our advanced ASIC and packaging capabilities, these technologies allow us to deliver highly differentiated solutions to this marketplace.”

GF’s silicon photonics technologies enable the integration of tiny optical components side-by-side with electrical circuits on a single silicon chip. This “monolithic” approach leverages standard silicon manufacturing techniques to improve production efficiency and reduce cost for customers deploying optical interconnect systems.

Available today on 300mm

GF’s current-generation silicon photonics offering is built on its 90nm RF SOI process, which leverages the company’s world-class experience in manufacturing high-performance radio frequency (RF) chips. The platform can enable solutions that provide 30GHz of bandwidth to support client side data rates of up to 800Gbps, as well as long-reach capabilities of up to 120km.

The technology, which had previously been manufactured using 200mm wafer processing, has now been qualified on larger-diameter 300mm wafers at GF’s Fab 10 facility in East Fishkill, N.Y. The migration to 300mm enables more customer capacity, greater manufacturing productivity, and up to a 2X reduction in photonic losses to improve reach and enable more efficient optical systems.

The 90nm technology is supported by a full PDK for E/O/E co-design, polarization, temperature and wavelength parametrics from Cadence Design Systems, as well as differentiated photonic test capabilities including five test sectors from technology verification and modeling to MCM product test.

A roadmap for tomorrow

GF’s next-generation monolithic silicon photonics offering will be manufactured on its 45nm RF SOI process, with production slated for 2019. By leveraging the more advanced 45nm node, the technology will enable reduced power, smaller form factor, and significantly higher bandwidth optical transceiver products to address next generation terabit applications.

Qualcomm Incorporated (NASDAQ: QCOM) received a Presidential Order to immediately and permanently abandon the proposed takeover of Qualcomm by Broadcom Limited (NASDAQ: AVGO). Under the terms of the Presidential Order, all of Broadcom’s director nominees are also disqualified from standing for election as directors of Qualcomm.

Qualcomm was also ordered to reconvene its 2018 Annual Meeting of Stockholders on the earliest possible date, which based on the required 10-day notice period, is March 23, 2018. Stockholders of record on January 8, 2018 will be entitled to vote at the meeting.

Broadcom’s official statement after receiving the order was to strongly disagree that its proposed acquisition of Qualcomm raises any national security concerns.

“This should be viewed as a very positive event not only for Qualcomm but also for the market as a whole,” said Stuart Carlaw, Chief Research Officer at ABI Research. “The combined entity would have had dangerously dominant positions in some core markets such as location technologies, Wi-Fi, Bluetooth, RF hardware and automotive semiconductors. A diverse supplier ecosystem will be key to supporting the IoT as well as vertical market developments such as smart mobility and smart manufacturing.”

The Presidential Order is available at: https://www.whitehouse.gov/presidential-actions/presidential-order-regarding-proposed-takeover-qualcomm-incorporated-broadcom-limited/.