Category Archives: Wafer Processing

Eighty years after the theoretical prediction of the force required to overcome the van der Waals’ bonding between layers in a crystal, engineering researchers at Tohoku University have measured it directly. They report their results this week in the Journal of Applied Physics, from AIP Publishing.

In its proof-of-concept, the team also created more durable gallium selenide crystals. The accomplishment could advance the development of terahertz and spintronics technologies, used in a range of applications from medical imaging to quantum computers.

“This is the first time anyone has directly measured the van der Waals bonding force in the layers of a crystal,” Tadao Tanabe, one of the authors, said. “Even high school students know of this force, but in crystals it was very difficult to measure directly.”

Though considered promising for many technologies, the use of gallium selenide crystals has been hampered by the fact that they’re notoriously fragile. To make them stronger, Tanabe’s team, including Department of Materials Science colleague Yutaka Oyama, imagined growing crystals with small amounts of the selenium replaced with the rare element tellurium.

The researchers surmised that tellurium’s larger electron cloud would produce greater van der Waals’ forces between the crystal layers, strengthening the overall structure. Van der Waals’ are weak electric forces that attract atoms to one another through subtle shifts in the atom’s electron configurations.

The team grew and compared three different types of crystals: one pure gallium selenide, one with 0.6 percent tellurium and one with 10.6 percent tellurium. To test the effect on the tellurium on interlayer bonding, the team invented the equivalent of a crystal sandwich opener. Their system is able to measure with exquisite detail the tensile strength, the force required to pull the crystal until it breaks.

“The tensile testing system is very simple in some ways,” Tanabe said. “But it was very difficult to develop a way to identify the exact point at which the crystal broke.”

The crystals tested were about 3 millimeters in width, and only 1/5 of a millimeter thick, about half the thickness of a piece of standard printer paper. Each crystal is comprised of hundreds of individual layers.

The team used special double-sided tape on either side of a crystal to hold it between an anchored stage and a moveable one that could be pulled away slowly, at a rate of 50 millionths of a meter per second. “This enabled us to very precisely measure the interlayer force at which the crystal broke,” Tanabe said.

The researchers found that the interlayer van der Waals bonding in the tellurium-doped crystals was seven times stronger than in pure gallium selenide ones.

With the addition of tellurium, the soft and cleavable gallium selenide crystal becomes rigid by enhancement of the van der Waals’ bonding force, the authors report, paving the way for using this system to improve crystal-based technologies.

Dialog Semiconductor plc (XETRA:DLG), a provider of highly integrated power management, AC/DC power conversion, charging, and low power connectivity technology, announced today that it has completed the acquisition of privately-held Silego Technology Inc. (“Silego”), a provider of Configurable Mixed-signal ICs (CMICs).

Headquartered in Santa Clara, California with approximately 235 employees worldwide, Silego is the pioneer and market leader in CMICs that integrate multiple analog, logic, and discrete component functionality into a single chip. Silego’s product portfolio will strengthen Dialog’s presence in markets including IoT, computing and automotive.

“The acquisition of Silego brings a highly complementary technology to Dialog. What Silego has developed is truly unique – a mixed-signal platform which customers can configure to their design requirements on the fly, drastically reducing the time to bring their products to market,” said Jalal Bagherli, CEO of Dialog. “With global scale and customer access, Dialog is the right platform to further accelerate industry wide CMIC adoption. Furthermore, we gain an exceptional group of talented people that will fit well with Dialog’s culture. Together, we will significantly increase the value we can bring to our customers by creating a better-positioned and more-diversified mixed signal offering.”

“We believe Dialog will be a great environment for the Silego team to grow as part of a much larger company serving global customers,” stated John Teegen, CEO of Silego Technology. “Our proprietary and configurable approach has allowed Silego to establish leadership while creating a new market. By leveraging Dialog’s technology and capabilities, I am confident we can further drive adoption of CMICs.”

Silego anticipates achieving over $80 million of revenue in 2017 and double-digit growth in 2018. The transaction is expected to be accretive to Dialog’s underlying EPS for full calendar year 2018 and accretive to Dialog’s gross margin.

The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors reached $107.9 billion for the third quarter of 2017, marking the industry’s highest-ever quarterly sales and an increase of 10.2 percent compared to the previous quarter. Sales for the month of September 2017 were $36.0 billion, an increase of 22.2 percent over the September 2016 total of $29.4 billion and 2.8 percent more than the previous month’s total of $35.0 billion. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

highest ever sales

“Global semiconductor sales increased sharply year-to-year in September, and year-to-date sales through September are more than 20 percent higher than at the same point last year,” said John Neuffer, SIA president and CEO. “The industry posted its highest-ever quarterly sales in Q3, and the global market is poised to reach its highest-ever annual revenue in 2017.”

Regionally, year-to-year and month-to-month sales increased in September across all markets: the Americas (40.7 percent year-to-year/5.9 percent month-to-month), China (19.9 percent/2.5 percent), Europe (19.0 percent/1.8 percent), Asia Pacific/All Other (16.8 percent/1.9 percent), and Japan (11.9 percent/0.5 percent).

“The Americas market continued to stand out, notching its largest year-to-year sales increase in more than seven years,” Neuffer said. “Standouts among semiconductor product categories included memory products like DRAM and NAND flash, both of which posted major year-to-year growth in September, as well as Logic products, which enjoyed double-digit growth year-to-year.”

For the first time, researchers have used a single-step, laser-based method to produce small, precise hybrid microstructures of silver and flexible silicone. This innovative laser processing technology could one day enable smart factories that use one production line to mass-produce customized devices combining soft materials such as engineered tissue with hard materials that add functions such as glucose sensing.

Using a one-step laser fabrication process, researchers created flexible hybrid microwires that conduct electricity. (a) An optical microscope image of the silver (black) and silicone (clear) microwires. (b) Scanning electron microscopy image of the same fabricated structure. Both scale bars are equal to 25 microns. Credit: Mitsuhiro Terakawa, Keio University

Using a one-step laser fabrication process, researchers created flexible hybrid microwires that conduct electricity. (a) An optical microscope image of the silver (black) and silicone (clear) microwires. (b) Scanning electron microscopy image of the same fabricated structure. Both scale bars are equal to 25 microns. Credit: Mitsuhiro Terakawa, Keio University

The metal component of the microstructures renders them electrically conductive while the elastic silicone contributes flexibility. This unique combination of properties makes the structures sensitive to mechanical force and could be useful for making new types of optical and electrical devices.

“These types of microstructures could possibly be used to measure very small movements or changes, such as a slight movement from an insect’s body or the subtle expression produced by a human facial muscle,” said research team leader Mitsuhiro Terakawa from Keio University, Japan. “This information could be used to create perfect computer-generated versions of these movements.”

As detailed in the journal Optical Materials Express, from The Optical Society (OSA), the researchers produced wire-like structures of silver surrounded by a type of silicone known as polydimethylsiloxane (PDMS). The researchers used PDMS because it is flexible and biocompatible, meaning that it is safer to use on or in the body.

They fabricated the structures, which measure as little as 25 microns wide, by irradiating a mixture of PDMS and silver ions with extremely short laser pulses that last just femtoseconds. In one femtosecond, light travels only 300 nanometers, which is just slightly larger than the smallest bacteria.

“We believe we are the first group to use femtosecond laser pulses to create a hybrid material containing PDMS, which is very useful because of its elasticity,” said Terakawa. “The work represents a step towards using a single, precision laser processing technology to fabricate biocompatible devices that combine hard and soft materials.”

Turning two laser processes into one

The one-step fabrication method used to make the hybrid microstructures combines the light-based chemical reactions known as photopolymerization and photoreduction, both of which were induced using femtosecond laser pulses. Photopolymerization uses light to harden a polymer, and photoreduction uses light to form microstructures and nanostructures from metal ions.

The fabrication technique resulted from a collaboration between Terakawa’s research group, which been studying two-photon photoreduction using soft materials, and a group at the German research organization Laser Zentrum Hannover, that has been advancing single-photon photopolymerization of PDMS.

To create the wire microstructures, the researchers irradiated the PDMS-silver mixture with light from femtosecond laser emitting at 522-nm, a wavelength that interacts efficiently with the material mixture. They also carefully selected silver ions that would combine well with PDMS.

The researchers found that just one laser scan formed wires that exhibit both the electrical conductivity of metal and the elasticity of a polymer. Additional scans could be used to produce thicker and more uniform structures. They also showed that the wire structures responded to mechanical force by blowing air over the structures to create a pressure of 3 kilopascal.

The researchers say that, in addition to making wires structures, the approach could be used to make tiny 3D metal-silicone structures. As a next step, they plan to study whether the fabricated wires maintain their structure and properties over time.

“Our work demonstrates that simultaneously inducing photoreduction and photopolymerization is a promising method for fabricating elastic and electrically conductive microstructures,” said Terakawa. “This is one step toward our long-term goal of developing a smart factory for fabricating many human-compatible devices in one production line, whether the materials are soft or hard.”

Silicon has provided enormous benefits to the power electronics industry. But performance of silicon-based power electronics is nearing maximum capacity.

Enter wide bandgap (WBG) semiconductors. Seen as significantly more energy-efficient, they have emerged as leading contenders in developing field-effect transistors (FETs) for next-generation power electronics. Such FET technology would benefit everything from power-grid distribution of renewable-energy sources to car and train engines.

Diamond is largely recognized as the most ideal material in WBG development, owing to its superior physical properties, which allow devices to operate at much higher temperatures, voltages and frequencies, with reduced semiconductor losses.

A main challenge, however, in realizing the full potential of diamond in an important type of FET — namely, metal-oxide-semiconductor field-effect transistors (MOSFETs) — is the ability to increase the hole channel carrier mobility. This mobility, related to the ease with which current flows, is essential for the on-state current of MOSFETs.

Researchers from France, the United Kingdom and Japan incorporate a new approach to solve this problem by using the deep-depletion regime of bulk-boron-doped diamond MOSFETs. The new proof of concept enables the production of simple diamond MOSFET structures from single boron-doped epilayer stacks. This new method, specific to WBG semiconductors, increases the mobility by an order of magnitude. The results are published this week in Applied Physics Letters, from AIP Publishing.

Left: Optical microscope image of the MOSCAPs and diamond deep depletion MOSFETs (D2MOSFETs) of this work. Top right: Scanning electron microscope image of a diamond D2MOSFET under electrical investigation. S: Source, G: Gate, D: Drain. Bottom right: D2MOSFET concept. The on-state of the transistor is ensured thanks to the accumulation or flat band regime. The high mobility channel is the boron-doped diamond epilayer. The off-state is achieved thanks to the deep depletion regime, which is stable only for wide bandgap semiconductors. For a gate voltage larger than a given threshold, the channel is closed because of the deeply and fully depleted layer under the gate. Credit: Institut NÉEL

Left: Optical microscope image of the MOSCAPs and diamond deep depletion MOSFETs (D2MOSFETs) of this work. Top right: Scanning electron microscope image of a diamond D2MOSFET under electrical investigation. S: Source, G: Gate, D: Drain. Bottom right: D2MOSFET concept. The on-state of the transistor is ensured thanks to the accumulation or flat band regime. The high mobility channel is the boron-doped diamond epilayer. The off-state is achieved thanks to the deep depletion regime, which is stable only for wide bandgap semiconductors. For a gate voltage larger than a given threshold, the channel is closed because of the deeply and fully depleted layer under the gate. Credit: Institut NÉEL

In a typical MOSFET structure, an oxide layer and then a metal gate are formed on top of a semiconductor, which in this case is diamond. By applying a voltage to the metal gate, the carrier density, and hence the conductivity, of the diamond region just under the gate, the channel, can be changed dramatically. The ability to use this electric “field-effect” to control the channel conductivity and switch MOSFETS from conducting (on-state) to highly insulating (off-state) drives their use in power control applications. Many of the diamond MOSFETs demonstrated to date rely on a hydrogen-terminated diamond surface to transfer positively charged carriers, known as holes, into the channel. More recently, operation of oxygen terminated diamond MOS structures in an inversion regime, similar to the common mode of operation of silicon MOSFETS, has been demonstrated. The on-state current of a MOSFET is strongly dependent on the channel mobility and in many of these MOSFET designs, the mobility is sensitive to roughness and defect states at the oxide diamond interface where unwanted carrier scattering occurs.

To address this issue, the researchers explored a different mode of operation, the deep-depletion concept. To build their MOSFET, the researchers deposited a layer of aluminum oxide (Al2O3) at 380 degrees Celsius over an oxygen-terminated thick diamond epitaxial layer. They created holes in the diamond layer by incorporating boron atoms into the layer. Boron has one less valence electron than carbon, so including it leaves a missing electron which acts like the addition of a positive charge, or hole. The bulk epilayer functioned as a thick conducting hole channel. The transistor was switched from the on-state to the off-state by application of a voltage which repelled and depleted the holes — the deep depletion region. In silicon-based transistors, this voltage would have also resulted in formation of an inversion layer and the transistor would not have turned off. The authors were able to demonstrate that the unique properties of diamond, and in particular the large band gap, suppressed formation of the inversion layer allowing operation in the deep depletion regime.

“We fabricated a transistor in which the on-state is ensured by the bulk channel conduction through the boron-doped diamond epilayer,” said Julien Pernot, a researcher at the NEEL Institute in France and an author of the paper. “The off-state is ensured by the thick insulating layer induced by the deep-depletion regime. Our proof of concept paves the way in fully exploiting the potential of diamond for MOSFET applications.” The researchers plan to produce these structures through their new startup called DiamFab.

Pernot observed that similar principles of this work could apply to other WBG semiconductors. “Boron is the doping solution for diamond,” Pernot said, “but other dopant impurities would likely be suitable to enable other wide bandgap semiconductors to reach a stable deep-depletion regime.”

Synopsys, Inc. (NASDAQ: SNPS) today announced that SiFive, the first fabless provider of customized, open-source-enabled semiconductors, has selected the Synopsys Verification Continuum platform as its verification solution. SiFive has deployed the Verification Continuum platform for simulation, verification IP, debug, static verification and formal coverage closure. Synopsys’ leadership position in these critical verification technology areas, combined with native integrations among these products, has enabled SiFive to meet aggressive goals for scalable verification of customized RISC-V processors and SoCs targeted for internet of things (IoT), edge computing, machine learning, storage and other applications.

“SiFive was founded by the creators of the free and open RISC-V architecture with an innovative approach that brings the power of open source, agile hardware design and verification to the semiconductor industry,” said Renxin Xia, vice president of engineering at SiFive. “In Synopsys, we found an innovative partner with leading verification technologies that provide our team with the productivity and flexibility required to deliver our customized processor IP and silicon solutions.”

With the exponential growth of verification complexity, achieving verification closure requires a broad set of technologies including advanced simulation, verification IP, advanced debug, static and formal verification, low-power verification and coverage closure. To address this substantial complexity, Synopsys continues to have the largest R&D investment in verification spanning the entire verification flow. This includes industry-leading VCS® simulation, VC verification IP, Verdi® advanced debug, SpyGlass® RTL signoff solutions as well as next-generation VC Formal™verification solutions. The native integration of these solutions further enables design teams to achieve faster performance, lower power and higher productivity for accelerated verification closure.

“Synopsys is addressing the need for faster time-to-market with our leading portfolio of verification software technologies,” said Ajay Singh, senior vice president of R&D in the Synopsys Verification Group. “Our collaboration with SiFive demonstrates the performance benefits of our Verification Continuum platform required for their RISC-V processors and custom SoCs.”

The 2017 GLOBALFOUNDRIES Technology Conference (GTC) was held today in Shanghai, with GF executives, customers, partners and leaders in the Chinese semiconductor industry gathering to discuss the technologies that will enable a new era of connected intelligence. At the event, GF senior executives shed light on the company’s technologies, design solutions, and manufacturing services. The company also highlighted growing momentum around its differentiated 22FDX® technology, including customer adoption by several leading Chinese chip designers.

Mike Cadigan, GF’s senior vice president for global sales and business development, delivered a keynote speech, emphasizing GF’s expectations to become a strong leader in the Chinese semiconductor market. “Along with the rapid growth of customers, markets and applications in this region of the world, we are also continuously developing new technologies for enabling connected intelligence,” Cadigan said. “China is definitely one of our most important markets, and we will keep bringing advanced and differentiated technologies here to help our customers grow and succeed.”

At the event, GF revealed three Chinese customers that will be adopting its new 22FDX technology for next-generation wireless, battery-powered applications. Shanghai Fudan Microelectronics Group will adopt the 22FDX platform to design and develop highly reliable servers, AI and smart IoT intelligent products in 2018. Rockchip will apply 22FDX technology in the design of ultra-low power WiFi smart hardware SoC and high-performance AI processers. Hunan Goke Microelectronics is planning to adopt 22FDX in its next generation of IoT chips.

China is a key region for GF’s future growth plans. The company is building an advanced 300mm semiconductor fab in Chengdu, where a “truss-hoisting” ceremony was recently held to commemorate a major milestone in the construction of the facility, which will be called Fab 11. The construction of the fab is progressing at a fast pace and is on track to be completed in early 2018.

The company is also working closely with the Chengdu municipality to expand the FD-SOI ecosystem, with an investment of more than $100 million to make Chengdu a center of excellence for FDX IC design and IP development. Several leading semiconductor companies have already committed to supporting the ecosystem initiative, including Invecas, GF’s advanced IP development partner. Invecas has established a strong presence in China, including a recently expanded engineering team in Shanghai and Shenzhen and a commitment to set up an R&D center in Chengdu to develop and support advanced IP and designs for FD-SOI systems.

Graphene – a one-atom-thick layer of the stuff in pencils – is a better conductor than copper and is very promising for electronic devices, but with one catch: Electrons that move through it can’t be stopped.

Until now, that is. Scientists at Rutgers University-New Brunswick have learned how to tame the unruly electrons in graphene, paving the way for the ultra-fast transport of electrons with low loss of energy in novel systems. Their study was published online in Nature Nanotechnology.

“This shows we can electrically control the electrons in graphene,” said Eva Y. Andrei, Board of Governors professor in Rutgers’ Department of Physics and Astronomy in the School of Arts and Sciences and the study’s senior author. “In the past, we couldn’t do it. This is the reason people thought that one could not make devices like transistors that require switching with graphene, because their electrons run wild.”

Now it may become possible to realize a graphene nano-scale transistor, Andrei said. Thus far, graphene electronics components include ultra-fast amplifiers, supercapacitors and ultra-low resistivity wires. The addition of a graphene transistor would be an important step towards an all-graphene electronics platform. Other graphene-based applications include ultra-sensitive chemical and biological sensors, filters for desalination and water purification. Graphene is also being developed in flat flexible screens, and paintable and printable electronic circuits.

Graphene is a nano-thin layer of the carbon-based graphite that pencils write with. It is far stronger than steel and a great conductor. But when electrons move through it, they do so in straight lines and their high velocity does not change. “If they hit a barrier, they can’t turn back, so they have to go through it,” Andrei said. “People have been looking at how to control or tame these electrons.”

Her team managed to tame these wild electrons by sending voltage through a high-tech microscope with an extremely sharp tip, also the size of one atom. They created what resembles an optical system by sending voltage through a scanning tunneling microscope, which offers 3-D views of surfaces at the atomic scale. The microscope’s sharp tip creates a force field that traps electrons in graphene or modifies their trajectories, similar to the effect a lens has on light rays. Electrons can easily be trapped and released, providing an efficient on-off switching mechanism, according to Andrei.

“You can trap electrons without making holes in the graphene,” she said. “If you change the voltage, you can release the electrons. So you can catch them and let them go at will.”

The next step would be to scale up by putting extremely thin wires, called nanowires, on top of graphene and controlling the electrons with voltages, she said.

North America-based manufacturers of semiconductor equipment posted $2.03 billion in billings worldwide in September 2017 (three-month average basis), according to the September Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI.

SEMI reports that the three-month average of worldwide billings of North American equipment manufacturers in September 2017 was $2.03 billion.The billings figure is 6.9 percent lower than the final August 2017 level of $2.18 billion, and is 36.0 percent higher than the September 2016 billings level of $1.49 billion.

“Global semiconductor equipment billings of North American headquartered suppliers for September were $2.0 billion, down 12 percent from the peak level set in June of this year,” said Ajit Manocha, president and CEO of SEMI. “Total billings through the first three quarters of this amazing year have surpassed total billings for all of 2016.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)
Year-Over-Year
April 2017
$2,136.4
46.3%
May 2017
$2,270.5
41.8%
June 2017
$2,300.3
34.1%
July 2017
$2,269.7
32.9%
August 2017 (final)
$2,181.8
27.7%
September 2017 (prelim)
$2,031.1
36.0%

Source: SEMI (www.semi.org), October 2017
SEMI publishes a monthly North American Billings report and issues the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ). The WWSEMS report currently reports billings by 24 equipment segments and by seven end market regions.

Microsemi Corporation (Nasdaq: MSCC), a provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced the company’s new Mi-V™ ecosystem with industry leaders, to increase adoption of its RISC-V soft central processing unit (CPU) product family. The announcement comes as the company also introduces Mi-V RV32IMA and additional field programmable gate array (FPGA)-based soft CPU solutions ideally suited for designs utilizing RISC-V open instruction set architectures (ISAs).

“As a leader in RISC-V, we are pleased Microsemi is the first tier one vendor to build out a complete open RISC-V ecosystem, which not only supports our needs, but contributes to the entire development community,” said Jim Aralis, chief technology officer and vice president of advanced development at Microsemi. “Customers can now select RISC-V for their new designs knowing a tier one vendor committed to the success of this technology is providing all the necessary tools to confidently use RISC-V soft CPUs in their products.”

RISC-V, an ISA which is a standard open architecture under the governance of the RISC-V Foundation, offers numerous benefits, including portability as well as enabling the open source community to test and improve cores at a faster pace than closed ISAs. As the RISC-V intellectual property (IP) core is not encrypted, it can be used to ensure trust and certifications not possible with closed architectures. Microsemi’s new Mi-V ecosystem brings together a number of industry leaders involved in the development of RISC-V to leverage their capabilities and streamline RISC-V designs for customers.

“Micrium is pleased to join Microsemi’s Mi-V ecosystem with our highly dependable µC/OS-II real-time kernel, a full-featured embedded operating system,” said Jean Labrosse, co-founder and chief architect at Micrium. “As RISC-V continues to grow in popularity, we look forward to working closely with Microsemi to support accelerated adoption of its RISC-V soft CPU product offerings as well as the entire ecosystem’s RISC-V advancements.”

Microsemi’s Mi-V ecosystem, part of Microsemi’s Accelerate Ecosystem, contains a number of components. Design tools include Microsemi’s SoftConsole Eclipse-based integrated development environment (IDE), the firmware catalog and Libero PolarFire system-on-chip (SoC). Operating systems include Express Logic’s ThreadX, Huawei LiteOS and Micrium µC/OS-II. Boards include the RTG4™ development kit, IGLOO™2 RISC-V board from Future Electronics, PolarFire Evaluation Kit and more. Debug dongles from Microsemi and Olimex, first-stage bootloaders and numerous soft peripherals are also included. Example projects, drivers and firmware are all available on GitHub, the world’s largest repository of open source software.

Deployment of soft CPUs implemented with the R11C-V ISA is automatic and delivered to the user’s desktop via Microsemi’s IP Catalog. No end user license agreements are needed to gain access to the soft CPUs. Using RISC-V soft CPUs within the Mi-V ecosystem is simple, easy and free.

“Express Logic is pleased to be a foundational part of Microsemi’s Mi-V RISC-V ecosystem,” said William E. Lamie, President, Express Logic. “Our X-Ware Internet-of-Things (IoT) platform, including the industry-leading ThreadX RTOS with over 6.2 billion deployments, is the preferred embedded software platform for all designs requiring industrial-grade run-time solutions—making us an ideal fit for this new consortium.”

Offering low power and an open architecture, Microsemi’s PolarFire™, RTG4™, SmartFusion™2 and IGLOO™2 field programmable gate array (FPGA)-based RISC-V soft CPU cores are ideal for developing a wide variety of applications within the aerospace and defense, industrial and security markets. The Mi-V soft CPU cores make them particularly suitable for applications including guided munitions, IoT, secure communications and wireline bridging.

“The open source, royalty-free RISC-V instruction set creates a new business model for CPU designers that is garnering increasing interest and support,” said Linley Gwennap, principal analyst with The Linley Group, which named the RISC-V ISA “Best Technology of 2016” at its annual Analysts’ Choice Awards in January 2017. “By introducing the RV32IM CPU core with support from the Mi-V ecosystem, Microsemi will play an important role in boosting the adoption of RISC-V.”

Through Microsemi’s early involvement in the creation of the RISC-V Foundation, the company has an established leadership role in the emerging standard and ecosystem and is working closely with the nonprofit to ensure the ISA becomes an industry standard for a wide variety of computing devices. Ted Speers, head of product architecture and planning for Microsemi’s Programmable business unit, was appointed to the inaugural board of directors of the RISC-V Foundation in July 2016, and Ted Marena, director of SoC FPGA marketing, was recently sworn in as chair of the RISC-V Marketing Committee after serving as vice-chair since August 2016. Marena will also be the featured speaker at EE World Online’s upcoming webinar titled, “The RISC-V ecosystem is ready for prime time. Get started here!” on Oct. 25, 2017. Attendees can register online to join this event.

The Mi-V Ecosystem began as part of the Microsemi Accelerate Ecosystem, a program designed to reduce time to market for end customers and time to revenue for ecosystem participants. Microsemi’s Accelerate Ecosystem brings together leading silicon, intellectual property (IP), systems, software and design experts to deliver solutions for end customers.