Category Archives: Wafer Processing

Worldwide silicon wafer area shipments increased during the second quarter 2017 when compared to first quarter 2017 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its quarterly analysis of the silicon wafer industry.

Total silicon wafer area shipments were 2,978 million square inches during the most recent quarter, a 4.2 percent increase from the 2,858 million square inches shipped during the previous quarter. New quarterly total area shipments are 10.1 percent higher than second quarter 2016 shipments and are at their highest recorded quarterly level.

“For the fifth consecutive quarter, global silicon wafer volume shipments have shipped at record levels,” said Chungwei (C.W.) Lee (李崇偉), chairman of SEMI SMG and spokesman, VP, Corporate Development and chief auditor of GlobalWafers (環球晶圓). “These record levels are being driven by both 200mm and 300mm shipments.”

Silicon* Area Shipment Trends

Source: SEMI, (www.semi.org), July 2017

 

Millions of Square Inches
 

1Q2016

2Q2016

3Q2016

4Q2016

1Q2017

2Q2017

Total

2,538

2,706

2,730

2,764

2,858

2,978
*Semiconductor applications only

 

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

The Silicon Manufacturers Group acts as an independent special interest group within the SEMI structure and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi, etc.). The purpose of the group is to facilitate collective efforts on issues related to the silicon industry including the development of market information and statistics about the silicon industry and the semiconductor market.

 

In its upcoming Mid-Year Update to The McClean Report 2017 (to be released later this week), IC Insights addresses the changing landscape for semiconductor industry mergers and acquisitions.

The historic flood of merger and acquisition agreements that swept through the semiconductor industry in the past two years slowed to a trickle in the first half of 2017, with the combined value of about a dozen transactions announced in 1H17 reaching just $1.4 billion.

In the first halves of 2016 and the record-high M&A year of 2015, the combined value of acquisition agreements in 1H16 and 1H15 totaled $4.6 billion and $72.6 billion, respectively (Figure 1).  Last year, M&A got off to a slow start—compared to the record-breaking pace in 1H15—but several large transactions announced in 3Q16 pushed the 2016 total value in semiconductor acquisitions to nearly $100 billion and within striking distance of the all-time high of $107.3 billion set in 2015.  A few major semiconductor acquisitions were pending or rumored to be in the works during July 2017, but it is unlikely that a 2H17 surge in purchase agreements will bring this year’s M&A total value anywhere close to those of 2016 and 2015.

The big difference between semiconductor M&A activity in 2017 and the prior two years has been the lack of megadeals.  Thus far, only one transaction in 2017 has topped a half billion dollars (MaxLinear’s $687 million cash acquisition of analog and mixed-signal IC supplier Exar announced in March 2017 and completed in May).  There were seven announced acquisitions with values of more than $1 billion in 2016 (three of which were over $10 billion) and 10 in 2015 (four of which were over $10 billion).  IC Insights’ M&A list only covers semiconductor suppliers and excludes acquisitions of software and systems businesses by IC companies (e.g., Intel’s planned $15.3 billion purchase of Mobileye, an Israeli-based provider of digital imaging technology for autonomous vehicles, announced in March 2017).

The 250+ page Mid-Year Update to the 2017 edition of The McClean Report further describes IC Insights’ updated forecasts for the 2017-2021 timeperiod.

Figure 1

Figure 1

Veeco Instruments Inc. (NASDAQ: VECO) announced today that CrayoNano AS, research company for ultraviolet short wavelength light emitting diodes (UV-C LEDs), has ordered the Propel Power Gallium Nitride (GaN) Metal Organic Chemical Vapor Deposition (MOCVD) System. CrayoNano will use the system to grow semiconductor nanowires on graphene for water disinfection, air purification, food processing and life science applications.

UV-C LEDs are free of harmful mercury compared to typically 20-200 milligrams of mercury found in traditional UV lamps used in these applications. They also require minimal energy to operate and have longer life cycles compared to other purification and disinfection lighting methods. The value of the global market for UV-C LEDs used in sterilization and purification equipment is growing at a CAGR of 56% from US$28 million in 2016 to US$257 million in 2021, according to the 2016~2021 UV LED and IR LED Application Market Report by LEDinside, a division of TrendForce.

“We see enormous opportunity in our focused markets and we need superior MOCVD technology to accomplish our goals,” said Mr. Morten Froseth, Chief Executive Officer, CrayoNano. “Veeco’s Propel system offers us the unique opportunity to scale to 200 mm graphene wafer sizes while maintaining superior uniformity, low manufacturing costs and long run campaigns.”

Veeco’s Propel Power GaN MOCVD system is capable of processing single 200 mm wafers or smaller (e.g., two-inch) in batch mode. The system is based on Veeco’s TurboDisc® technology including the IsoFlange™ and SymmHeat™ breakthrough technologies, which provide homogeneous laminar flow and uniform temperature profile across each wafer, up to 200 mm in size.

“The Propel Power GaN system is the best choice to deposit advanced GaN-based structures, including complex semiconductor nanowires on graphene substrates with strict process demands,” said Peo Hansson, Ph.D., Veeco’s Senior Vice President, General Manager, MOCVD. “Our Propel system offers industry leading uniformity and process cycle time, therefore providing superior productivity compared to other technologies. As a global supplier of MOCVD systems, we look forward to supporting CrayoNano and their research activities.”

Conventional electronic devices make use of semiconductor circuits and they transmit information by electric charges. However, such devices are being pushed to their physical limit and the technology is facing immense challenges to meet the increasing demand for speed and further miniaturisation. Spin wave based devices, which utilise collective excitations of electronic spins in magnetic materials as a carrier of information, have huge potential as memory devices that are more energy efficient, faster, and higher in capacity.

While spin wave based devices are one of the most promising alternatives to current semiconductor technology, spin wave signal propagation is anisotropic in nature – its properties vary in different directions – thus posing challenges for practical industrial applications of such devices.

A research team led by Professor Adekunle Adeyeye from the Department of Electrical and Computer Engineering at the NUS Faculty of Engineering, has recently achieved a significant breakthrough in spin wave information processing technology. His team has successfully developed a novel method for the simultaneous propagation of spin wave signals in multiple directions at the same frequency, without the need for any external magnetic field.

Using a novel structure comprising different layers of magnetic materials to generate spin wave signals, this approach allows for ultra-low power operations, making it suitable for device integration as well as energy-efficient operation at room temperature.

“The ability to propagate spin waves signal in arbitrary directions is a key requirement for actual circuitry implementation. Hence, the implication of our invention is far-reaching and addresses a key challenge for the industrial application of spin wave technology. This will pave the way for non-charge based information processing and realisation of such devices,” said Dr Arabinda Haldar, who is the first author of the study and was formerly a Research Fellow with the Department at NUS. Dr Haldar is currently an Assistant Professor at Indian Institute of Technology Hyderabad.

The research team published the findings of their study in the scientific journal Science Advances on 21 July 2017. This discovery builds on an earlier study by the team that was published in Nature Nanotechnology in 2016, in which a novel device that could transmit and manipulate spin wave signals without the need for any external magnetic field or current was developed. The research team has filed patents for these two inventions.

“Collectively, both discoveries would make possible the on-demand control of spin waves, as well as the local manipulation of information and reprogramming of magnetic circuits, thus enabling the implementation of spin wave based computing and coherent processing of data,” said Prof Adeyeye.

Moving forward, the team is exploring the use of novel magnetic materials to enable coherent long distance spin wave signal transmission, so as to further the applications of spin wave technology.

Advances in semiconductor and related devices are driving significant progress in our increasingly digital world, and the place to learn about cutting-edge research in the field is the annual IEEE International Electron Devices Meeting (IEDM), to be held December 2-6, 2017 at the Hilton San Francisco Union Square hotel. Highlights for 2017 include:

  • A talk on transformative electronics by Dr. Hiroshi Amano, who received the 2014 Nobel Prize in Physics along with Isamu Akasaki and Shuji Nakamura for the invention of efficient blue LEDs, which sparked a revolution in innovative, energy-saving lighting.
  • The above talk is part of an exceptional slate of plenary talks to be given by some of the industry’s leading figures. IEDM plenary presenters include the CEO of Advanced Micro Devices, Inc.; the research chief of TSMC, which is the industry’s largest foundry driving technology forward; a leading academic authority on energy-efficient computing, which is a key societal goal; as well as Dr. Amano’s fourth, additional plenary talk. It will be given on Wednesday, Dec. 6.
  • Focus Sessions will be held on the following topics: 3D Integration and Packaging; Modeling Challenges for Neuromorphic Computing; Nanosensors for Disease Diagnostics; and Silicon Photonics: Current status and perspectives.
  • A vendor exhibition will be held again, based on the success of last year’s first-ever such event at the IEDM.
  • The IEEE Magnetics Society will host a poster session on MRAM (magnetic RAM memories).

The IEDM paper submission deadline this year is August 2 and the deadline for late-news papers is September 11. Only a limited number of late-news papers will be accepted.

Each year at the IEDM, the world’s best technologists in micro/nano/bioelectronics converge to participate in a technical program consisting of more than 220 presentations along with special luncheon talks and a variety of panels, special sessions, tutorials, Short Courses, IEEE/EDS award presentations and other events that highlight leading work in more diverse areas of the field than any other conference.

“This year’s IEDM will feature talks, courses and panels by world experts on what is perhaps the broadest array of topics in recent memory,” said Dr. Barbara De Salvo, Scientific Director at Leti. “The unique technical program can lead one to view the IEDM as a crystal ball of sorts, because many of the developments reported at the conference invariably make their way into commercial products a few years down the road. As an example, this year’s IEDM conference marks 10 years since the industry transition from aluminum to copper interconnect began in earnest.”

Here are details of some of the events that will take place at this year’s IEDM:

Focus Sessions

  • 3D Integration and Packaging – Packaging technology is taking on an increasingly important role in semiconductor manufacturing, and this session will provide an industry perspective on forthcoming approaches ranging from “Simpler is better” to “Advanced packaging saves the day for continued scaling.” The session will address the latest in 3D, from alternative packaging to 3D stacking, and applications and technologies for Integrated Power Microelectronics.
  • Modeling Challenges for Neuromorphic Computing – This session will address the opportunities and challenges of efficient synaptic processes, from learning models to device-circuit implementations of neuromorphic architectures.  Half of the session will discuss learning models in stochastic processes, with the other half devoted to RRAM (resistive RAM) memory for deep neural networks and neuromorphic computing.
  • Nanosensors for Disease Diagnostics — From microfluidics to nanosensing, this session will review the latest advances for the detection of diseases such as cancer, sepsis and diabetes, using biomarkers ranging from (bio)molecules and individual cells to in-vitro tissue models.
  • Silicon Photonics: Current Status and Perspectives – This session addresses the state-of-the-art in silicon photonics technology, ranging from topics on high-volume manufacturing, optical transceivers and interconnects, to femto-joule per bit integrated nanophotonics for upcoming market applications in optical computing.

90-Minute Tutorials – Saturday, Dec. 2
A program of 90-minute tutorial sessions on emerging technologies will be presented by experts in the fields, bridging the gap between textbook-level knowledge and leading-edge current research. Advance registration is recommended.

  • The Evolution of Logic Transistors Toward Low Power and High Performance IoT Applications, Dr. Dae Won Ha, Samsung Electronics
  • Negative Capacitance Transistors, Prof. Sayeef Salahuddin, UC Berkeley
  • Fundamental, Thermal, and Energy Limits of PCM and ReRAM, Prof. Eric Pop, Stanford University
  • Hardware Opportunities in Cognitive Computing: Near- and Far-Term, Dr. Geoffrey Burr, Principal Research Staff Member, IBM Research-Almaden
  • 2.5D Interposers and High-Density Fanout Packaging as Enablers for Future Systems Integration, Dr. Sundaram Venkatesh, Associate Director, Georgia Tech 3D Systems Packaging Research Center
  • Silicon Photonics for Next-Generation Optical Interconnects, Dr. Joris Van Campenhout, Program Director Optical I/O, IMEC

Short Courses – Sunday, Dec. 3
Short Courses provide the opportunity to learn about important areas and developments, and provide the opportunity to network with experts from around the world. Advance registration is recommended.

  • Performance Boosters and Variation Management in Sub-5nm CMOS, organized by Sandy Liao, Intel
  • Merged Memory-Logic Technologies and Their Applications, organized by Kevin Zhang, TSMC

Plenary Presentations – Monday, Dec. 4

  • System Scaling Innovation for Intelligent Ubiquitous Computing, Jack Sun, VP of R&D, TSMC
  • Driving the Future of High-Performance Computing, Lisa Su, President & CEO, AMD
  • Energy-Efficient Computing and Sensing: From Silicon to the Cloud, Adrian Ionescu, Professor, EPFL

Plenary Presentation – Wednesday, Dec. 6

  • Development of a Sustainable Smart Society by Transformative Electronics, Hiroshi Amano, Professor, Nagoya University

Evening Panel Session – Tuesday evening, Dec. 5
The IEDM offers attendees an evening session where panels of experts give their views on important industry topics. Audience participation is encouraged to foster an open and vigorous exchange of ideas.

  • Who Will Lead the Industry in the Future? Moderator: Prof. Philip Wong, Stanford University

Entrepreneurs Lunch
The topic and speaker are yet to be determined, but this popular luncheon jointly sponsored by IEDM and the IEEE Electron Devices Society will be held once again.

Further information about IEDM
For registration and other information, visit www.ieee-iedm.org.

SUNY Polytechnic Institute (SUNY Poly) announced today that Interim Dean of Graduate Studies Dr. Fatemeh (Shadi) Shahedipour-Sandvik and her team of collaborators have been selected to receive $720,000 in federal funding from the U.S. Department of Energy’s Advanced Research Projects Agency-Energy (ARPA-E). The grant will be used to develop more efficient and powerful high-performance power switches at SUNY Poly for power electronics applications, such as for enabling a more efficient energy grid, for example. The research is in partnership with Dr. Woongje Sung of SUNY Poly, the Army Research Lab, Drexel University, and Gyrotron Technology, Inc.

“On behalf of SUNY Poly, I am excited to congratulate Professor Shahedipour-Sandvik as her wide-bandgap-focused research is recognized by the Department of Energy for its potential to improve power devices that are all around us to make our technological world more energy efficient and robust,” said SUNY Poly Interim President Dr. Bahgat Sammakia. “This award highlights SUNY Poly’s unique and advanced research capabilities, as well as its superb faculty who are developing the innovations of tomorrow right now in New York State.”

“This award is a strong indicator of how SUNY Poly’s resources and facilities are enabling the types of research that have the potential to improve power electronics devices which have become ubiquitous, from those utilized to make the power grid more efficient, to those that can improve electric car capabilities,” said SUNY Poly Vice President of Research Dr. Michael Liehr.

“I am proud that the U.S. Department of Energy’s ARPA-E has recognized our leading-edge power electronics-focused research, which holds the incredible potential to drive innovation for practical applications that could lead to worldwide energy savings. Advanced power electronic devices offer significant advances in power density, efficiency, and reduced total lifecycle cost,” said Prof. Shahedipour-Sandvik. “This grant allowing our SUNY Poly team and partners at the Army Research Lab, Drexel University and Gyrotron Technology, Inc. to explore advanced doping and annealing techniques for gallium nitride-based power devices is a testament to how SUNY Poly’s resources and leadership in areas like power electronics can help power the future in exciting and meaningful ways.” 

The SUNY Poly grant is part of a total of $6.9 million in funding that the U.S. Department of Energy ARPA-E is providing through its Power Nitride Doping Innovation Offers Devices Enabling SWITCHES (PNDIODES) program to seven institutions and organizations. With PNDIODES, ARPA-E is tackling a specific challenge in wide-bandgap semiconductor production. Wide-bandgap semiconductors are an important area of research because the materials, such as gallium nitride (GaN), allow for electronic devices to operate at higher temperatures and/or frequencies, for example, than current silicon-based computer chips, which is why technical advances in power electronics promise energy efficiency gains throughout the United States economy. Achieving high power conversion efficiency in these systems, however, requires low-loss power semiconductor switches. Power converters based on GaN could potentially meet the challenge by enabling higher voltage devices with improved efficiency—while also dramatically reducing size and weight of the device, for example.

The PNDIODES-funded research focuses on a process called selective area doping, in which a specific impurity is added to a semiconductor to change its electrical properties and achieve performance characteristics that are useful for electronics. Implemented well, this process can allow for the fabrication of devices at a competitive cost compared to their traditional, silicon-based counterparts. Developing a reliable and usable doping process that can be applied to specific regions of GaN and its alloys is an important obstacle in the fabrication of GaN-based power electronics devices that PNDIODES seeks to overcome. Ultimately, the PNDIODES project teams, including the Shahedipour-Sandvik team and Dr. Sung at SUNY Poly as well as the institution’s partners, will develop new ways to build semiconductors for high performance, high-powered applications like aerospace, electric vehicles, and the grid.

Prof. Shahedipour-Sandkvik team’s research, “Demonstration of PN-junctions by ion implantation techniques for GaN (DOPING-GaN),” will focus on ion implantation as the centerpiece of its approach and use new annealing techniques to develop processes to activate implanted silicon or magnesium in GaN to build p-n junctions, which are used to control the flow of electrons within an integrated circuit. Utilizing a unique technique with a gyrotron beam, a high-power vacuum tube that generates millimeter-wave electromagnetic waves, the team’s research aims to understand the impact of implantation on the microstructural properties of the GaN material and its effects on p-n diode performance.

In addition to this GaN-focused research being conducted by Prof. Shahedipour and her team at SUNY Poly, which also provides hands-on research opportunities for a number of the institution’s students, SUNY Poly and General Electric also lead the New York Power Electronics Manufacturing Consortium (NY-PEMC) with the goal of developing and producing low cost, high performance 6″ silicon carbide (SiC) wafers for power electronics applications. The consortium announced its first successful production of SiC-based patterned wafers in February at the Albany NanoTech Complex’s 150mm SiC line, with production coordinated with SUNY Poly’s Computer Chip Commercialization Center (Quad-C), located at its Utica campus where the SiC-based power chips will be packaged, a process that combines them with a housing that allows for interconnection with an application.

The semiconductor market in China continues to grow at a staggering speed. The current backbone of the electronics and telecom industry in China, semiconductor companies in China are driving innovation with new trends like spending on wafer fab equipment. China’s semiconductor consumption and overall semiconductor manufacturing has also seen rapid growth over the recent years. BizVibe predicts that China will overtake the US to become the leader in the global semiconductor market within the next five years.

BizVibe_Predicts_-_China_Will_Dominate_the_Global_Semiconductor_Market_in_the_Next_5_Years

BizVibe is home to over 55,000 Electronics & Telecoms companies around the world, including many in China. In a recent article titled China Sets to Dominate the Global Semiconductor Market, BizVibe closely examines what is driving growth for the semiconductor market in China.

BizVibe notes that, over the last ten years, both China’s semiconductor consumption and production revenues increased at a greater rate than worldwide revenues. From 2005 through 2015, China’s semiconductor industry grew at a ten-year compounded annual growth rate (CAGR) of 18.7%, while its semiconductor consumption grew at a rate of 14.3%, compared to the worldwide semiconductor market, which grew at a 4% CAGR.

One of the main reasons behind China’s growing semiconductor sector is attributed to the country’s rising wafer fab equipment spending trends over the last decade. Although China is expected to play an increasingly influential role in the global semiconductor market over the next few years, government incentives and market conditions still need improvement to allow for the further reduction in the consumption/production gap and long-range moderate growth.

The American Institute for Manufacturing Integrated Photonics (AIM Photonics), a public-private partnership advancing the nation’s photonics manufacturing capabilities, announced Mentor, a Siemens Business and global EDA leader, as the newest Tier 1 member of AIM Photonics. Mentor brings its expertise in Electronic Photonics Design Automation (EPDA), a critical design technology enabler for AIM Photonics’ Process Design Kit (PDK) and Multi Project Wafer (MPW).

Mentor’s software and hardware design solutions enable companies to develop better electronic products faster and more cost-effectively.  These solutions will help engineers in AIM Photonics and member companies overcome design challenges in the increasingly complex world of board and chip design, especially as it relates to integrated silicon photonics.

“AIM Photonics has built an integrated photonics design solution package that is second to none, mainly due to the membership of global electronic design leaders like Mentor,”  said  Dr. Michael Liehr, CEO of AIM Photonics. “Their expertise in functional verification, design for test, and PCB design are a plus for our new Test, Assembly, and Packaging (TAP) facility now under construction.”

“Mentor’s goal in joining AIM is to unify the electronic and photonic design processes so that custom IC designers can be successful with their photonic IC designs,” said Robert Hum, vice president, Deep Sub Micron Division at Mentor. “We are enhancing our Pyxis®-based custom design flow to achieve this goal. The photonic design flow also includes Eldo®, Questa® ADMS and Calibre® for verification.”

Since fall of 2016 AIM Photonics has released a number of versions and updates to its PDK, in support of its MPW program and third call for proposals. Mentor also recently presented on PIC Design for AIM MPW at the AIM Photonics Proposer event in Rochester, NY. Since then, numerous commercial, government, and university organizations have signed up to participate in the PDK and MPW programs.

In a recent announcement, Mentor provided details on a new integration with PhoeniX Software, also an AIM Photonics EPDA Member, that reduces tape-out time for integrated photonics designers by enabling faster iterations between final sign-off verification and the design tool. Designers using the new integration will be able to more quickly identify and correct layout issues to ensure their designs comply with manufacturing requirements.

“The exceptional response to our PDK and MPW offerings is a testament to what Mentor brings to AIM Photonics’ EPDA program,” said Brett Attaway, AIM Photonics EPDA Executive Director.  “The fantastic synergy between AIM’s EPDA members has been instrumental in bringing new integrated photonic design solutions to the market quickly.”

 

Durcan_Mark_2400x3000_1_smlThe Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, announced Mark Durcan, former CEO of Micron Technology, Inc., and a longtime leader in advancing semiconductor technology, has been named the 2017 recipient of SIA’s highest honor, the Robert N. Noyce Award. SIA presents the Noyce Award annually in recognition of a leader who has made outstanding contributions to the semiconductor industry in technology or public policy. Durcan, who retired as Micron CEO on May 8, 2017, will accept the award at the SIA Annual Award Dinner on Tuesday, Nov. 14, 2017 in San Jose, an event that will also commemorate SIA’s 40th anniversary.

“Throughout his impressive career, Mark Durcan has demonstrated the best the semiconductor industry has to offer: hard work, ingenuity, and a relentless focus on promoting innovation,” said John Neuffer, president and CEO, Semiconductor Industry Association. “From his engineering roots to his recent work leading one of the world’s top manufacturers of memory products, Mark has strengthened our industry, advanced semiconductor technology, and reinforced America’s leadership of the global semiconductor market. On behalf of the SIA board of directors, it is a pleasure to announce Mark’s selection as the 2017 Robert N. Noyce Award recipient in honor of his outstanding accomplishments.”

A 30-year company veteran, Durcan rose from his first role as a Process Integration Engineer to Chief Technical Officer, President, and, ultimately, CEO in 2012. A key technical decision maker in bringing Micron’s next-generation technologies to market, Durcan expanded Micron’s global presence and enhanced its capabilities with strategic acquisitions, including Elpida (2012) and Rexchip (2012) and Inotera Memories, Inc. (2016). He also forged long-lasting partnerships with industry leaders such as Intel.

Durcan served as Chairman of the Micron Technology Foundation, Inc., which was formed to advance STEM education and support civic and charitable institutions in the communities in which Micron has facilities. He also currently serves on the board of directors for AmerisourceBergen Corp. and St. Luke’s Health System, a non-profit hospital system in Idaho. Durcan earned both bachelor’s and master’s degrees in chemical engineering from Rice University.

“It is a true honor to be selected for this award, and to join the ranks of its distinguished recipients, who are industry pioneers and icons,” said Durcan. “Nothing that I have accomplished during my career would have been possible without the influence of so many innovative and dedicated colleagues at Micron as well as our customers, suppliers, and partners. It is with sincere appreciation for their contributions to our industry that I gratefully accept this award.”

The Noyce Award is named in honor of semiconductor industry pioneer Robert N. Noyce, co-founder of Fairchild Semiconductor and Intel.

The Semiconductor Industry Association (SIA), in consultation with the Semiconductor Research Corporation (SRC), today announced the winners of its 2017 University Research Award: Dr. Gabor C. Temes, professor of electrical and computer engineering at Oregon State University (OSU), and Dr. Sanjay Banerjee, professor of electrical and computer engineering and director of the Microelectronics Research Center at The University of Texas at Austin (UT Austin). Drs. Temes and Banerjee will receive the awards in conjunction with the SIA Annual Award Dinner on Nov. 14, 2017 in San Jose, Calif.

“Research is at the root of all innovation, breathing life into new technologies that have strengthened our industry, spurred economic growth, and improved people’s lives,” said John Neuffer, president and CEO of SIA, which represents U.S. leadership in semiconductor manufacturing, design, and research. “Throughout their careers, Professors Temes and Banerjee have epitomized excellence in scientific research, leading efforts to advance semiconductor technology and strengthen America’s technological leadership. We are pleased to recognize Dr. Temes and Dr. Banerjee for their groundbreaking achievements.”

Neuffer also highlighted the importance of government investments in basic research funded through agencies like the National Science Foundation (NSF) and the National Institute of Standards and Technology (NIST) and applauded recently announced public-private initiatives at the U.S. Department of Energy and the Defense Advanced Research Projects Agency (DARPA) aimed at advancing semiconductor research. He expressed SIA’s readiness to work with the Trump Administration and Congress to ensure enactment of a fiscal year 2018 budget that prioritizes investments in basic research.

“The University Research Award was established to recognize lifetime achievements in semiconductor research by university faculty,” said Ken Hansen, president & CEO of SRC. “Drs. Temes and Banerjee have repeatedly advanced the state-of-the-art semiconductor design and technology in their respective fields. These esteemed professors’ influence on their students has produced new leaders and contributors in the semiconductor industry. The research output from the cooperative universities plays an integral role in next-generation innovations. It is with great appreciation and admiration that the entire SRC team congratulates Dr. Temes and Dr. Banerjee.”

Dr. Temes will receive the honor for excellence in design research. In particular, he will be recognized for contributions in interface electronics, including analog-to-digital and digital-to-analog converters, switched-capacitor filters and amplifiers, and sensor interfaces. Before joining OSU, Dr. Temes held academic positions at the Technical University of Budapest, Stanford University, and UCLA. He also worked in industry at Northern Electric R&D Laboratories (now Bell-Northern Research), as well as at Ampex Corp. Dr. Temes received his undergraduate education at the Technical University and Eotvos University in Budapest, Hungary, and his Ph.D. in electrical engineering from University of Ottawa, Canada.

Dr. Banerjee will receive the award for excellence in technology research. Specifically, he will be honored for contributions in MOS and nanostructure device modeling, Si-Ge-C heterostructure devices, and ultra-shallow junction technology. Before joining the Cockrell School of Engineering at UT Austin, Dr. Banerjee was at Texas Instruments from 1983-1987, where he worked on polysilicon transistors and dynamic random access trench memory cells used by Texas Instruments in the world’s first 4Megabit DRAM. He received his undergraduate degree from the Indian Institute of Technology, Kharagpur, and his M.S. and Ph.D. from the University of Illinois at Urbana-Champaign, all in electrical engineering.