Category Archives: Wafer Processing

SEMI’s Industry Strategy Symposium (ISS) opened yesterday with a theme focused on new industry forces and new markets.  The annual three-day conference of C-level executives gives the year’s first strategic outlook of the global electronics manufacturing industry. Today’s keynote, economic trends, and market perspectives highlighted market and technology opportunities and marked the rising tide for 2017 investments in the semiconductor manufacturing supply chain. While Day 1 brought both insight and optimism to the more than 200 attendees, deeper discussions on technology, applications, regional opportunities, and an expert panel on mergers and acquisitions will be presented on Day 2 and Day 3 of SEMI’s business leader annual kick-off event.

Opening keynoter Gary Patton, CTO and senior VP of worldwide R&D at GLOBALFOUNDRIES, presented a wide-ranging overview of industry growth and opportunities. Referencing Thomas Friedman’s three disruptive trends:  globalization, climate change, and Moore’s Law, Patton showed 2016’s global semiconductor merger and acquisition activity exceeding a staggering $130 billion and China’s rapidly growing IC production which is forecast to reach more than 20 percent of global output in 2020.

Patton identified five areas of semiconductor growth: IoT (Internet of Things), Automotive, 5G (mobile network), AR & VR (Augmented & Virtual Reality), and Artificial Intelligence.  From 2016 to 2025, Patton forecasted that semiconductor IoT content will grow from $15 billion to $62 billion, Automotive will grow from $32 billion to $51 billion, 5G will grow from $0 to $20 billion, AR/VR will grow from $4 billion to $131 billion, and Artificial Intelligence will grow from $5 billion to $50 billion.

For these different growth areas, Patton and GLOBALFOUNDRIES see a variety of solutions, what they’re calling “the right technology for the right application.”  This includes FinFET, FD-SOI, and different technology nodes selected for specific applications.  DTCO (Design-Technology Co-Optimization), and collaboration with not just suppliers, but sub-suppliers, raw materials and components manufacturers were key tools for success with Patton calling for greater cooperation in working within SEMI’s Semiconductor Components, Instruments, and Subsystems (SCIS) Special Interest Group.

In the Economic Trends session, presenters took on macroeconomic trends and detailed industry-specific forecasts:

  • Paul Thomas, Economic Stories, long-time former chief economist at Intel, drilled down on the topic of innovation, productivity, and economic stagnation.  Thomas presented data that showed productivity growth rates are not showing the expected benefits of digitization (computers, etc.).  He discussed possible causes for the discrepancies and gave food for thought on the gaps between perceived and measured productivity gains due to digital innovations.
  • Jim Hines, Gartner, provided a recently upgraded semiconductor and electronics market.  With recent improvements in chip prices, increasing semiconductor content, and inventory replenishment 2016 IC revenue was upgraded from 0.9 percent to 1.5 percent for 2016.  2016 is now forecast to come in at $340 billion.  2017 forecasts were adjusted from 5.5 percent to 7.7 percent.  Areas for strong growth are seen to be non-optical sensors (NOS), memory, opto-electronics and automotive growth (driven by connected vehicles, automated driving, and powertrain electrification).
  • G. Dan Hutcheson, VLSI Research, forecasted semiconductor equipment revenue at $54 billion, up 10 percent in 2016 and an outlook for $58 billion, up 8 percent, in 2017. Hutcheson showed data that the industry bottomed in April 2016 and in July 2016 demand pressure shifted the industry into an upturn.  Shortages in semiconductor supply will continue to drive growth in 2017.  Cloud computing and automotive are hot spots with smartphones in China, PC replacement cycles, DRAM pricing and Flash for SSD providing further positive support.
  • Michael Corbett, Linx Consulting provided an overview of the dynamics for wafer fab materials in the semiconductor industry. Corbett noted that the market for semiconductor materials was $18.5 billion in 2015 with the top 50 suppliers accounting for $17.2 billion or 93 percent of the materials sold.  M&A has been active in materials with recent combination of Dow & DuPont (proposed), Linde and Praxair, and Air Liquide and Airgas.  Corbett identified key trends impacting WFM suppliers including a consolidating customer base while at the same time the industry finds new entrants from China.
  • Matt Gertken, BCA Research provided a more academic geopolitical outlook for 2017.  Looking through the lenses of multipolarity, mercantilism, and dirigisme, Gertken provided context for the changes in progressive and protectionist forces over time.  Showing that globalization increased almost monotonically from 1950 through 2010, it appears to have hit a trade globalization peak where globalization plateaued and, in part, set the stage for Brexit and the unexpected Trump win and related more protectionist sentiment.

The afternoon session focused on Market Perspectives, including consumer, artificial intelligence (AI), Internet of Things (IoT), and automotive.

  • Shawn DuBravac, Consumer Tech Association, gave a summary of CES 2017 which just ended the day before.  DuBravac found three unifying trends at this year’s event:  voice, AI, and connections and computations.  It is anticipated that we are entering the era of faceless computing. The next computer interface is voice – with vocal computing replacing the traditional GUIs for robots and other emerging computing devices.
  • Prasad Sabada, Google, in his presentation on “Cloud and Moore: Disruptors for Semiconductors,” discussed two inflection points.  Tectonics shift #1:  Cloud. Tectonic Shift #2:  No more Moore’s Law.  Sabada sees the industry entering an era of accelerators – application specific devices that may leapfrog up to three Moore’s Law node generations.  Sabada called upon the semiconductor manufacturing industry for the need for speed (launch changes at the speed of software), the need for balanced system integration (innovation across the system), and the need for open innovation and collaboration.
  • Dario Gill, IBM Research, focused on “the new frontiers” of computing.  Gill talked about “Beautiful Ideas.”  He presented two:  Artificial intelligence, a beautiful idea with consensus; and Quantum Computing a beautiful idea (currently) without consensus.  He went on to show the value of artificial intelligence and the complicated and extraordinary potential for Quantum Computing.
  • Mark Bünger, Lux Research, believes the industry needs to rethink sensors, networks, and autonomy in automotive. Bünger forecast that autonomy could proceed much faster than diffusion of other car features because of its massive potential for improving utilization. It is not without disruption, though, as carmakers are worried about “losing the dashboard.”  Bünger provided several visceral examples of autonomous driving scenarios to make the case for AI moving to the IoT edge – and not relying on the Cloud.
  • Andrew Macleod, Mentor Graphics, discussed how automotive electronics are “a non-linear system of systems.”  Macleod pointed out that there have been three waves of recent progress in automotive electronics.  The first wave was globalization in 1984 when VW (and others) moved into the China market and pioneered automotive R&D decentralization and regional customization.  In the second wave came automotive drive electrification with the Toyota Prius in 1997.  The third wave was digitalization and the democratization of automotive.  The car is now becoming a consumer device and needs new design tools to manage the enormous amount of electronics complexity and permutations.

Days 2 and 3 at ISS will delve deeper into the industry ─ technology, manufacturing, public policy, and global forces, including China’s new focus on semiconductor manufacturing ─ with presentations from: AMEC, Applied Materials, Cadence Design Systems, imec, JSR, McKinsey & Company, Shanghai Huali Microelectronics (HLMC), IC Knowledge, International Business Strategies, Nikon, SanDisk, and SEMI. The Tuesday morning keynote is presented by Diane M. Bryant of Intel. Diego Olego of Philips Healthcare will offer the closing keynote on Wednesday, immediately before the ISS Panel on “The Future of M&A in the Semiconductor Industry,” with panelists from DCG Systems, FormFactor, MKS Instruments, and Stifel Nicolaus; moderated by Robert Maire, Semiconductor Advisors.

The SEMI Industry Strategy Symposium (ISS) examines global economic, technology, market, business and geo-political developments influencing the global electronics manufacturing industry along with their implications for your strategic business decisions. For more than 35 years, ISS has been the premier semiconductor conference for senior executives to acquire the latest trend data, technology highlights and industry perspective to support business decisions, customer strategies and the pursuit of greater profitability.

ON Semiconductor (Nasdaq: ON) has announced a collaboration with Hexius Semiconductor to qualify several of their analog intellectual property (IP) blocks in its popular ONC18 0.18 µm CMOS process. The eight initial designs resulting from this collaboration include a variety of analog-to-digital converters, digital-to-analog converters, voltage references and current references. There is provision, if needed, for the designs to be custom-tailored to match particular application demands. Further data converter and PLL designs are currently being developed for introduction later this year.

ON Semiconductor’s ONC18 process relies on a 0.18 micrometer (µm) CMOS architecture and due to its high voltage capabilities is extremely well suited to automotive, industrial, military and medical deployment. By having access to an expansive portfolio of qualified IP that supports this process, customers will be able to benefit from ASIC implementations that are highly optimized for their specific requirements, without needing to allocate too much of their own engineering resources to the task. As a result, much quicker design cycles, reduced risk of re-spins and lower associated costs can all be realized.

“The mixed signal ASIC market continues to grow as systems need to utilize the real-word data that is captured by sensors and user interface,” states Rocke Acree, Director of the Custom Foundry business unit at ON Semiconductor. “OEMs are looking to integrate more effective proprietary designs, rather than relying on standard off-the-shelf components. Through this, performance levels can be enhanced, board space saved and unit costs significantly lowered. By working together, ON Semiconductor and Hexius Semiconductor are delivering qualified analog IP needed to facilitate this migration and enabling a new era of mixed signal design.”

“Through the combination of the respective skill sets that our two companies possess, we are in a position to supply the industry with qualified analog IP macrocells on superior semiconductor processes that will deliver clear performance and logistical advantages. This will allow OEMs to respond more quickly to market opportunities that they have identified by taking products from the concept phase right through to full commercial production in the shortest possible time,” adds Chris Cavanagh, CEO at Hexius Semiconductor.

The Delivery Systems and Services Group (DS&S) of Versum Materials, Inc. (NYSE: VSM) has realized an important milestone: the sale and commissioning of its 200th CHEMGUARD Gen III high purity, liquid delivery system since the product line launched in early 2016. The 200 units are now running in the latest high-volume semiconductor fabs globally.

Built on a legacy of more than 30 years of supplying advanced materials and delivery systems to the global semiconductor and electronics markets, Versum’s DS&S Group continues to design and build safer, more reliable delivery equipment for high purity gas and liquid distribution.

Jeff Chung, DS&S Asia sales manager, said “the CHEMGUARD Gen III system has been very well received by all our major customers, especially with its new, built-in redundancy.”

The CHEMGUARD product family was first launched in 1999 under the Schumacher brand. David Eshelman, product manager, explained, “Our customers’ original requests for improved safety and uptime help create the CHEMGUARD system,” he said. Eshelman explained that those requirements still exist today, but at each node the molecules and processes used have become much more technically challenging. “The specific needs of today’s specialty, flammable or highly-energetic molecules have been addressed by the unique CHEMGUARD Gen III model designs,” he said.

Capitalizing on its materials and delivery systems expertise, Versum Materials recently created an experienced, multi-disciplined team to review new molecules as they ramp and gain market acceptance. The team evaluates the molecule safety and process needs and helps speed time-to-market for new molecules and processes by having a delivery solution ready when technology ramps.

“When our team says ‘go’ we know that the molecule is ‘CHEMGUARD Ready’,” said Eshelman. “The next node is right around the corner. We want the market to know that the established CHEMGUARD system continues to advance to meet the demands of a changing marketplace.”

Online paper submissions are now open for the 2017 Symposia on VLSI Technology and Circuits, to be held at the Rihga Royal Hotel in Kyoto, Japan from June 5 – 8, 2017. In a departure from previous years, both Symposia (VLSI Technology and VLSI Circuits) will be held on a fully overlapping schedule from June 6 – 8, preceded by Short Courses on June 5.

The deadline for paper submissions to both Symposia is January 23, 2017. Complete details for paper submission can be found online at: http://vlsisymposium.org/authors.html

For the past 30 years, the combined annual Symposia on VLSI Technology and Circuits have provided an opportunity for the world’s top device technologists, circuit and system designers to engage in an open exchange of leading edge ideas at the world’s premier mid-year conference for microelectronics technology. Held together since 1987, the Symposia on VLSI Technology and Circuits have alternated each year between sites in the US and Japan, enabling attendees to learn about new directions in the development of VLSI technology & circuit design through the industry’s leading research and development presentations.

The comprehensive technical programs at the two Symposia are augmented with short courses, invited speakers and several evening panel sessions. Since 2012, the Symposia have presented joint focus sessions that include invited and contributed papers on topics of mutual interest to both technology and circuit attendees. A single registration enables participants to attend both Symposia.

Papers sought for “big integration”
This year’s Symposia theme is “Harmonious Integration Toward Next Dimensions.” Authors are encouraged to submit papers that showcase innovations that extend beyond single ICs and into the module level, with co-optimization of device technology and circuit/system design, including focus areas in the Internet of Things (IoT), industrial electronics, ‘big data’ management, artificial intelligence (AI), biomedical applications, virtual reality (VR) / augmented reality (AR), robotics and smart cars. These topics will be featured in focus sessions as part of the program.

The Symposium on VLSI Technology seeks technical innovation and advances in all aspects of IC technology, as well as the emerging IoT (Internet of Things) field, including:

  • IoT systems & technologies, including ultra-low power, heterogeneous integration, wearable devices, sensors, connectivity, power management, digital/analog, microcontrollers and application processors
  • Stand-alone & embedded memories, including technology & reliability for DRAM, SRAM, (3D-)NAND, MRAM, PCRAM, ReRAM and emerging memory technologies
  • CMOS Technology, microprocessors & SoCs, including scaling, VLSI manufacturing concepts and yield optimization
  • RF / analog / digital technologies for mixed-signal SoC, RF front end; analog, mixed-signal I/O, high voltage, imaging, MEMS, integrated sensors
  • Process & material technologies, including advanced transistor process and architecture, modeling and reliability; alternate channel; advanced lithography, high-density patterning; SOI and III-V technologies, photonics, local interconnects and Cu/optical interconnect scaling
  • Packaging technologies & System-in-Package (SiP), including through-silicon vias (TSVs), power & thermal management, inter-chip communication, 3D-system integration, as well as yield & test issues
  • Photonics Technology & ‘Beyond CMOS’ devices

The Symposium on VLSI Circuits seeks original papers showcasing technical innovations and advances in the following areas:

  • Digital circuits, processors and architectures, including circuits and techniques for standalone and embedded processors
  • Memory circuits, architectures & interfaces for volatile and non-volatile memories, including emerging memory technologies
  • Frequency generation and clock circuits for high-speed digital and mixed-signal applications
  • Analog and mixed-signal circuits, including amplifiers, filters and data converters
  • Wireline receivers & transmitters, including circuits for inter-chip and long-reach applications
  • Wireless receivers & transmitters, including circuits for WAN, LAN, PAN, BAN, inter-chip and mm-wave applications
  • Power conversion circuits, including battery management, voltage regulation, and energy harvesting
  • Imagers, displays, sensors, VLSI circuits & systems for biomedical, healthcare and wearable applications

Joint Technology & Circuits focus sessions feature invited and contributed papers highlighting innovations and advances in the following areas of joint interest:

  • IoT /ULP (Internet of Things / Ultra Low Power) devices: Advanced CMOS processes for ULP, design enablement, design for manufacturing, process/design co-optimization, on-die monitoring of variability and reliability
  • New Computing: Artificial intelligence, ‘beyond von Neumann’ computing, machine learning, neuromorphic & in-memory / in-sensor computing
  • 2D MOSFETs / New concepts for channel & gate materials: Graphene, MoS2, α-Si / poly-Si or flexible organic materials for ‘More than Moore’ devices
  • Emerging memory technology & design: SRAM, DRAM, Flash, PCRAM, RRAM, and MRAM, Memristor, 3D Xpoint memory technologies
  • Design in scaled technologies: scaling of digital, memory, analog and mixed-signal circuits in advanced CMOS processes
  • 3D & heterogeneous integration: power and thermal management; inter-chip communications, SIP architectures and applications

Best Student Paper Award
Awards for best student paper at each Symposia are chosen based on the quality of the papers and presentations. The recipients will receive a monetary award, travel cost support and a certificate at the opening session of the 2018 Symposium. For a paper to be reviewed for this award, the author must be enrolled as a full-time student at the time of submission, must be the lead author and presenter of the paper, and must indicate on the web submission form that the paper is a student paper.

Sponsoring Organizations
The Symposium on VLSI Technology is sponsored by the IEEE Electron Devices Society and the Japan Society of Applied Physics, in cooperation with the IEEE Solid State Circuits Society.

The Symposium on VLSI Circuits is sponsored by the IEEE Solid State Circuits Society and the Japan Society of Applied Physics, in cooperation with the Institute of Electronics, Information and Communication Engineers and the IEEE Electron Devices Society.

Further Information, Registration and Official Call for Papers
Visit: http://www.vlsisymposium.org.

The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors reached $31.0 billion for the month of November 2016, an increase of 7.4 percent compared to the November 2015 total of $28.9 billion and 2.0 percent more than the October 2016 total of 30.4 billion. November marked the market’s largest year-to-year growth since January 2015. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Global semiconductor sales continued to pick up steam in November, increasing at the highest rate in almost two years and nearly pulling even with the year-to-date total from the same point in 2015,” said John Neuffer, president and CEO, Semiconductor Industry Association. “The Chinese market continues to stand out, growing nearly 16 percent year-to-year to lead all regional markets. As 2016 draws to a close, the global semiconductor market appears likely to roughly match annual sales from 2015 and is well-positioned for a solid start to 2017.”

Month-to-month sales increased modestly across all regions: the Americas (3.3 percent), China (2.7 percent), Europe (2.5 percent), Asia Pacific/All Other (0.7 percent), and Japan (0.4 percent). Year-to-year sales increased in China (15.8 percent), Japan (8.2 percent), Asia Pacific/All Other (4.8 percent), and the Americas (3.2 percent), but fell slightly in Europe (-1.6 percent).

By Chet Lenox, David W. Price and Douglas G. Sutherland

Author’s Note: The Process Watch series explores key concepts about process control—defect inspection and metrology—for the semiconductor industry. Following the previous installments, which examined the 10 fundamental truths of process control, this new series of articles highlights additional trends in process control, including successful implementation strategies and the benefits for IC manufacturing. For this article, we are pleased to include insights from our guest author and colleague at KLA-Tencor, Chet Lenox.

In order to maximize the profitability of an IC manufacturer’s new process node or product introduction, an early and fast yield ramp is required. Key to achieving this rapid yield ramp is the ability to provide quality and actionable data to the engineers making decisions on process quality and needed improvements.

The data used to make these decisions comes in two basic forms:

  • Inline inspection and metrology results
  • End-of-line (EOL) parametric testing, product yield results and failure-analysis

Inline inspection and metrology serve as the primary source of data for process engineers, enabling quick identification of excursions and implementation of corrective actions. End-of-line results serve as a metric of any process flow’s ability to produce quality product, generating transistor parametrics, yield sub-binning and physical failure analysis (PFA) data that provide insight into process quality and root-cause mechanisms.

In general, a fab is better off financially by finding and fixing problems inline versus end-of-line1 due to the long delay between wafer processing and collection of EOL data. However, EOL results are a critical component in understanding how specific inline defects correlate to product performance and yield, particularly during early process development cycles. Therefore, the ideal yield improvement methodology relies on inline inspection and metrology for excursion monitoring and process change qualification, while EOL results are used only for the validation of yield improvement changes.

In order for this scenario to be achieved, inline data must be high quality with appropriate sampling, and a clear correlation must be established between inline results and EOL yield. One key tool that is often utilized to achieve this connection is hitback analysis. Hitback analysis is the mapping of EOL electrical failure and PFA locations to inline defect locations identified by inspection tools.

Hitback analysis comes in two basic forms. In the traditional method, EOL yield failures guide PFA, often in the form of a cross-section transmission electron microscope (TEM) confirmation of a physical defect. This physical location is then overlaid against inline defect locations for correlation to inline learning. This analysis often offers clear causality for yield failures, but is slow (dozens/week) and can be blind to defect modes that are difficult to locate or image in TEM.

The second method, which is growing in popularity, is to overlay the EOL electrical failure location directly to inline defect data (figure 1). This is largely enabled by modern logic design methods and analysis tools that allow electrical failures to be localized into “chain” locations where the failure is likely to occur. Furthermore, new technologies allow inline inspection to be guided to potential chain location failures based purely on design layout.

For example, KLA-Tencor’s broadband plasma optical patterned wafer inspection systems incorporate patented technologies (NanoPoint™, pin•point™) that leverage design data to define very tiny inspection areas focused solely on critical patterns.2,3,4 Using these design-based technologies to inspect patterns related to potential chain failures produces inspection results consisting of defects that are strongly correlated to end-of-line yield. This more direct technique allows for faster turn-around on analysis, enables higher sampling (hundreds of defects/wafer) and can provide successful causality on defect modes that are difficult to find physically at EOL.

Figure 1. Hitback analysis technique where likely die fail chain locations from EOL are overlaid with inline inspection results.

Figure 1. Hitback analysis technique where likely die fail chain locations from EOL are overlaid with inline inspection results.

To achieve successful direct hitback analysis from electrical fail chains to inline defect locations, a number of methodologies are helpful:

  • Wafers that will be used for hitback analysis should be inspected at all key process steps. This avoids “holes” in potential causality to the EOL failure
  • Geometry-based overlay algorithms should be used that combine the point-based inline defect location with area-based reporting of EOL chains
  • The overlay distance allowed to label a chain-to-defect distance a “hit” must be large enough to allow for inspection tool defect location accuracy (DLA) but small enough that the statistical probability of false-positives is low; see Figure 2
  • All defects found by the inspector should be used for analysis, not just defects that are classified by subsequent review steps
  • Electrical fail chain locations should utilize layer information as well as x/y mapping
Figure 2. The threshold used to overlay EOL electrical chains to inline defects must be optimized to avoid failures or false positives.

Figure 2. The threshold used to overlay EOL electrical chains to inline defects must be optimized to avoid failures or false positives.

When performed properly, the hitback capture rate metric (in percentage) will quantify the number of fails which “hitback” to inline defects. This metric can be used broadly as an indicator of inline inspection capability, with higher numbers indicating that inline inspection can be more confidently used in yield improvement efforts. Therefore, hitback analysis should be performed as early as possible in the development cycle and new product introduction timescale. This allows time for inline defect inspection capture rate improvement through these traditional methods:

  • Inspection tool and recipe improvement, including the use of guided inspection based on product layout
  • Lot-, wafer- and die-level sampling adjustments
  • Process step inspection location optimization

When performed regularly, hitback analysis greatly assists in improving inline inspection confidence and improves yield learning speed. Hitback capture rates increasing to more than 70 percent are not uncommon for effective inline monitoring schemes. It is worth mentioning that the slower EOL PFA Pareto generation and hitback analysis is still required even when direct EOL-to-inline is performed in order to validate the chain fails and hitback capture rate.

Yield ramp rate is often the primary factor in the profitability of a fab’s new process and new product introduction. This ramp rate is strongly influenced by the effectiveness of inline wafer inspection, allowing faster information turns and quicker decision making by process engineers. Hitback analysis is a key method for gauging the effectiveness of inline inspection and for driving inspection improvements, particularly when correlating EOL electrical chain failures to inline defect results.

References:

About the Authors:

Dr. Chet Lenox, Dr. David W. Price and Dr. Douglas Sutherland are Yield Consultant, Senior Director, and Principal Scientist, respectively, at KLA-Tencor Corp. Dr. Lenox, Dr. Price and Dr. Sutherland have worked directly with many semiconductor IC manufacturers to help them optimize their overall inspection strategy to achieve the lowest total cost. This series of articles attempts to summarize some of the universal lessons they have observed through these engagements.

From the ground-breaking research breakthroughs to the shifting supplier landscape, these are the stories the Solid State Technology audience read the most during 2016.

#1: Moore’s Law did indeed stop at 28nm

In this follow up, Zvi Or-Bach, president and CEO, MonolithIC 3D, Inc., writes: “As we have predicted two and a half years back, the industry is bifurcating, and just a few products pursue scaling to 7nm while the majority of designs stay on 28nm or older nodes.”

#2: Yield and cost challenges at 16nm and beyond

In February, KLA-Tencor’s Robert Cappel and Cathy Perry-Sullivan wrote of a new 5D solution which utilizes multiple types of metrology systems to identify and control fab-wide sources of pattern variation, with an intelligent analysis system to handle the data being generated.

#3: EUVL: Taking it down to 5nm

The semiconductor industry is nothing if not persistent — it’s been working away at developing extreme ultraviolet lithography (EUVL) for many years, SEMI’s Deb Vogler reported in May.

#4: IBM scientists achieve storage memory breakthrough

For the first time, scientists at IBM Research have demonstrated reliably storing 3 bits of data per cell using a relatively new memory technology known as phase-change memory (PCM).

#5: ams breaks ground on NY wafer fab

In April, ams AG took a step forward in its long-term strategy of increasing manufacturing capacity for its high-performance sensors and sensor solution integrated circuits (ICs), holding a groundbreaking event at the site of its new wafer fabrication plant in Utica, New York.

#6: Foundries takeover 200mm fab capacity by 2018

In January, Christian Dieseldorff of SEMI wrote that a recent Global Fab Outlook report reveals a change in the landscape for 200mm fab capacity.

#7: Equipment spending up: 19 new fabs and lines to start construction

While semiconductor fab equipment spending was off to a slow start in 2016, it was expected to gain momentum through the end of the year. For 2016, 1.5 percent growth over 2015 is expected while 13 percent growth is forecast in 2017.

#8: How finFETs ended the service contract of silicide process

Arabinda Daa, TechInsights, provided a look into how the silicide process has evolved over the years, trying to cope with the progress in scaling technology and why it could no longer be of service to finFET devices.

#9: Five suppliers to hold 41% of global semiconductor marketshare in 2016

In December, IC Insights reported that two years of busy M&A activity had boosted marketshare among top suppliers.

#10: Countdown to Node 5: Moving beyond FinFETs

A forum of industry experts at SEMICON West 2016 discussed the challenges associated with getting from node 10 — which seems set for HVM — to nodes 7 and 5.

BONUS: Most Watched Webcast of 2016: View On Demand Now

IoT Device Trends and Challenges

Presenters: Rajeev Rajan, GLOBALFOUNDRIES, and Uday Tennety, GE Digital

The age of the Internet of Things is upon us, with the expectation that tens of billions of devices will be connected to the internet by 2020. This explosion of devices will make our lives simpler, yet create an array of new challenges and opportunities in the semiconductor industry. At the sensor level, very small, inexpensive, low power devices will be gathering data and communicating with one another and the “cloud.” On the other hand, this will mean huge amounts of small, often unstructured data (such as video) will rippling through the network and the infrastructure. The need to convert that data into “information” will require a massive investment in data centers and leading edge semiconductor technology.

Also, manufacturers seek increased visibility and better insights into the performance of their equipment and assets to minimize failures and reduce downtime. They wish to both cut their costs as well as grow their profits for the organization while ensuring safety for employees, the general public and the environment.

The Industrial Internet is transforming the way people and machines interact by using data and analytics in new ways to drive efficiency gains, accelerate productivity and achieve overall operational excellence. The advent of networked machines with embedded sensors and advanced analytics tools has greatly influenced the industrial ecosystem.

Today, the Industrial Internet allows you to combine data from the equipment sensors, operational data , and analytics to deliver valuable new insights that were never before possible. The results of these powerful analytic insights can be revolutionary for your business by transforming your technological infrastructure, helping reduce unplanned downtime, improve performance and maximize profitability and efficiency.

From artificial intelligence to the Internet of Things (IoT), far-reaching innovations are unfolding in virtually every technology sector around the globe, continuing to change the way consumers, businesses and machines interact while also spurring the next revolution in tech market growth, according to a new white paper from IHS Markit (Nasdaq: INFO).

For the white paper, IHS Markit surveyed its leading technology experts, who represent various industry segments including advertising, automotive, connected networks, consumer devices, entertainment, displays, media, semiconductors, telecommunications and others. These analysts were asked to provide their informed predictions for the global technology market in the New Year.

The Top Seven Technology Trends for 2017, as identified in this IHS Markit report and listed in no particular order, are as follows:

Trend #1 – Smart Manufacturing Accelerates With More Real-World Products

  • Companies use IoT to transform how products are made, how supply chains are managed and how customers can influence design.
  • Example: look for automation/operator tech firms to release their own Platforms-as-a Service (PaaS) offering in the cloud as they compete to offer and own IoT projects for the industrial market.

Trend #2 – Artificial Intelligence (AI) Gets Serious

  • Already, personified AI assistants from a handful of companies (Amazon’s Alexa, Apple’s Siri) have access to billions of users via smartphones and other devices.
  • However, even bigger, more profound changes are on their way as levels of human control are ceded directly to AI, such as in autonomous cars or robots.

Trend #3 – The Rise of Virtual Worlds

  • After several years of hype, the operative reality behind virtual, augmented and mixed digital worlds is set to manifest more fully in 2017. The technology for augmented reality (AR) and virtual reality (VR) will advance significantly as Facebook, Google and Microsoft consolidate their existing technologies into more exhaustive strategies.
  • New versions of VR-capable game consoles featuring 4K video and high dynamic range (HDR) will also create the medium for high-quality VR content, even if availability will be limited for the next few years.

Trend #4 – The “Meta Cloud” Era Arrives

  • Communication service providers plan to deliver a new wave of innovation, allowing for a single connection to the enterprise and acting as a gateway to multiple cloud service providers. IHS Markit refers to this as the meta cloud.
  • In 2017, new offerings will become available from traditional Software-as-a-Service (SaaS) vendors, coupled with expanded offers from the likes of IBM, Amazon and— most notably—Google via its Tensor chip. Watch for the development and deployment of more specialized silicon in the next two years.

Trend #5 – A Revolution in New Device Formats

  • The development of the consumer drone is the closest example of a product type evolved over the past few years that has quickly gone mass market. 3D printers and pens are heading the same way.
  • The next set of new devices may well materialize at the boundary of cheap 3D printing and inexpensive smartphone components to create completely novel device types and uses.

Trend #6 – Solar Still the Largest Source of Renewable New Power

  • The next year, 2017, will see photovoltaic (PV) technology retaining—and confirming—its position as the planet’s largest source of new renewable power.
  • More than a quarter of all PV capacity added worldwide in 2016 and 2017 will be in the form of solar panels. The growth of solar can be attributed to sharp drops in the cost of PV systems, combined with favorable country policies toward new renewable power.

Trend #7 – Low-Power Technologies Extend Reach to Inaccessible IoT Devices

  • The first batch of low-power, wide-area networks (LPWAN) will go live around the world in 2017 as an alternative to short-range wireless standards such as Wi-Fi and Bluetooth. LPWAN technologies will connect hard-to-reach, IoT devices more efficiently and at a lower cost, dealing with challenges stemming from range limitation to poor signal strength. As a result, opportunities will open up for telecom providers to support low-bit-rate applications.
  • In turn, the increased availability and low cost of LPWAN technologies will drive connectivity for smart metering, smart building and precision agriculture, among many other applications.

Weisl-AndreasAndreas Weisl (38), former Vice President Europe of Korean LED manufacturer Seoul Semiconductor (SSC), has taken on the position of CEO at Seoul Semiconductor Europe GmbH based Munich, Germany, with effect from November 11, 2016.

The European headquarters has been consistently successful, establishing themselves since 2010. The global success story of SSC, which is marked by rapid growth, has been successfully implemented in Europe for many years now. SSC is among the leading companies in global markets and throughout the European LED market.

In his role as General Manager for Central and Northern Europe since 2010, and as Vice President Europe since 2014, Mr. Weisl is part of the SSC executive and is responsible for business developments in Europe. Mr Weisl has contributed significantly to the company’s success and looks back on more than eleven years of experience in the area of LEDs before coming to SSC in 2010. Previously he served as a manager, among other roles, at Osram Opto Semiconductors.

Materion Corporation (NYSE: MTRN) announced today that its Precision Optics business has acquired the proprietary thin film gettering technology and related intellectual property assets from Integrated Sensing Systems (ISS), of Ypsilanti, Michigan, a global leader in the design and manufacture of microelectromechanical (MEMs)-based products and getter technology.

The assets acquired include the NanoGetters® technology, patents and trademarks. Getter technology is used to improve the long-term reliability of hermetically sealed sensor packages by capturing moisture and other stray gas molecules. The NanoGetters technology developed by ISS uses a proprietary set of materials that are precisely vacuum deposited, providing an alternative solution to traditional non-evaporative gettering technology. Nanogetter technology offers many advantages over other getter solutions including its compatibility with clean semiconductor processing techniques and its low activation temperature.

NanoGetters® materials are already being used by customers worldwide in MEMs to improve vacuum packaging in a wide range of end-use sensor applications including infrared imaging, chemical sensors, microfluidic devices and other electronics devices.

The acquisition provides a technology augmentation and completes the vertical integration of Materion Precision Optics’ wafer level process flow for thermal imaging applications. In 2014, Materion Precision Optics commissioned a 3,000-square-foot class 1,000 clean room with state-of-the-art infrared coating chambers in anticipation of the thermal imaging industry’s ongoing shift from traditional singular window packaging to wafer level packaging (WLP). With this original investment at Westford, Massachusetts, Materion gained the capability to provide customers with two of the process steps for wafer level packaging: optical coating and metallization. With the acquisition of the NanoGetters® trade name and getter technology, Materion is now able to provide a full wafer level packaging coating solution to customers, an offering unmatched in the marketplace.

“This is a technology and commercial differentiator for Materion Precision Optics. It presents major new opportunities for existing and new customers to benefit from the cost and logistical efficiencies, consistency in operational processes and product quality, as well as an overall convenience from having their full offering provided from a single partner and sequenced under one roof,” commented Michael Newell, Ph.D., President, Materion Precision Optics. He explained, “Our customers have been asking for a solution like this and we are extremely pleased to be providing it.”

The new gettering capability is expected to facilitate additional business and will enhance the value-added revenue from each wafer processed. Additionally, Materion anticipates expanding the gettering technology to applications beyond infrared imaging including inertial sensors, medical sensors, oscillators and other MEMs devices, leveraging its wafer-level technology, product development and operational capabilities.

Materion Precision Optics is a Materion Corporation business. Materion Corporation is headquartered in Mayfield Heights, Ohio. The Company, through its wholly owned subsidiaries, supplies highly engineered advanced enabling materials to global markets. Products include precious and non-precious specialty metals, inorganic chemicals and powders, specialty coatings, specialty engineered beryllium alloys, beryllium and beryllium composites, and engineered clad and plated metal systems.