Category Archives: Wafer Processing

North America-based manufacturers of semiconductor equipment posted $1.59 billion in orders worldwide in April 2016 (three-month average basis) and a book-to-bill ratio of 1.10, according to the April Equipment Market Data Subscription (EMDS) Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.10 means that $110 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in April 2016 was $1.59 billion. The bookings figure is 15.6 percent higher than the final March 2016 level of $1.38 billion, and is 1.3 percent higher than the April 2015 order level of $1.57 billion.

The three-month average of worldwide billings in April 2016 was $1.46 billion. The billings figure is 21.5 percent higher than the final March 2016 level of $1.20 billion, and is 4.0 percent lower than the April 2015 billings level of $1.52 billion.

“Bookings reached their highest levels in eight months and billings levels also significantly improved in April,” said Denny McGuirk, president and CEO of SEMI. “The data reflect strong investments in 3D NAND and in China.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

  Billings
(3-mo. avg)		 Bookings
(3-mo. avg)		 Book-to-Bill
November 2015 $1,288.3 $1,236.6 0.96
December 2015 $1,349.9

 

 $1,343.5 1.00
January 2016 $1,221.2 $1,310.9 1.07
February 2016 $1,204.4 $1,262.0 1.05
March 2016 (final) $1,197.6 $1,379.2 1.15
April 2016 (prelim) $1,455.0 $1,594.6 1.10

Source: SEMI (www.semi.org), May 2016

Synopsys, Inc. today announced a pre-wafer simulation solution to help semiconductor manufacturers reduce process node development time. The new solution provides a comprehensive process, transistor and circuit simulation flow that enables technology development and design teams to evaluate various transistor and process options using a design technology co-optimization methodology that starts in the pre-wafer research phase. The generation of SPICE models, design rules and parasitics from TCAD and lithography simulations allow the creation of early process design kits to evaluate the performance, power, area and cost of a new process node.

“To meet the performance, power, area and cost targets of the 10nm process node and beyond, semiconductor manufacturers need to evaluate a larger number of process options, device architectures and materials, and account for design criteria in selecting the best options,” said Dr. Anda Mocuta, Director of Technology Solutions and Enablement at imec. “The new simulation solution from Synopsys enables seamless links in the DTCO chain and helps speed up the down-selection of technology options,” added Dr. Mocuta.

In the past, the development of new process nodes was focused on the scaling and optimization of a single device architecture, the planar MOSFET, and a single material, silicon. With the introduction of FinFET in logic and 3D-NAND in memory, the complexity of new process nodes increased significantly. This complexity will only accelerate as future process nodes will need to evaluate and select among a larger number of processes, device architectures and materials.

Increasing Complexity of New Process Nodes

  • To meet the expected gains in performance, power and area with each new process node, current and next-generation lithography technologies must be evaluated from the point of view of critical pitches, pattern printability and layout constraints
  • Achieving transistor performance and power targets requires consideration of new device architectures, such as nanowire FETs and tunnel FETs, with high-mobility channel materials as an option
  • Selection among this exploding number of process, device architecture and material options is further complicated by complex interactions between design rules, interconnect parasitics, and transistor performance, and the unavailability during the early stages of research of wafer data from which to build or calibrate models

Pre-Wafer Simulation Solution Benefits

  • Combines the production-proven Sentaurus TCAD, Process Explorer and Sentaurus Lithography tools with new tools for automated variation-aware SPICE model extraction
  • Enables the creation of PDKs from simulation data so design teams can assess the impact of technology options on circuit performance and area earlier than currently possible
  • By starting design-technology co-optimization earlier, process development teams can reduce expensive and time consuming wafer-based iterations when selecting the right options to meet process node performance, power, area, cost and timeline targets

“Working closely with our customers, we have developed a pre-wafer simulation solution to help our customers deliver process nodes faster,” said Dr. Howard Ko, senior VP and general manager of the Silicon Engineering Group at Synopsys. “Our unique combination of TCAD, litho and SPICE simulation enables us to deliver a complete solution to address the challenges in technology development of advanced process nodes,” added Dr. Ko.

Along with being a “girl’s best friend,” diamonds also have remarkable properties that could make them ideal semiconductors. This is welcome news for electronics; semiconductors are needed to meet the rising demand for more efficient electronics that deliver and convert power.

The thirst for electronics is unlikely to cease and almost every appliance or device requires a suite of electronics that transfer, convert and control power. Now, researchers have taken an important step toward that technology with a new way to dope single crystals of diamonds, a crucial process for building electronic devices.

“We need the devices to manipulate the power in the way that we want,” said Zhengqiang (Jack) Ma, an electrical and computer engineering professor at the University of Wisconsin-Madison. He and his colleagues describe their new method in the Journal of Applied Physics, from AIP Publishing.

For power electronics, diamonds could serve as the perfect material. They are thermally conductive, which means diamond-based devices would dissipate heat quickly and easily, foregoing the need for bulky and expensive methods for cooling. Diamond can also handle high voltages and power. Electrical currents also flow through diamonds quickly, meaning the material would make for energy efficient devices.

But among the biggest challenges to making diamond-based devices is doping, a process in which other elements are integrated into the semiconductor to change its properties. Because of diamond’s rigid crystalline structure, doping is difficult.

Currently, you can dope diamond by coating the crystal with boron and heating it to 1450 degrees Celsius. But it’s difficult to remove the boron coating at the end. This method only works on diamonds consisting of multiple crystals stuck together. Because such polydiamonds have irregularities between the crystals, single-crystals would be superior semiconductors.

You can dope single crystals by injecting boron atoms while growing the crystals artificially. The problem is the process requires powerful microwaves that can degrade the quality of the crystal.

Now, Ma and his colleagues have found a way to dope single-crystal diamonds with boron at relatively low temperatures and without any degradation. The researchers discovered if you bond a single-crystal diamond with a piece of silicon doped with boron, and heat it to 800 degrees Celsius, which is low compared to the conventional techniques, the boron atoms will migrate from the silicon to the diamond. It turns out that the boron-doped silicon has defects such as vacancies, where an atom is missing in the lattice structure. Carbon atoms from the diamond will fill those vacancies, leaving empty spots for boron atoms.

This technique also allows for selective doping, which means more control when making devices. You can choose where to dope a single-crystal diamond simply by bonding the silicon to that spot.

The new method only works for P-type doping, where the semiconductor is doped with an element that provides positive charge carriers (in this case, the absence of electrons, called holes).

“We feel like we found a very easy, inexpensive, and effective way to do it,” Ma said. The researchers are already working on a simple device using P-type single-crystal diamond semiconductors.

But to make electronic devices like transistors, you need N-type doping that gives the semiconductor negative charge carriers (electrons). And other barriers remain. Diamond is expensive and single crystals are very small.

Still, Ma says, achieving P-type doping is an important step, and might inspire others to find solutions for the remaining challenges. Eventually, he said, single-crystal diamond could be useful everywhere — perfect, for instance, for delivering power through the grid.

SEMI announced today that the first SEMI Strategic Materials Conference (SMC) was held in Korea COEX in Seoul on May 18. This deep technical conference program attracted 258 attendees from 81 companies. Advanced materials critical to scaling technology in semiconductor manufacturing industry bring challenges including innovation speed, cost effectiveness, performance, quality management and environmental issues.

With the theme “A Decade of Materials,” SEMI Korea organized the inaugural SMC Korea that brought the key semiconductor issues into focus and provided networking opportunities for this specialized community. The agenda included presentations on market outlook, new technology trends, challenges and opportunities of emerging new materials, chemical, quality management and collaboration by 14 speakers from Air Products, ASM Korea, Dow Chemical, Entegris, Samsung Electronics, SK Hynix, Tokyo Electron, Yole Développement and others.

The keynote at SMC Korea was presented by Kurt Ronse, director of Advanced Lithography Program of imec. He spoke on advanced lithography and patterning materials for the next decade. Ronse stated that Moore’s Law of continuing IC die area and cost reduction was becoming increasingly difficult – and advanced and strategic materials were key in enabling the physical scaling. He added that all advanced patterning techniques critically depend on increasingly stringent materials properties.

Two attorneys, Joo-Hyoung LEE and Tae-Hyun YOON from KIM & CHANG, the largest law firm in Korea, presented in the policy and regulation session. They presented an overview of K-REACH, a critical issue for chemical materials. They highlighted trends and companies’ challenges and responses in the industry in this increasingly critical area.

Hyunwoo KIM, vice president of Samsung Electronics, highlighted the importance of collaboration between customers and suppliers for the development of new materials and innovative technology. This message from one of the top global chipmakers underscored the importance of this forum working together in the area of semiconductor materials being enabling to the industry.

“We were pleased to hold the first Strategic Materials Conference, SMC Korea,” said Hyun-Dae Cho, president of SEMI Korea. “We hope the conference provided attendees with important insights into the semiconductor materials industry and also provided key networking opportunities.”

Official Sponsors of SMC Korea 2016 include Air Products, Merck, and SK Materials.

Fujitsu Limited today announced that it has with Intel Corporation carried out a field trial to visualize manufacturing processes at Shimane Fujitsu Limited, which primarily manufactures notebook PCs. The field trial linked the FUJITSU Cloud Service IoT Platform with the Intel IoT Gateway. As a result of this trial, the companies were able to rationalize functionality testing and repair processes on Shimane Fujitsu’s manufacturing line, and in line with this, cut additional shipping costs that resulted from delays by 30%. The trial was a part of the IoT collaboration with Intel, launched in May 2015.

Going forward, Fujitsu will further strengthen its collaboration with Intel in the IoT field, creating new solutions and making them available to customers.

In May 2015, Fujitsu and Intel reached an agreement to collaborate in building a more optimal systems environment by combining Fujitsu’s cutting-edge technology with the Intel IoT Gateway, a blueprint for interoperable IoT solutions, with the aim of providing high-value IoT solutions. As a field trial of this collaboration, since May 2015 the companies have been working to improve manufacturing process efficiency through factory visualization at Shimane Fujitsu.

At Shimane Fujitsu, when products are detected to have faults in the functionality testing performed on the manufacturing line, they are sent to the repair area to receive a thorough diagnosis, analysis, and repair of the fault before being shipped, but there are sometimes cases in which the fault cannot be reproduced in the repair process. In these situations, it is necessary to conduct a comprehensive analysis of the work done by the worker involved in the functionality testing process who detected the fault, the tools used, and the status of the product being tested, in order to make clear the reason for the fault detection. Because real-time visualization of the task status of the functionality testing process was previously insufficient, however, it was impossible to identify the cause or implement policies to prevent reoccurrence, resulting in an excess of products being repaired.

In addition, in the repair process, information, such as the location of the product to be repaired in the repair line, whether or not it was held up, and each product’s shipping deadline information, was not made visible in real time. This meant that it was not possible to separate out products that should be prioritized, causing them to miss planned shipping deadlines, often resulting in costs for arranging additional shipping trucks.

To visualize the functionality testing process, using Fujitsu Laboratories Ltd.’s image-processing technology that raises the recognition ratio for text in images, along with a framework that shortens the development of applications that use the technology, worker task status is recorded on video, along with the error code (a code that displays the content of the fault) displayed on the screen of the product to be repaired. This video is aggregated through the Intel IoT Gateway, for process visualization, by performing analytical image processing. As a result, in addition to improving the efficiency of error code aggregation, it is now possible to find trends in detected faults, and to efficiently analyze the circumstances when a fault was detected. By using the results of this analysis to limit misdetection of faults, Fujitsu will be able to reduce excess product repairs.

Next, for real-time visualization of the repair process, a beacon sensor is attached to each product needing repair that is sent to the repair line, which enables all line workers to grasp each product’s location in the process, how long it has been there, and its shipping deadline. As a result, all employees can quickly understand the state of the entire process, leading them to independently prioritize the repair of products that have close shipping deadlines, or to help out in processes that are causing delays. This has reduced the number of additional shipping trucks required due to delays, leading to a 30% cut in shipping costs.

Fujitsu and Intel will use the experience gained at Shimane Fujitsu to establish IoT solutions for deployment to manufacturing customers. In addition, they will further accelerate the collaboration involving Fujitsu’s IoT Platform and the Intel IoT Gateway by expanding IoT solutions to other fields, beginning with retail and the public sector.

For the first time, scientists at IBM Research have demonstrated reliably storing 3 bits of data per cell using a relatively new memory technology known as phase-change memory (PCM).

The current memory landscape spans from venerable DRAM to hard disk drives to ubiquitous flash. But in the last several years PCM has attracted the industry’s attention as a potential universal memory technology based on its combination of read/write speed, endurance, non-volatility and density. For example, PCM doesn’t lose data when powered off, unlike DRAM, and the technology can endure at least 10 million write cycles, compared to an average flash USB stick, which tops out at 3,000 write cycles.

This research breakthrough provides fast and easy storage to capture the exponential growth of data from mobile devices and the Internet of Things.

For the first time, scientists at IBM Research have demonstrated reliably storing 3 bits of data per cell using a relatively new memory technology known as phase-change memory (PCM). This research breakthrough provides fast and easy storage to capture the exponential growth of data from mobile devices and the Internet of Things. In this photo, IBM scientist , Nikolaos Papandreou holds the PCM chip under a magnifying lens in his lab. (Credit: IBM Research)

For the first time, scientists at IBM Research have demonstrated reliably storing 3 bits of data per cell using a relatively new memory technology known as phase-change memory (PCM). This research breakthrough provides fast and easy storage to capture the exponential growth of data from mobile devices and the Internet of Things. In this photo, IBM scientist , Nikolaos Papandreou holds the PCM chip under a magnifying lens in his lab. (Credit: IBM Research)

Applications 

IBM scientists envision standalone PCM as well as hybrid applications, which combine PCM and flash storage together, with PCM as an extremely fast cache. For example, a mobile phone’s operating system could be stored in PCM, enabling the phone to launch in a few seconds. In the enterprise space, entire databases could be stored in PCM for blazing fast query processing for time-critical online applications, such as financial transactions.

Machine learning algorithms using large datasets will also see a speed boost by reducing the latency overhead when reading the data between iterations.

How PCM Works 

PCM materials exhibit two stable states, the amorphous (without a clearly defined structure) and crystalline (with structure) phases, of low and high electrical conductivity, respectively.

For the first time, scientists at IBM Research have demonstrated reliably storing 3 bits of data per cell using a relatively new memory technology known as phase-change memory (PCM). In this photo, the experimental multi-bit PCM chip used by IBM scientists is connected to a standard integrated circuit board. The chip consists of a 2 × 2 Mcell array with a 4- bank interleaved architecture. The memory array size is 2 × 1000 μm × 800 μm. The PCM cells are based on doped-chalcogenide alloy and were integrated into the prototype chip serving as a characterization vehicle in 90nm CMOS baseline technology. (Credit: IBM Research)

For the first time, scientists at IBM Research have demonstrated reliably storing 3 bits of data per cell using a relatively new memory technology known as phase-change memory (PCM). In this photo, the experimental multi-bit PCM chip used by IBM scientists is connected to a standard integrated circuit board. The chip consists of a 2 × 2 Mcell array with a 4- bank interleaved architecture. The memory array size is 2 × 1000 μm × 800 μm. The PCM cells are based on doped-chalcogenide alloy and were integrated into the prototype chip serving as a characterization vehicle in 90nm CMOS baseline technology. (Credit: IBM Research)

To store a ‘0’ or a ‘1’, known as bits, on a PCM cell, a high or medium electrical current is applied to the material. A ‘0’ can be programmed to be written in the amorphous phase or a ‘1’ in the crystalline phase, or vice versa. Then to read the bit back, a low voltage is applied. This is how re-writable Blue-ray Discs* store videos.

Previously scientists at IBM and other institutes have successfully demonstrated the ability to store 1 bit per cell in PCM, but today at the IEEE International Memory Workshop in Paris, IBM scientists are presenting, for the first time, successfully storing 3 bits per cell in a 64k-cell array at elevated temperatures and after 1 million endurance cycles.

“Phase change memory is the first instantiation of a universal memory with properties of both DRAM and flash, thus answering one of the grand challenges of our industry,” said Dr. Haris Pozidis, an author of the paper and the manager of non-volatile memory research at IBM Research – Zurich. “Reaching 3 bits per cell is a significant milestone because at this density the cost of PCM will be significantly less than DRAM and closer to flash.”

To achieve multi-bit storage IBM scientists have developed two innovative enabling technologies: a set of drift-immune cell-state metrics and drift-tolerant coding and detection schemes.

More specifically, the new cell-state metrics measure a physical property of the PCM cell that remains stable over time, and are thus insensitive to drift, which affects the stability of the cell’s electrical conductivity with time. To provide additional robustness of the stored data in a cell over ambient temperature fluctuations a novel coding and detection scheme is employed. This scheme adaptively modifies the level thresholds that are used to detect the cell’s stored data so that they follow variations due to temperature change. As a result, the cell state can be read reliably over long time periods after the memory is programmed, thus offering non-volatility.

“Combined these advancements address the key challenges of multi-bit PCM, including drift, variability, temperature sensitivity and endurance cycling,” said Dr. Evangelos Eleftheriou, IBM Fellow.

The experimental multi-bit PCM chip used by IBM scientists is connected to a standard integrated circuit board. The chip consists of a 2 × 2 Mcell array with a 4- bank interleaved architecture. The memory array size is 2 × 1000 μm × 800 μm. The PCM cells are based on doped-chalcogenide alloy and were integrated into the prototype chip serving as a characterization vehicle in 90 nm CMOS baseline technology.

OpenPOWER 

At the 2016 OpenPOWER Summit in San Jose, CA, last month, IBM scientists demonstrated, for the first time, phase-change memory attached to POWER8-based servers (made by IBM and TYAN® Computer Corp.) via the CAPI (Coherent Accelerator Processor Interface) protocol. This technology leverages the low latency and small access granularity of PCM, the efficiency of the OpenPOWER architecture and the CAPI protocol. In the demonstration the scientists measured very low and consistent latency for 128-byte read/writes between the PCM chips and the POWER8 processor.

For more information on today’s announcement watch this video: https://youtu.be/q3dIw3uAyE8. Continue the conversation at @IBMResearch #3bitPCM.

Nanoelectronics research center imec today announced a strategic partnership on GaN-on-Si (Gallium Nitride-on-Silicon) technology with IQE, a designer and manufacturer of advanced semiconductor wafer products and services.

GaN technology offers faster switching-power devices with higher breakdown voltage and lower on-resistance than silicon, making it an ideal material for advanced power electronic components. The partnership builds on promising results achieved in a recent project, in which imec and IQE collaborated to fabricate GaN power diodes using imec’s proprietary diode architecture and IQE’s high voltage epiwafers.

IQE enters imec’s GaN-on-Si Industrial Affiliation Program that offers joint research and development on GaN-on-Si 200mm epitaxy and enhancement mode device technology to a variety of companies including IDMs, equipment and material suppliers, fabless design houses and packaging companies. The program includes research  on novel substrates to improve the quality of epitaxial layers, new isolation modules to enhance integration levels, and advanced vertical device development. As a GaN-on-Si Program partner, IQE gains access to next-generation epitaxy, devices and power electronics processes, including imec’s complete 200mm CMOS-compatible GaN process line.

“We are delighted to have the opportunity to extend our relationship with imec through the Industrial Affiliation Program,” Wayne Johnson, Head of IQE’s Power Business Unit, said. “The importance of GaN on Si for power devices cannot be understated, particularly as we enter an era of electrically propelled transportation and increasing demands for energy efficient power control systems that require high voltage and high power capabilities.

“IQE’s proven track record in developing and manufacturing GaN based epiwafers, coupled with imec’s unquestionable reputation for world-leading research in nanoelectronics makes for a powerful collaboration in this rapidly growing technology space.”

In its earlier collaborative project, imec worked with IQE to create state-of-the-art GaN power diodes. Imec has applied its proprietary Gated Edge Terminated (GET) Schottky diode device architecture to IQE’s high voltage GaN buffers on 200mm Si substrates. The main challenge on power diodes is to obtain devices that simultaneously show low leakage current and low turn on voltage. Thanks to the GET diode device architecture and to the low buffer leakage current of IQE wafers, the large GaN power diodes (10mm), that were fabricated in imec’s 200mm Si pilot line, showed a low leakage current (up to 650V) and low turn-on voltage. The power Schottky diodes reaches forward and reverse specifications across the full temperature range, spanning from 25˚C till 150˚C with a tight distribution.

“We are excited about this strategic partnership with IQE. Our joint results show that the IQE epiwafers are of excellent quality and are well-aligned to meet the specifications for power Schottky diodes. We look forward to collaborating with IQE to advance our promising results, which demonstrate that our proprietary GET Schottky diode device architecture and process technology can be transferred to external wafers like those provided by IQE,” stated Rudi Cartuyvels, executive vice president smart systems and energy technology at imec. “Our 200mm GaN-on-Si process is available to our program partners and is engineered to fit partner specific product needs.”

POET Technologies Inc., a developer of opto-electronics fabrication processes for the semiconductor industry, today announced that it has signed a definitive agreement to acquire all the shares of BB Photonics Inc., a private designer of Integrated Photonic solutions for the Data Communications market.   Upon completion of this transaction which is subject to applicable regulatory reviews and approvals, including approval of the TSX Venture Exchange, POET will own 100% of BB Photonics and its assets, including intellectual property and technologies, and there will be no liabilities assumed on Closing.

BB Photonics, a pre-revenue, New Jersey-based privately held photonics company currently develops Photonic Integrated Components for the Datacenter market utilizing a Platform Technology approach using Embedded Dielectric Technology, that is intended to enable on-chip athermal wavelength control and lower the total solution cost of datacenter photonic integrated circuits.

This strategic acquisition of BB Photonics will provide POET with additional differentiated intellectual property and know how for future product development at its facilities in Singapore recently acquired through the DenseLight transaction. Collectively this will enable POET to better service the end to end Data Communications market and additionally augment its sensing roadmap.

“The acquisition of BB Photonics helps bolster our Intellectual Property and know how in Integrated Photonic solutions and enables broad applications through its unique performance and cost capabilities. It is anticipated that these factors will allow us to expand, accelerate and complement our current roadmap”, said Dr. Suresh Venkatesan, POET’s Chief Executive Officer. “This is another synergistic and timely acquisition for us as we focus on providing our existing and future customers a broader range of differentiated photonics technologies.”

“BB Photonics is excited to be part of POET Technologies and to enable athermal multi-wavelength photonic integration in high speed Indium Phosphide devices”, said Bill Ring, Chief Executive Officer of BB Photonics.  “We look forward to working closely with POET and DenseLight to bring our differentiated IP to market and deliver meaningful shareholder value”.

POET will acquire 100% of the shares of BB Photonics from its shareholders in consideration of the issuance of approximately 2,000,000 common shares from POET’s treasury in this stock only transaction, subject to adjustment based on the increase or decrease in the US-CDN dollar exchange rate before Closing which is expected to take place no later than 30 days following the date of the agreement.

The issuance of the POET Shares is subject to compliance with all United States and Canada Federal and State or Provincial securities laws and regulations, and the rules of the TSX Venture Exchange. The POET Shares will be restricted and subject to resale restrictions as established by the TSX Venture Exchange and U.S. securities laws. The management shareholders of BB Photonics have agreed not to sell, transfer, pledge or otherwise dispose of the POET Shares for a period of six months, at which time such shareholders may each sell up to 25% of the POET Shares received by them. The management shareholders may sell an additional 25% of the POET Shares received by them after twelve months.  Thereafter, the management shareholders shall be able to sell the remaining shares after 24 months from Closing.  The non-management shareholders of BB may sell POET shares at various times and in various amounts at four, six and twelve month periods following issuance.

Worldwide silicon wafer area shipments increased during the first quarter 2016 when compared to fourth quarter 2015 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its quarterly analysis of the silicon wafer industry.

Total silicon wafer area shipments were 2,538 million square inches during the most recent quarter, a 1.3 percent increase from the 2,504 million square inches shipped during the previous quarter. However, new quarterly total area shipments are 3.8 percent lower than first quarter 2015 shipments.

“After two quarters of negative silicon shipment volume growth, the increase in silicon volume shipments in the most recent quarter is encouraging,” said Dr. Volker Braetsch, chairman SEMI SMG and senior vice president of Siltronic AG. “It remains to be seen if silicon shipment volumes will exceed the record amount shipped last year.”

Quarterly Silicon* Area Shipment Trends

Millions of Square Inches

1Q-2015

4Q-2015

1Q-2016
Total

2,637

2,504

2,538

Shipments are for semiconductor applications only and do not include solar applications

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

IC Insights will release its May Update to the 2016 McClean Report later this month.  This Update includes a discussion of the 1Q16 semiconductor industry market results, an update of the capital spending forecast by company, a review of the IC market by electronic system type, and a look at the top-25 1Q16 semiconductor suppliers (the top 20 1Q16 semiconductor suppliers are covered in this research bulletin).

The top-20 worldwide semiconductor (IC and O S D—optoelectronic, sensor, and discrete) sales ranking for 1Q16 is shown in Figure 1.  It includes eight suppliers headquartered in the U.S., three in Japan, three in Taiwan, three in Europe, two in South Korea, and one in Singapore, a relatively broad representation of geographic regions.

The top-20 ranking includes three pure-play foundries (TSMC, GlobalFoundries, and UMC) and six fabless companies. If the three pure-play foundries were excluded from the top-20 ranking, U.S.-based IDM ON Semiconductor ($817 million), China-based fabless supplier HiSilicon ($810 million), and Japan-based IDM Sharp ($800 million) would have been ranked in the 18th, 19th, and 20th positions, respectively.

IC Insights includes foundries in the top-20 semiconductor supplier ranking since it has always viewed the ranking as a top supplier list, not a marketshare ranking, and realizes that in some cases the semiconductor sales are double counted.  With many of our clients being vendors to the semiconductor industry (supplying equipment, chemicals, gases, etc.), excluding large IC manufacturers like the foundries would leave significant “holes” in the list of top semiconductor suppliers.  As shown in the listing, the foundries and fabless companies are identified.  In the April Update to The McClean Report, marketshare rankings of IC suppliers by product type were presented and foundries were excluded from these listings.

Overall, the top-20 list shown in Figure 1 is provided as a guideline to identify which companies are the leading semiconductor suppliers, whether they are IDMs, fabless companies, or foundries.

Figure 1

Figure 1

In total, the top-20 semiconductor companies’ sales declined by 6% in 1Q16/1Q15, one point less than the total worldwide semiconductor industry decline of 7%.  Although, in total, the top-20 1Q16 semiconductor companies registered a moderate 6% drop, there were seven companies that displayed a double-digit 1Q16/1Q15 decline and three that registered a ≥25% fall (with memory giants Micron and SK Hynix posting the worst results).  Half of the top-20 companies had sales of at least $2.0 billion in 1Q16.  As shown, it took $832 million in quarterly sales just to make it into the 1Q16 top-20 semiconductor supplier list.

There was one new entrant into the top-20 ranking in 1Q16—U.S.-based fabless supplier AMD.  AMD had a particularly rough 1Q16 and saw its sales drop 19% year-over-year to $832 million, which was about half the $1,589 million in sales the company logged just over two years ago in 4Q13.  Although AMD did not have a good 1Q16, Japan-based Sharp, the only company that fell from the top-20 ranking, faired even worse with its 1Q16/1Q15 sales plunging by 30%!

In order to allow for more useful year-over-year comparisons, acquired/merged semiconductor company sales results were combined for both 1Q15 and 1Q16, regardless of when the acquisition or merger occurred.  For example, although Intel’s acquisition of Altera did not close until late December of 2015, Altera’s 1Q15 sales ($435 million) were added to Intel’s 1Q15 sales ($11,632 million) to come up with the $12,067 million shown in Figure 1 for Intel’s 1Q15 sales.  The same method was used to calculate the 1Q15 sales for Broadcom Ltd. (Avago/Broadcom), NXP (NXP/Freescale), and GlobalFoundries (GlobalFoundries/IBM).

Apple is an anomaly in the top-20 ranking with regards to major semiconductor suppliers. The company designs and uses its processors only in its own products—there are no sales of the company’s MPUs to other system makers. Apple’s custom ARM-based SoC processors had a “sales value” of $1,390 million in 1Q16, up 10% from $1,260 million in 1Q15.  Apple’s MPUs have been used in 13 iPhone handset designs since 2007 and a dozen iPad tablet models since 2010 as well as in iPod portable media players, smartwatches, and Apple TV units.  Apple’s custom processors—such as the 64-bit A9 used in iPhone 6s and 6s Plus handsets introduced in September 2015 and the new iPhone 6SE launched in March 2016—are made by pure-play foundry TSMC and IDM foundry Samsung.

Intel remained firmly in control of the number one spot in 1Q16.  In fact, it increased its lead over Samsung’s semiconductor sales from 29% in 1Q15 to 40% in 1Q16.  The biggest moves in the ranking were made by the new Broadcom Ltd. (Avago/Broadcom) and Nvidia, each of which jumped up three positions in 1Q16 as compared to 1Q15.

As would be expected, given the possible acquisitions and mergers that could/will occur this year (e.g., Microchip/Atmel), as well as any new ones that may develop, the top-20 semiconductor ranking is likely to undergo a significant amount of upheaval over the next few years as the semiconductor industry continues along its path to maturity.