Category Archives: LEDs

Let there be light


June 17, 2016

University of Utah materials science and engineering associate professor Mike Scarpulla wants to shed light on semiconductors — literally.

Scarpulla and senior scientist Kirstin Alberi of the National Renewable Energy Laboratory in Golden, Colorado, have developed a theory that adding light during the manufacturing of semiconductors — the materials that make up the essential parts of computer chips, solar cells and light emitting diodes (LEDs) — can reduce defects and potentially make more efficient solar cells or brighter LEDs. The role of light in semiconductor manufacturing may help explain many puzzling differences between processing methods as well as unlock the potential of materials that could not be used previously.

Scarpulla and Alberi reported their findings in a paper titled “Suppression of Compensating Native Defect Formation During Semiconductor Processing Via Excess Carriers,” published June 16 in the journal, Scientific Reports. The research was funded by grants from the U.S. Department of Energy Office of Basic Energy Sciences.

Semiconductors are pure materials used to produce electronic components such as computer chips, solar cells, radios used in cellphones or LEDs. The theory developed by Scarpulla and Alberi applies to all semiconductors but is most exciting for compound semiconductors — such as gallium arsenide (GaAs), cadmium telluride (CdTe), or gallium nitride (GaN) — that are produced by combining two or more elements from the periodic table. GaAs is used in microwave radios in cellphones, CdTe in solar panels, and GaN in LED light bulbs.

The fact that compound semiconductors require more than one chemical element make them susceptible to defects in the material at an atomic scale, says Scarpulla, who also is a University of Utah electrical and computer engineering associate professor.

“Defects produce lots of effects like difficulty in controlling the conductivity of the material, difficulty in being able to turn sunlight into electricity efficiently in the case of solar cells or difficulty in emitting light efficiently in the case of LEDs,” he says.

For nearly a century, researchers have usually assumed that the numbers of these defects in semiconductors were uniquely defined by the temperature and pressure during processing. “We worked out a complete theory that couples light into that problem,” Scarpulla says.

The team discovered that if you add light while firing the material in a furnace at high temperatures, the light generates extra electrons that can change the composition of the material.

“We ran simulations of what happens,” Scarpulla says. “If you put a piece of a semiconductor in a furnace in the dark, you would get one set of properties from it. But when you shine light on it in the furnace, it turns out you suppress these more problematic defects. We think it may allow us to get around some tricky problems with certain materials that have prevented their use for decades. The exciting work is in the future though — actually testing these predictions to make better devices.”

The team is working to apply their theory to as many semiconductors as possible and testing the real world results. For example, the team believes this could improve the efficiency of solar panels that use thin films of cadmium telluride and even those made from silicon.

“It’s really cool to be working on this fundamental problem in semiconductors,” says Scarpulla. “Most of the ideas were worked out decades ago, so it is really exciting to be able to make a contribution to something fundamental. It feels like we have shined light onto a new path and we don’t know how far it will take us.”

Ultratech, Inc., a supplier of lithography, laser­ processing and inspection systems used to manufacture semiconductor devices and high­brightness LEDs (HB­ LEDs), as well as atomic layer deposition (ALD) systems, announced that its proprietary LXA nanosecond melt laser annealing technology enabled the world’s lowest contact resistivity for FinFETs in an R&D environment.  In collaboration with multiple companies, this record achievement, as well as additional results, was presented in a paper at the 2016 Symposia on VLSI Technology and Circuits held June 13-17, at the Hilton Hawaiian Village in Honolulu, Hawaii.

In the development of today’s advanced CMOS logic FinFET devices, the electrical resistance at the contact junction (contact resistance) is widely recognized to play an increasingly significant role in overall device performance. In larger device nodes, the contact pads provide a relatively large area over which to transfer electrical current. But as devices continue to shrink, so does the available area to form the contact, creating an electrical current bottleneck that reduces the performance of the device and impacts battery life. In order to realize the desired benefits of the scaled transistor architecture, including improved device performance and greater battery life, it will be necessary to make significant advancements over the current process. One emerging solution is to improve the characteristics of the contact by modifying the material properties of the contact using a unique nanosecond melt laser annealing technology. Using Ultratech’s patent pending LXA melt laser annealing technology these researchers reported world record results in contact resistance.

Yun Wang, Ph.D., Senior Vice President and Chief Technologist, Laser Processing at Ultratech, said, “The great achievement in lowering the contact resistivity for FinFETs is that it provides faster on/off switching of the transistor using the same input voltage. Since the input voltage doesn’t need to be increased to provide faster transistor switching, a low supply voltage can be maintained, which saves battery life.  The result is a FinFET transistor that operates very quickly at a lower voltage for faster performance and longer battery life. As we continue our R&D, we expect that Ultratech’s unique LXA nanosecond melt laser anneal technology will address a wide range of applications at the 7-nm and below nodes, and enable use of new materials anticipated at 5nm and below. We plan to use this record achievement as a benchmark to continue to improve our LXA technology.”

On Tuesday, June 14 at HAST, the paper by Hiroaki Niimi</span, Zuoguang Liu, Oleg Gluschenkov and others, titled, 'Sub-2×10-9 Ω‐cm2 N‐ and P-Contact Resistivity with Si:P and Ge:Ga Metastable Alloys for FinFET CMOS  Technology' was presented during Session 7 – Contact Resistance Innovations for Sub‐10nm Scaling, at the 2016 Symposia on VLSI Technology and Circuits.

Ultratech’s LXA Nanosecond Melt Laser Annealing Technology

Ultratech’s LXA technology is a proprietary technology for achieving nanosecond anneal utilizing a millisecond process in-situ with a nanosecond spike anneal to provide ultra-low thermal budget with added process flexibility for a wide range of materials and applications. The LXA technology is targeted for advanced junction formation, contact anneal, and multiple middle-of-line applications.  As more exotic materials are used for 7nm and below devices, it is expected that Ultratech’s LXA nanosecond melt laser annealing technology will play a bigger role and include wider applications in the manufacture of leading-edge transistors.

WPG Americas Inc. (WPGa) a subsidiary of WPG Holdings, announced today it has signed a new agreement with Seoul Semiconductor the world’s fifth largest LED supplier to distribute their full complete line of products. The company’s product portfolio includes a wide array of package and device choices such as AC driven LEDs, high-brightness LEDs, mid-power LEDs, side-view LEDs, through-hole type LED lamps, custom displays, UV LEDs and sensors.

“We are excited to add Seoul Semiconductor to our LED Lighting portfolio.  Seoul strengthens our total LED Lighting solutions for our customers with the addition of their highly competitive Mid-power offering and ACRICH products for direct AC applications,” said Rich Davis, President of WPG Americas Inc.

“As the LED market continues to grow, we are glad to expand our distribution channel through WPGA to reach into the vast client base in the Americas. WPGA’s strength in demand creation, solution selling and operational excellence is a huge asset that Seoulcan lean on for profitable growth,” said Kyu Uhm, Executive Vice President of World Wide Marketing at Seoul Semiconductor, Inc.

Perovskite materials have shown great promise for use in next-generation solar cells, light-emitting devices (LEDs), sensors, and other applications, but their instability remains a critical limitation.

Researchers at UC Santa Cruz attacked this problem by focusing on perovskite nanocrystals, in which the instability problems are magnified by the large surface area of the particles relative to their volume. Atoms on the surface are vulnerable to reactions that can degrade the material, so molecules that bind to the surface–called surface ligands or capping ligands–are used both to stabilize perovskite nanocrystals and to control their properties.

In a paper published June 13 in Angewandte Chemie, the UCSC researchers reported the results of experiments using unique branched ligands to synthesize perovskite nanocrystals with greatly improved stability and uniform particle size.

“This new strategy to stabilize organometal-halide perovskites is an important step in the right direction,” said corresponding author Jin Zhang, professor of chemistry and biochemistry at UC Santa Cruz. “Our hope is that this could be used not only for perovskite nanocrystals but also for bulk materials and thin films used in applications such as photovoltaics.”

Zhang’s team tested the effects of different types of capping ligands on the stability of perovskite nanocrystals. Conventional perovskite nanocrystals capped with ligands consisting of long straight-chain amines show poor stability in solvents such as water and alcohol. Zhang’s lab identified unique branched molecules that proved much more effective as capping ligands.

According to Zhang, the branching structure of the ligands protects the surface of the nanocrystals by occupying more space than straight-chain molecules, creating a mechanical barrier through an effect known as steric hindrance. “The branching molecules are more cone-shaped, which increases steric hindrance and makes it harder for the solvent to access the surface of the nanocrystals,” he said.

The researchers were able to control the size of the nanocrystals by adjusting the amount of branched capping ligands used during synthesis. They could obtain uniform perovskite nanocrystals in sizes ranging from 2.5 to 100 nanometers, with high photoluminescence quantum yield, a measure of fluorescence that is critical to the performance of perovskites in a variety of applications.

Zhang’s lab is exploring the use of perovskite nanocrystals in sensors to detect specific chemicals. He is also working with UC Santa Cruz physicist Sue Carter on the use of perovskite thin films in photovoltaic cells for solar energy applications.

Almost two years after GTAT’s bankruptcy, the sapphire industry is still there. Its decor and characters have, of course, changed but the story is still unfolding. Survival strategies, emerging applications and niche markets, mergers and acquisitions. All the protagonists are contributing to altering the landscape, trying to identify new business opportunities to absorb the sapphire overcapacity. China is a major contributor to the story with new investments and emerging companies in this already saturated industry. What is the impact on the sapphire supply chain? What are the strategies to be adopted to succeed? What are the long-term perspectives?

Figure 1

Figure 1

In this tense economic environment, Yole Développement (Yole) and its partner CIOE are organizing a 1.5 day conference to learn more about the status of the sapphire industry. The event will provide an opportunity for all the participants to discuss the future of this industry and to find answers. Sapphire is now more affordable than ever and new capabilities have enabled the manufacturing of components for very diverse applications. The 2nd International Forum on Sapphire Market & Technologies is the place to be to understand today’s economic and technical challenges and build tomorrow’s industry.

The Yole & CIOE Forum will take place from September 6 to 7 in Shenzhen, China, alongside the 18th China International Optoelectronic Expo 2016. To find out more about this event, visit: Sapphire Forum Agenda – Sapphire Forum Registration.

Figure 2

Figure 2

 The LED sector still has the highest demand for sapphire, but the expected volumes cannot sustain the one hundred or so sapphire producers currently competing in the industry.
Some sapphire companies are leaving the most commoditized markets and shifting their development strategies toward niche markets with higher added-value such as medical, industrial and military applications. Other business opportunities could materialize, including microLED arrays and other consumer applications.

Most sapphire companies are chasing any opportunity to survive and optimize their cost structure within a market which is currently characterized by a relentless price war. In Q1- 2016, the sapphire price plunged to its lowest ever level and most companies experienced a drastic decrease in revenue.

In this highly competitive market with significant economic constraints, Yole and CIOE are organizing the 2nd International Forum on Sapphire Market & Technologies (Shenzhen, China – September 6&7, 2016).

“The Sapphire Forum is an opportunity for the entire supply chain to come together to assess the current status of the industry, understand what lies ahead and determine the best strategies to make it through the crisis”, comments Dr. Eric Virey, Senior Technology & Market Analyst, Yole.

By Debra Vogler, SEMI

A forum of industry experts at SEMICON West 2016 will discuss the challenges associated with getting from node 10 — which seems set for HVM — to nodes 7 and 5. Confirmed speakers at the “Node 10 to Node 5 ─ Dealing with the Slower Pace of Traditional Scaling (Track 2)” session on Tuesday, July 12, 2:00pm-4:00pm, are Lode Lauwers (imec), Guy Blalock (IM Flash), Kelvin Low (Samsung), Mike Chudzik (Applied Materials), Kevin Heidrich (Nanometrics), and David Dutton (Silvaco). SEMI interviewed Lauwers and Chudzik to see what challenges they see ahead as the industry progresses from node 7 to node 5.

According to Mike Chudzik, senior director, Cross-Business Unit Modules Team at Applied Materials, “The top tw or three process development challenges facing the industry at node 7 are RC reduction, RC reduction, and RC reduction,” Chudzik told SEMI. “At the 7nm node, parasitic resistance and parasitic capacitance delays are predicted to be greater than the inherent transistor delay.” Among the solutions he cites are new materials such as cobalt for the contact fill, lower-k spacers, and integration solutions, such as air-gap and replacement contact schemes. “While FinFETs are expected to scale to the 7nm node, their days are numbered. If you want to scale to the true historical 0.7X 7nm node, it’s a challenge for FinFETs because continuing to scale the gate length requires scaling the fin width.” He also explained that the variability in patterned fins will cause serious device performance challenges at near 5nm fin width on account of quantum confinement. “Something new like gate-all-around (GAA) devices are needed to fuel the next-generation of device scaling.”

Figure 1: At the 7nm node (CD of 13nm), the resistance of the TiN/W fill materials for the contact plug is expected to become higher than the interfacial contact resistance. SOURCE: Applied Materials

Figure 1: At the 7nm node (CD of 13nm), the resistance of the TiN/W fill materials for the contact plug is expected to become higher than the interfacial contact resistance. SOURCE: Applied Materials

Among the materials challenges in getting to nodes 7 and 5 are cobalt implementation for the contact, and Si/SiGe superlattices for the 5nm node, explained Chudzik. “The former challenge concerns replacing tungsten in the contact plug, and the latter is needed to form horizontal GAA structures.” Figure 1 shows that at the 7nm node (CD of 13nm) the resistance of the TiN/W fill material for the contact plug is expected to become higher than the interfacial contact resistance. “A TiN/Co solution provides relief.”

In addition to improving the performance of the interconnect, Lode Lauwers, VP, business development for CMOS technology at imec, told SEMI that getting to node 7 will require very advanced fin technology combined with a patterning solution. Looking ahead to node 5, he said it is expected that the fin will still be the reference technology, along with the introduction of new materials such as SiGe, and a high concentration of Ge in the channel as a mobility improvement, and possibly even the consideration of III-V materials (particularly at N5) (see Figures 2 and 3).

Figure 2: Performance and energy efficiency roadmap: devices architectures. SOURCE: imec

Figure 2: Performance and energy efficiency roadmap: devices architectures. SOURCE: imec

Figure 3: Performance and energy efficiency roadmap: transistor features that are driving the logic roadmap. SOURCE: imec

Figure 3: Performance and energy efficiency roadmap: transistor features that are driving the logic roadmap. SOURCE: imec

In looking out towards the horizon, Lauwers pointed out that the industry has to consider alternatives to the fin because there is an engineering limit to how small the fin dimensions can be made. “There is the possibility that at node 5 the industry will consider alternatives to the traditional fin, said Lauwers. “For example, the GAA structure (also referred to as a lateral or horizontal nanowire, HGAA) is superior in terms of gate control and will have better leakage control. That means you will be able to have better performance over a lower supply voltage with a lower threshold voltage.”

Beyond HGAA structures, Lauwers observed that the industry could move to a vertical nanowire structure (VGAA). But there are several contenders (see Figure 2). “It’s not up to imec to choose and it’s too early to say what will be the right option,” Lauwers told SEMI. “Maybe for certain applications or a certain technology positioning, a device maker might make a different compromise.”

In addition to imec and Applied Materials, speakers from IM Flash, Nanometrics, Samsung, and Silvaco will present at the “Scaling: Node 10 to Node 5” session of the three-day Advanced Manufacturing Forum (see Schedule-at-a-Glance) at SEMICON West 2016 which takes place July 12-14 in San Francisco, Calif.

Today, SEMI announced that 19 new fabs and lines are forecasted to begin construction in 2016 and 2017, according to the latest update of the SEMI World Fab Forecast report. While semiconductor fab equipment spending is off to a slow start in 2016, it is expected to gain momentum through the end of the year. For 2016, 1.5 percent growth over 2015 is expected while 13 percent growth is forecast in 2017.

Fab equipment spending ─ including new, secondary, and in-house ─ was down 2 percent in 2015. However, activity in the 3D NAND, 10nm Logic, and Foundry segments is expected to push equipment spending up to US$36 billion in 2016, 1.5 percent over 2015, and to $40.7 billion in 2017, up 13 percent. Equipment will be purchased for existing fabs, lines that are being converted to leading-edge technology, as well as equipment going into new fabs and lines that began construction in the prior year.

Table 1 shows the regions where new fabs and lines are expected to be built in 2016 and 2017. These projects have a probability of 60 percent or higher, according to SEMI’s data. While some projects are already underway, others may be subject to delays or pushed into the following year. The SEMI World Fab Forecast report, published May 31, 2016, provides more details about the construction boom.

new fab lines

Breaking down the 19 projects by wafer size, 12 of the fabs and lines are for 300mm (12-inch), four for 200mm, and three LED fabs (150mm, 100mm, and 50mm). Not including LEDs, the potential installed capacity of all these fabs and lines is estimated at almost 210,000 wafer starts per month (in 300mm equivalents) for fabs beginning construction in 2016 and 330,000 wafer starts per month (in 300mm equivalents) for fabs beginning construction in 2017.

In addition to announced and planned new fabs and lines, SEMI’s World Fab Forecast provides information about existing fabs and lines with associated construction spending, e.g. when a cleanroom is converted to a larger wafer size or a different product type.

In addition, the transition to leading-edge technologies (as we can see in planar technologies, but also in 3D technologies) creates a reduction in installed capacity within an existing fab. To compensate for this reduction, more conversions of older fabs may take place, but also additional new fabs and lines may begin construction.

For insight into semiconductor manufacturing in 2016 and 2017 with details about capex for construction projects, fab equipping, technology levels, and products, visit the SEMI Fab Database webpage and order the SEMI World Fab Forecast Report. The report, in Excel format, tracks spending and capacities for over 1,100 facilities including over 60 future facilities, across industry segments from Analog, Power, Logic, MPU, Memory, and Foundry to MEMS and LEDs facilities.

The SEMI High Tech U learning program commenced April 20-22 in Hsinchu, Taiwan. Co-hosted by SEMI, KLA-Tencor Taiwan, and National Tsing Hua University, the three-day event offered 40 high school students an in-depth interactive learning experience in Science, Technology, Engineering, and Mathematics (STEM). Since SEMI High Tech U began in 2001, it has hosted 190 career exploration programs in eight different countries with over 6,000 high school students attending. The High Tech U programs have received a tremendous response globally.

This year, Taiwan was a host country for the first time. Terry Tsao, president of SEMI Taiwan, said, “The goal of High Tech U is to help young people gain knowledge and develop interests in STEM before choosing their future academic pursuit. Not only did Taiwanese high school students have the opportunity to attend this international STEM immersion program, but they also interacted with industry volunteers who serve in the high-tech industry.” Through group activities and firsthand experience, students thoroughly explored technology, adding to their ability to understand their future career directions.

“In the U.S., KLA-Tencor has collaborated with SEMI to hold seven SEMI HTU (High Tech U) programs. The first-ever Taiwan course design, instructor training, and the local operations planning, were tailored to inspire Taiwanese students to have better understanding of their direction and passion towards the semiconductor industry and their future goals,” said Tom Wang, CEO of KLA-Tencor Corporation Taiwan. Many employees at KLA-Tencor Taiwan volunteered to be course instructors and advisors to share their professional experience at SEMI High Tech U. In addition to providing guided tours at KLA-Tencor’s learning and training center cleanroom, the volunteers also held mock interviews with the students.

Nyan-Hwa Tai, dean of Academic Affairs at National Tsing Hua University, said “Courses at SEMI High Tech U are designed to gain practical experience through a non-conventional approach, which coincides with the values of innovative exploration at National Tsing Hua University.”

In three days, the students did practical exercises, learning individually and in groups. Tsao pointed out that “During the three-day program, students demonstrated a high level of enthusiasm, confidence, creativity, and team spirit, which is commendable. This event is just the beginning; SEMI will strive to expand the High Tech U program in Taiwan and allow more students to have the opportunity to participate.”

Learn more about the SEMI Foundation and High Tech U here: www.semi.org/en/semi-foundation. For more information about SEMI, visit www.semi.org and follow SEMI on LinkedIn and Twitter.

Imagine a device that is selectively transparent to various wavelengths of light at one moment, and opaque to them the next, following a minute adjustment.

Such a gatekeeper would enable powerful and unique capabilities in a wide range of electronic, optical and other applications, including those that rely on transistors or other components that switch on and off.

In a May 20 paper in the journal Physical Review Letters, researchers in the University at Buffalo School of Engineering and Applied Sciences report a discovery that brings us one step closer to this imagined future.

A photograph (left) shows the experimental set-up used to confirm the existence of the Bloch wave resonance, which was first predicted theoretically. An illustration (right) shows the interior of the experimental device, called a hollow periodic waveguide, which consists of two corrugated metallic plates separated by a variable distance of about one inch, and the upper plate can slide with respect to the lower. When researchers shot microwaves between the plates through the air, they were able to control which wavelengths of microwaves were allowed through by varying the position of the upper plate. Credit: Lab of Victor Pogrebnyak/University at Buffalo

A photograph (left) shows the experimental set-up used to confirm the existence of the Bloch wave resonance, which was first predicted theoretically. An illustration (right) shows the interior of the experimental device, called a hollow periodic waveguide, which consists of two corrugated metallic plates separated by a variable distance of about one inch, and the upper plate can slide with respect to the lower. When researchers shot microwaves between the plates through the air, they were able to control which wavelengths of microwaves were allowed through by varying the position of the upper plate. Credit: Lab of Victor Pogrebnyak/University at Buffalo

The finding has to do with materials that are periodic, which means that they’re made up of parts or units that repeat. Crystals fall into this category, as do certain parts of the wings of butterflies, whose periodic structure helps give them color by reflecting specific colors of light.

Scientists have known since the early 20th century that periodic materials have special qualities when it comes to light. Such materials can reflect light, as butterfly wings do, and if you understand the internal structure of a periodic material, you can use an equation called Bragg’s law to determine which wavelengths will pass through the material, and which will be blocked due to reflection.

The new UB study shows that a completely periodic material structure is not needed for this kind of predictable reflection to take place.

Similar effects occur when you sandwich a non-periodic material between two boundary layers of material that have a periodic shape. This set-up will be transparent to certain wavelengths of light and opaque to others, and engineers can quickly alter which wavelengths are allowed through by simply moving one of the periodic boundaries.

Better yet, the effect not only applies to light waves, but rather to a broad range of wave phenomena that span the quantum to the continuum scale.

“We have shown that Bragg’s law is a special case of a more generalized phenomenon that was discovered in this study and named as a Bloch wave resonance,” said Victor A. Pogrebnyak, an adjunct associate professor of electrical engineering at UB. “This discovery opens up new opportunities in photonics, nanoelectronics, optics and acoustics and many other areas of science and technology that exploit band gap wave phenomena for practical use.”

“Electrons behave as waves that can also exhibit a Bloch resonance, which can be used as a powerful method to control currents in nanoelectronic circuits,” said Edward Furlani, Pogrebnyak’s co-author and a UB professor in the Departments of Chemical and Biological Engineering and Electrical Engineering.

A key advantage that Bloch wave resonance offers: It enables the blocking of a larger range of wavelengths simultaneously than previously known effects described by Bragg’s law.

Applications that could take advantage of this broader “band gap” range include white light lasers and a new type of fast-switching transistor.