Category Archives: LEDs

Researchers at Aalto University, Finland have developed a new method to implement different types of nanowires side-by-side into a single array on a single substrate. The new technique makes it possible to use different semiconductor materials for the different types of nanowires.

‘We have succeeded in combining nanowires grown by the VLS (vapor-liquid-solid) and SAE (selective-area epitaxy) techniques onto the same platform. The difference compared with studies conducted previously on the same topic is that in the dual-type array the different materials do not grow in the same nanowire, but rather as separate wires on the same substrate’, says Docent Teppo Huhtio.

The research results were published in the Nano Letters journal on 5 February 2015.

Several applications 

The new fabrication process has many phases. First, gold nanoparticles are spread on a substrate. Next, the substrate is coated with silicon oxide, into which small holes are then patterned using electron beam lithography. In the first step of growth, (SAE), nanowires grow from where the holes are located, after which the silicon oxide is removed. In the second phase different types of nanowires are grown with the help of the gold nanoparticles (VLS). The researchers used metalorganic vapor phase epitaxy reactor in which the starting materials decompose at a high temperature, forming semiconductor compounds on the substrate.

“In this way we managed to combine two growth methods into the same process,” says doctoral candidate Joona-Pekko Kakko.

“We noticed in optical reflection measurements that light couples better to this kind of combination structure. For instance, a solar cell has less reflection and better absorption of light,” Huhtio adds.

In addition to solar cells and LEDs, the researchers also see good applications in thermoelectric generators. Further processing for component applications has already begun.

Nanowires are being intensely researched, because semiconductor components that are currently in use need to be made smaller and more cost-effective. The nanowires made out of semiconductor materials are typically 1-10 micrometres in length, with diameters of 5-100 nanometres.

The annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2015) will be held May 3-6 in Saratoga Springs, New York. The conference will feature 37 hours of technical presentations and 90+ speakers covering all aspects of advanced semiconductor manufacturing. This year’s event features a panel discussion on “Semiconductor Manufacturing: Keeping the Silicon Magic Alive,” with panelists from DARPA, GE Global Research, Lam Research and Rochester Institute of Technology.  The event features a tutorial on graphene presented by Dr. Paul L. McEuen, professor of Physics, Cornell University, and a second tutorial, on memory, presented by Dr. Gurtej Sandhu, IEEE Fellow and director of Advanced Technology Development at Micron Technology, Inc.

ASMC 2015 offers keynote talks by Dr. Thomas Caulfield, senior VP and GM of GLOBALFOUNDRIES; Dr. Frances M. Ross of the Nanoscale Materials Analysis Department at T.J. Watson Research Center, IBM Corporation; and Robert Maire, president of Semiconductor Advisors LLC.

ASMC technology tracks and poster presenters will address numerous topics, including:

  • 3D/TSV
  • Advanced Equipment and Materials
  • Advanced Metrology
  • Advanced Patterning/Design for Manufacturing
  • Advanced Process Control (APC)
  • Contamination Free Manufacturing (CFM)
  • Data and Yield Management; Defect Inspection
  • Equipment Reliability and Productivity Enhancement
  • Factory Optimization
  • Yield and Reliability Enhancement

ASMC also holds an interactive poster session and reception, which provides an ideal opportunity for networking between authors and conference attendees. During this session, participants can engage authors in in-depth discussions of a wide range of issues.

ASMC 2015 corporate sponsors include Applied Materials, ChemTrace, CNW, Edwards, KLA-Tencor, NY Loves Nanotech, and MSP.  Technical and supporting sponsors include: Institute of Electrical & Electronics Engineers (IEEE); IEEE Electron Devices Society (EDS); and IEEE Components, Packaging and Manufacturing Technology Society (CPMT); Saratoga Convention & Tourism Board; and Saratoga Economic Development Corporation (SEDC).

Registration for ASMC 2015 is available at www.semi.org/asmc2015.

The inaugural SEMICON Southeast Asia, will run from 22–24 April at the Subterranean Penang International Convention and Exhibition Centre (SPICE) in Penang, Malaysia. The event promises to be larger and more comprehensive than its predecessor SEMICON Singapore, which has been held annually since 1993, with an expanded programme and larger audience base focusing on Southeast Asia communities in the semiconductor and microelectronics sector. The expanded strategy for the new SEMICON Southeast Asia Show — between Singapore, Malaysia and potentially the rest of the regions — will open new business opportunities for customers and foster stronger cross-regional engagement, according to SEMI, the event organiser. SEMICON Southeast Asia will feature a tradeshow exhibition, networking events, market and technology seminars, and conferences.

The event will connect decision makers from leading and emerging semiconductor companies with important industry stakeholders from both the region and all over the world.  Penang was selected for the inaugural SEMICON Southeast Asia exhibition because of its reputation as the “Silicon Valley of the East” and Malaysia’s vibrant eco-system, coupled with the drive and support from the state government.  Focusing on key trends and technologies in semiconductor design and manufacturing, the event also addresses expanding applications markets like mobile devices and other connected “Internet of Things” (IoT) technologies, many of which require development of specialised materials, packaging, and test technologies, as well as new architectures and processes.

For 2015 and 2016, SEMI estimates spending of almost US$ 5 billion on front-end and back-end equipment in the Southeast Asia region, and another $14 billion in spending on materials including $11 billion on packaging-related materials. In addition, according to the SEMI (www.semi.org) World Fab Forecast, Southeast Asia is home to over 35 production fabs covering Foundry, Compound Semiconductors, MEMS, Power, LED, and other devices.

Ng Kai Fai, President of SEMI Southeast Asia, said, “Southeast Asia is a significant and exciting market for the semiconductor industry. In fact, the region contributes a substantial 27 percent of global assembly, test and production, on top of being the largest market for assembly and test equipment.”

“SEMICON Southeast Asia is a natural progression from its earlier SEMICON Singapore exhibition and actively unites industry participants throughout the region. In addition to offering a deep networking opportunity for industry stakeholders, the event is also a catalyst for industry players within the region to collaborate and innovate to become larger players in this US$ 19 billion industry. This year, we expect about 60 industry speakers and close to 200 companies to participate in SEMICON Southeast Asia,” he added.

According to En. Zulkefli Haji Sharif, CEO of Malaysia Convention & Exhibition Bureau, “We are delighted to be able to host SEMICON Southeast Asia here in 2015. This prestigious event will showcase the best of the semiconductor industry and attendees can expect to find out more about the latest developments in microelectronics field. We have the utmost confidence that Penang will live up to all expectations as an attractive business events destination, and that the event will be a benefit to local and global players alike.”

Early-bird pricing on paid programmes ends 20 March, so register now. For more information and exhibition opportunities, visit www.semiconsea.org.

North America-based manufacturers of semiconductor equipment posted $1.31 billion in orders worldwide in January 2015 (three-month average basis) and a book-to-bill ratio of 1.03, according to the January EMDS Book-to-Bill Report published today by SEMI.   A book-to-bill of 1.03 means that $103 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in January 2015 was $1.31 billion. The bookings figure is 4.9 percent lower than the final December 2014 level of $1.38 billion, and is 2.6 percent higher than the January 2014 order level of $1.28 billion.

The three-month average of worldwide billings in January 2015 was $1.28 billion. The billings figure is 8.6 percent lower than the final December 2014 level of $1.40 billion, and is 3.5 percent higher than the January 2014 billings level of $1.23 billion.

“2014 was a strong growth year for the semiconductor equipment industry, and both bookings and billings at the start of this year are comparable to the early 2014 figures,” said SEMI president and CEO Denny McGuirk. “Given the positive outlook for the semiconductor industry in 2015 and based on current capex announcements, we expect the equipment market to continue to grow this year.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
August 2014 

$1,293.4

$1,346.1

1.04
September 2014 

$1,256.5

$1,186.2

0.94
October 2014 

$1,184.2

$1,102.3

0.93
November 2014 

$1,189.4

$1,216.8

1.02
December 2014 (final)

$1,395.9

$1,381.5

0.99
January 2015 (prelim)

$1,276.3

$1,313.6

1.03

Source: SEMI, February 2015

Pulsed measurements are defined in Part 1, and common pulsed measurement challenges are discussed in Part 2.

By DAVID WYBAN, Keithley Instruments, a Tektronix Company, Solon, Ohio

Performing a DC measurement starts with applying the test signal (typically a DC voltage), then waiting long enough for all the transients in the DUT and the test system to settle out. The measurements themselves are typically performed using a sigma-delta or integrating-type analog-to-digital converter (ADC). The conversion takes place over one or more power line cycles to eliminate noise in the measurements due to ambient power line noise in the test environment. Multiple measurements are often averaged to increase accuracy. It can take 100ms or longer to acquire a single reading using DC measurement techniques.

In contrast, pulsed measurements are fast. The test signal is applied only briefly before the signal is returned to some base level. To fit measurements into these short windows, sigma-delta ADCs are run at sub-power-line interval integration times; sometimes, the even faster successive approximation register (SAR) type ADCs are used. Because of these high speeds, readings from pulsed measurements are noisier than readings returned by DC measurements. However, in on-wafer semiconductor testing, pulse testing techniques are essential to prevent device damage or destruction. Wafers have no heat sinking to pull away heat generated by current flow; if DC currents were used, the heat would increase rapidly until the device was destroyed. Pulse testing allows applying test signals for very short periods, avoiding this heat buildup and damage.

Why use pulsed measurements?

The most common reason for using pulsed measurements is to reduce joule heating (i.e., device self-heating). When a test signal is applied to a DUT, the device consumes power and turns it into heat, increasing the device’s temperature. The longer that power is applied, the hotter the device becomes, which affects its electrical characteristics. If a DUT’s temperature can’t be kept constant, it can’t be characterized accurately. However, with pulsed testing, power is only applied to the DUT briefly, minimizing self-heating. Duty cycles of 1 percent or less are recommended to reduce the average power dissipated by the device over time. Pulsed measurements are designed to minimize the power applied to the device so much that its internal temperature rise is nearly zero, so heating will have little or no effect on the measurements.

Because they minimize joule heating, pulsed measurements are widely used in nanotechnology research, such as when characterizing delicate materials and structures like CNT FETs, semiconductor nanowires, graphene-based devices, molecular- based electronics and MEMs structures. The heat produced with traditional DC measurement techniques could easily alter or destroy them.

To survive high levels of continuous DC power, devices like MOSFETs and IGBTs require packaging with a solid metal backing and even heat-sinking. However, during the early stages of device development, packaging these experimental devices would be much too costly and time consuming, so early testing is performed at the wafer level. Because pulsed testing minimizes the power applied to a device, it allows for complete characterization of these devices on the probe station, reducing the cost of test.

The reduction in joule heating that pulsed testing allows also simplifies the process of characterizing devices at varying temperatures. Semiconductor devices are typically so small that it is impossible
to measure their temperature directly with a probe. With pulsed measurements, however, the self- heating of the device can be made so insignificant that its internal temperature can be assumed to be equal to the surrounding ambient temperature. To characterize the device at a specific temperature, simply change the surrounding ambient temperature with a thermal chamber or temperature-controlled heat sink. Once the device has reached thermal equilibrium at the new ambient temperature, repeat the pulsed measurements to characterize the device at the new temperature.

Pulsed measurements are also useful for extending instruments’ operating boundaries. A growing number of power semiconductor devices are capable of operating at 100A or higher, but building an instrument capable of sourcing this much DC current would be prohibitive. However, when delivering pulse mode power, these high power outputs are only for very short intervals, which can be done by storing the required energy from a smaller power supply within capacitors and delivering it all in one short burst. This allows instruments like the Model 2651A High Power SourceMeter SMU instrument to combine sourcing up to 50A with precision current and voltage measurements.

Pulsed I-V vs. transient measurements

Pulsed measurements come in two forms, pulsed I-V and transient. Pulsed I-V (FIGURE 1) is a technique for gathering DC-like current vs. voltage curves using pulses rather than DC signals. In the pulsed I-V technique, the current and voltage is measured near the end of the flat top of the pulse, before the falling edge. In this technique, the shape of the pulse is extremely important because it determines the quality of the measurement. If the top of the pulse has not settled before this measurement is taken, the resulting reading will be noisy and or incorrect. Sigma-delta or integrating ADCs should be configured to perform their conversion over as much of this flat top as possible to maximize accuracy and reduce measurement noise.

FIGURE 1. Pulse I-V technique.

FIGURE 1. Pulse I-V technique.

Two techniques can improve the accuracy of pulsed I-V measurements. If the width of the pulse and measurement speed permit, multiple measurements made during the flat portion of the pulse can be averaged together to create a “spot mean” measurement. This technique is commonly employed with instruments that use high speed Summation Approximation Register (SAR) ADCs, which perform conversions quickly, often at rates of 1μs per sample or faster, thereby sacrificing resolution for speed. At these high speeds, many samples can be made during the flat portion of the pulse. Averaging as many samples as possible enhances the resolution of the measurements and reduces noise. Many instruments have averaging filters that can be used to produce a single reading. If even greater accuracy is required, the measurement can be repeated over several pulses and the readings averaged to get a single reading. To obtain valid results using this method, the individual pulsed measurements should be made in quick succession to avoid variations in the readings due to changes in temperature or humidity.

Transient pulsed measurements (FIGURE 2) are performed by sampling the signal at high speed to create a signal vs. time waveform. An oscilloscope is often used for these measurements but they can also be made with traditional DC instruments by running the ADCs at high speed. Some DC instruments even include high-speed SAR type ADCs for performing transient pulsed measurements. Transient measurements are useful for investigating device behaviors like self-heating and charge trapping.

FIGURE 2. Transient pulse measurements.

FIGURE 2. Transient pulse measurements.

Instrumentation options

The simplest pulse measurement instrumentation option is a pulse generator to source the pulse combined with an oscilloscope to measure the pulse (FIGURE 3). Voltage measurements can be made by connecting a probe from the scope directly to the DUT; current measurements can be made by connecting a current probe around one of the DUT test leads. If a current probe is unavailable, a precision shunt resistor can be placed in series with the device and the voltage across the shunt measured with a standard probe, then converted to current using a math function in the scope. This simple setup offers a variety of advantages. Pulse generators provide full control over pulse width, pulse period, rise time and fall time. They are capable of pulse widths as narrow as 10 nanoseconds and rise and fall times as short as 2-3 nanoseconds. Oscilloscopes are ideal for transient pulse measurements because of their ability to sample the signal at very high speeds.

FIGURE 3. Pulse measurement using a pulse generator and an oscilloscope. Voltage is measured across the device with a voltage probe and current through the device is measured with a current probe.

FIGURE 3. Pulse measurement using a pulse generator and an oscilloscope. Voltage is measured across the device with a voltage probe and current through the device is measured with a current probe.

Although a simple pulse generator/oscilloscope combination is good for fast transient pulse measurements, it’s not appropriate for all pulse measurement applications. A scope’s measurement resolution is relatively low (8–12 bits). Because scopes are designed to capture waveforms, they’re not well suited for making pulse I-V measurements. Although the built-in pulse measure functions can help with measuring the level of a pulse, this represents only a single point on the I-V curve. Generating a complete curve with this setup would be time consuming, requiring either manual data collection or a lot of programming. Pulse generators are typically limited to outputting 10-20V max with a current delivery capability of only a couple hundred milliamps, which would limit this setup to lower power devices and/or lower power tests. Test setup can also be complex. Getting the desired voltage at the device requires impedance matching with the pulse generator. If a shunt resistor is used to measure current, then the voltage drop across this resistor must be taken into account as well.

Curve tracers were all-in-one instruments designed specifically for I-V characterization of 2- and 3-terminal power semiconductor devices. They featured high current and high voltage supplies for stimulating the device and a configurable voltage/ current source for stimulating the device’s control terminal, a built-in test fixture for making connections, a scope like display for real-time feedback, and a knob for controlling the magnitude of the output. However, Source measure unit (SMU) instruments (FIGURE 4) have now largely taken up the functions they once performed.

FIGURE 4. Model 2620B System SourceMeter SMU instrument.

FIGURE 4. Model 2620B System SourceMeter SMU instrument.

SMU instruments combine the source capabilities of a precision power supply with the measurement capabilities of a high accuracy DMM. Although originally designed for making extremely accurate DC measurements, SMU instruments have been enhanced to include pulse measurement capabilities as well. These instruments can source much higher currents in pulse mode than in DC mode. For example, the Keithley Model 2602B SourceMeter SMU instrument can output up to 3A DC and up to 10A pulsed. For applications that require even high currents, the Model 2651A SourceMeter SMU instrument can output up 20A DC or 50A pulsed. If two Model 2651As are configured in parallel, pulse current outputs up to 100A are possible.

SMU instruments can source both voltage and current with high accuracy thanks to an active feedback loop that monitors the output and adjusts it as necessary to achieve the programmed output value. They can even sense voltage remotely, directly at the DUT, using a second set of test leads, ensuring the correct voltage at the device. These instruments measure with high precision as well, with dual 28-bit delta-sigma or integrating-type ADCs. Using these ADCs along with their flexible sourcing engines, SMUs can perform very accurate pulse I-V measurement sweeps to characterize devices. Some, including the Model 2651A, also include two SAR-type ADCs that can sample at 1 mega-sample per second with 18-bit resolution, making them excellent for transient pulse measurements as well.

In addition, some SMU instruments offer excellent low current capability, with ranges as low as 100pA with 100aA resolution. Their wide dynamic range makes SMU instruments an excellent choice for both ON- and OFF-state device characterization. Also, because they combine sourcing and measurement in a single instrument, SMU instruments reduce the number of instruments involved, which not only simplifies triggering and programming but reduces the overall cost of test.

Although SMU instruments are often used for pulse measurements, they don’t operate in the same way as a typical pulse generator. For example, an SMU instrument’s rise and fall times cannot be controlled by the user; they depend on the instrument’s gain and bandwidth of the feedback loop. Because these loops are designed to generate little or no overshoot when stepping the source, the minimum width of the pulses they produce are not as short as those possible from a pulse generator. However, an SMU instrument can produce pulse widths as short as 50–100μs, which minimizes device self-heating.

The terminology used to describe a pulse when using SMU instruments differs slightly from that used with pulse generators. Rather than referring to the output levels in the pulse as amplitude and base or the high level and the low level, with SMU instruments, the high level is referred to as the pulse level and the low level as the bias level. The term bias level originates from the SMU’s roots in DC testing where one terminal of a device might be biased with a fixed level. Pulse width is still used with SMU instruments, but its definition is slightly different. Given that rise and fall times cannot be set directly and vary with the range in use and the load connected to the output, pulse width can’t be accurately defined by Full Width at Half Maximum (FWHM). (refer to the sidebar for more information on FWHM). Instead, for most SMU instruments, pulse width is defined as the time from the start of the rising edge to the start of the falling edge, points chosen because they are under the user’s control.

In other words, the user can set the pulse width by setting the time between when the source is told to go to the pulse level and then told to go back to the bias level.

FIGURE 5. A pulse measure unit card combines the capabilities of a pulse generator and a high resolution oscilloscope.

FIGURE 5. A pulse measure unit card combines the capabilities of a pulse generator and a high resolution oscilloscope.

Pulse measure units (PMUs) combine the capabilities of a pulse generator and a high-resolution oscilloscope, which are sometimes implemented as card-based solutions designed to plug into a test mainframe. Keithley’s Model 4225-PMU, designed for use with the Model 4200 Semiconductor Charac- terization System (FIGURE 5), is one example. It has two independent channels capable of sourcing up to 40V at up to 800mA. Like a standard pulse generator, users can define all parameters of the pulse shape. Pulse widths as narrow as 60ns and rise and fall times as short as 20ns make it well suited for characterizing devices with fast transients. A Segment Arb mode allows outputting multi-level pulse waveforms in separately defined segments, with separate voltage levels and durations for each. Each PMU channel is capable of measuring both current and voltage using two 14-bit 200MS/s ADCs per channel for a total of four ADCs per card. Additionally, all four ADCs are capable of sampling together synchronously at full speed. By combining a pulse generator with scope- like measurement capability in one instrument, a PMU can not only make high-resolution transient pulse measurements but also perform pulse I-V measurement sweeps easily using a spot mean method for enhanced resolution.

EGBERT WOELK, PH.D., is director of marketing at Dow Electronic Materials, North Andover, MA. ROGER LOO, PH.D., is a principal scientist at imec, Leuven, Belgium.

The future of electronics could lie in a material from its past, as researchers from The Ohio State University work to turn germanium–the material of 1940s transistors–into a potential replacement for silicon.

At the American Association for the Advancement of Science meeting, assistant professor of chemistry Joshua Goldberger reported progress in developing a form of germanium called germanane.

In 2013, Goldberger’s lab at Ohio State became the first to succeed at creating one-atom-thick sheet of germanane–a sheet so thin, it can be thought of as two-dimensional. Since then, he and his team have been tinkering with the atomic bonds across the top and bottom of the sheet, and creating hybrid versions of the material that incorporate other atoms such as tin.

The goal is to make a material that not only transmits electrons 10 times faster than silicon, but is also better at absorbing and emitting light–a key feature for the advancement of efficient LEDs and lasers.

“We’ve found that by tuning the nature of these bonds, we can tune the electronic structure of the material. We can increase or decrease the energy it absorbs,” Goldberger said. “So potentially we could make a material that traverses the entire electromagnetic spectrum, or absorbs different colors, depending on those bonds.”

As they create the various forms of germanane, the researchers are trying to exploit traditional silicon manufacturing methods as much as possible, to make any advancements easily adoptable by industry.

Aside from these traditional semiconductor applications, there have been numerous predictions that a tin version of the material could conduct electricity with 100 percent efficiency at room temperature. The heavier tin atom allows the material to become a 2D “topological insulator,” which conducts electricity only at its edges., Goldberger explained. Such a material is predicted to occur only with specific bonds across the top and bottom surface, such as a hydroxide bond.

Goldberger’s lab has verified that this theoretical material can be chemically stable. His lab has created germanane with up to 9 percent tin atoms incorporated, and shown that tin atoms have strong preference to bond to hydroxide above and below the sheet. His group is currently developing routes towards preparing the pure tin 2D derivatives.

Graphene, a single-atom-thick lattice of carbon atoms, is often touted as a replacement for silicon in electronic devices due to its extremely high conductivity and unbeatable thinness. But graphene is not the only two-dimensional material that could play such a role.

University of Pennsylvania researchers have made an advance in manufacturing one such material, molybdenum disulphide. By growing flakes of the material around “seeds” of molybdenum oxide, they have made it easier to control the size, thickness and location of the material.

Unlike graphene, molybdenum disulfide has an energy band gap, meaning its conductivity can be turned on and off. Such a trait is critical for semiconductor devices used in computing. Another difference is that molybdenum disulphide emits light, meaning it could be used in applications like LEDs, self-reporting sensors and optoelectronics.

The study was led by A. T. Charlie Johnson, professor in the Department of Physics & Astronomy in Penn’s School of Arts & Sciences, and includes members of his lab, Gang Hee Han, Nicholas Kybert, Carl Naylor and Jinglei Ping. Also contributing to the study was Ritesh Agarwal, professor of materials science and engineering in Penn’s School of Engineering and Applied Science; members of his lab, Bumsu Lee and Joohee Park; and Jisoo Kang, a master’s student in Penn’s nanotechnology program. They collaborated with researchers from South Korea’s Sungkyunkwan University, Si Young Lee and Young Hee Lee.

Their study was published in the journal Nature Communications.

“Everything we do with regular electronics we’d like to be able to do with two-dimensional materials,” Johnson said. “Graphene has one set of properties that make it very attractive for electronics, but it lacks this critical property, being able to turn on and off. Molybdenum disulphide gives you that.”

Graphene’s ultra-high conductivity means that it can move electrons more quickly than any known material, but that is not the only quality that matters for electronics. For the transistors that form the basis for modern computing technology, being able to stop the flow of electrons is also critical.

“Molybdenum disulphide is not as conductive as graphene,” Naylor said, “but it has a very high on/off ratio. We need 1’s and 0’s to do computation; graphene can only give us 1’s and .5’s.”

Other research groups have been able to make small flakes of molybdenum disulphide the same way graphene was first made, by exfoliating it, or peeling off atomically thin layers from the bulk material. More recently, other researchers have adopted another technique from graphene manufacture, chemical vapor deposition, where the molybdenum and sulfur are heated into gasses and left to settle and crystalize on a substrate.

The problem with these methods is that the resulting flakes form in a scattershot way.

“Between hunting down the flakes,” said Kybert, “and making sure they’re the right size and thickness, it would take days to make a single measurement of their properties”

The Penn team’s advance was in developing a way to control where the flakes form in the chemical vapor deposition method, by “seeding” the substrate with a precursor.

“We start by placing down a small amount of molybdenum oxide in the locations we want,” Naylor said, “then we flow in sulfur gas. Under the right conditions, those seeds react with sulfur and flakes of molybdenum disulphide being to grow.”

“There’s finesse involved in optimizing the growth conditions,” Johnson said, “but we’re exerting more control, moving the material in the direction of being able to make complicated systems. Because we grow it where we want it, we can make devices more easily. We have all of the other parts of the transistors in a separate layer that we snap down on top of the flakes, making dozens and potentially even hundreds, of devices at once. Then we were able to observe that we made transistors that turned on and off like they were supposed to and devices that emit light like they are supposed to.”

Being able to match up the location of the molybdenum disulphide flakes with corresponding electronics allowed the researchers to skip a step they must take when making graphene-based devices. There, graphene is grown in large sheets and then cut down to size, a process that adds to the risk of damaging contamination.

Future work on these molybdenum disulphide devices will complement the research team’s research on graphene-based biosensors; rather than outputting the detection of some molecule to a computer, molybdenum disulfide-based sensors could directly report a binding event through a change in the light they emit.

This research also represents first steps that can be applied toward fabricating a new family of two-dimensional materials.

“We can replace the molybdenum with tungsten and the sulfur with selenium,” Naylor said, “and just go down the periodic table from there. We can imagine growing all of these different materials in the places we choose and taking advantages of all of their different properties.”

SEMI today announced the “Call for Papers” for technical sessions and presentations for SEMICON Europa 2015 which takes place October 6-8 in Dresden, Germany. Technical presentation abstracts are due April 30.

SEMICON Europa 2015 will feature more than 100 hours of technical sessions and presentations focused on critical industry topics that are shaping the design and manufacturing of semiconductors, MEMS, printed and flexible electronics, and other related technologies.

Abstracts for presentations are now being accepted for:

  • 17th European Manufacturing Test Conference (EMTC): “Zero defect in shortest time to market and lowest cost –  is it possible?”
  • Advanced Packaging Conference:  “Interconnects in Miniaturized Systems”
  • Semiconductor Technology Conference: “Productivity Enhancements for future Technology Nodes”
  • Plastic Electronics Conference: Business Cases; Manufacturing; Technology/Materials

The SEMICON Europa abstract submission deadline is April 30.  Prospective presenters are invited to submit abstracts (1,000-2,000 characters). Material must be original, non-commercial and non-published. Abstracts must clearly detail the nature, scope, content, organization, key points and significance of the proposed presentation.  More information on how to submit your abstract is available on the “Call for Papers” homepage. Visit www.semiconeuropa.org or contact Christina Fritsch, SEMI Europe, at Tel. +49 30 3030 8077 18 or email [email protected].

Co-located with SEMICON Europa 2015, the Plastic Electronics Conference will also take place in Dresden from October 6-8.  From technology breakthrough to Innovative manufacturing in large area electronics and heterogeneous integrated smart systems to reports about the key manufacturing challenges and selected business cases across the sector, abstracts for presentations are now being accepted (until April 30) for: Technology and Materials; Manufacturing; and Business Cases. Visit www.plastic-electronics.org for more information.

China’s new industry investment and government promotion policies outlined in the recent “National Guidelines for Development and Promotion of the IC Industry” represents major opportunities for China and global semiconductor companies. The details of the policy and its implementation are being closely watched by the global industry for the resources China’s government has dedicated and potential impact to the global semiconductor manufacturing supply chain. During SEMICON China 2015, to be held March 17-19 in Shanghai, SEMI organized Market and Investment forums where key government decision makers, IC fund managers, and global industry analysts will share their insights on the policy and impact to the industry. SEMI expects record numbers of global industry executives to attend the world’s largest microelectronics manufacturing exposition to learn about these semiconductor and emerging/adjacent markets opportunities.

The China “National Guidelines for the Development and Promotion of the IC Industry” sets ambitious targets and sizable support for a China National IC industry investment fund. The combined investment in fabless, IDMs, foundries, and OSATs aims to spur industry at annualized growth rates above 20 percent through 2020. China’s ambitious targets cover: IC manufacturing, IC design, IC packaging and test, materials, and equipment. SEMI estimates the implemented investment plan could reach US$100 billion with the total government and associated local industry funding.

“The rapid development of the semiconductor industry in China has already formed an industry base of domestic enterprises. The unprecedented scale of new industry investment signaled by government plans is likely to further impact the global industry landscape,” said Allen Lu, president of SEMI China. “We are pleased to see significant interest in SEMICON China 2015 as an international gathering — with comprehensive attendance from our industry — to identity the latest business intelligence, global trade prospects, and collaboration opportunities.”

Global companies looking to understand the opportunities, challenges, and risks of China’s investment plans will be participating in events and key forums, including the Semiconductor Market and China Opportunity Forum, Tech Investment Forum-China 2015, Build China’s IC Ecosystem Forum, and China Equipment and Materials Forum. SEMICON China is co-located with FPD China and the LED China Conference, leveraging synergies with these emerging and adjacent markets. Featuring more than 900 exhibitors occupying more than 2,600 booths, SEMICON China is the largest exposition of its kind in China with over 50,000 people expected to attend.

The event will present a comprehensive set of topics through its exhibition, keynote addresses, executive panels, technical and business forums and full-day technology conferences. Grand Opening keynote presenters include: Lisa Su, president and CEO of AMD; Tzu-Yin Chiu, CEO and executive director of SMIC; Xinchao Wang, chairman and CEO of JCET; Simon Yang, president and CEO of XMC; and Michael Hurlston, EVP at Broadcom; and Lei Shi, president of Nantong Fujitsu Microelectronics.

“Semiconductor Market and China Opportunity” forum speakers include:

  • Zixue Zhou, chief economist, Ministry of Industry and Information Technology (MIIT); vice chairman and secretary-general, China Information Technology Industry Federation (Zhou is a vice minister-level MIIT official and the chief architect of the new China IC initiatives with setting up of the National IC Fund)
  • Professor Shaojun Wei, director, Institute of Microelectronics, Tsinghua University (Wei is also the leader of the expert group overseeing China’s National Project 01 responsible for growing China’s core competencies in computing and communication). Plus Handel Jones, founder and CEO of IBS; Jim Feldhan, president, Semico Research; and Dan Tracy, senior director, Industry Research and Statistics, SEMI

“Tech Investment Forum—China 2015” forum speakers include: Mr. Wenwu Ding, the CEO of the newly formed China National IC Fund (Ding has been a director-general of MIIT in charge of Semiconductor industry); Yongzhi Jiang, managing director of Goldman Sachs Securities in charge of M&A; Lip-Bu Tan, founder and chairman of Walden International and CEO of Cadence; and fund managers from CGP Investment, GM E-town Capital, Summitview Capital and Shenzhen Capital.

“Build China’s IC Ecosystem” forum is chaired by Professor Shaojun Wei, with speakers from the complete supply chain from IC design, device makers, to equipment manufacturers. Presenters include executives from Verisilicon, SMIC, XMC, ASMC, JCET, Northern Micro Electronics, and Applied Materials.

“China Equipment and Materials Forum” includes speakers from China and global companies: Sevenstar, TEL, ACM Research, and Shanghai Sinyang with a panel discussion moderated by Mr. Tianchun Ye, director of the Institute of Microelectronics, China Academy of Sciences (Mr. Ye is also the leader of expert group of National Project 02 overseeing developing China’s semiconductor manufacturing core-competencies).

This year’s event features six technical conferences: Mobile Technology Enabled by Semiconductors, China Equipment and Materials Forum, Building China’s IC Ecosystem, Advanced Packaging, LED China Conference, and Intelligent Wearable Industry Seminar.  Business programs include: Tech Investment Forum and Semiconductor Market and China Opportunity. Keynote speakers from Intel, IBM, ITRI, University of California, and SMIC will present. ­ FPD China 2015 features special programs on OLED displays, LCD displays, Oxide and LTPS Displays, and Printing Displays and Touch Screens.

China Semiconductor Technology International Conference (CSTIC) is also co-located at SEMICON China. Organized by SEMI and  IEEE-EDS , co-organized by China’s High-Tech Expert Committee (CHTEC), and co-sponsored by ECS, MRS and the China Electronics Materials Industry Association, CSTIC 2015 will cover all aspects of semiconductor technology and manufacturing (more than 300 papers), including devices, design, lithography, integration, materials, processes, and manufacturing, as well as emerging semiconductor technologies and silicon material applications. Hot topics, such as 3D integration, III-V semiconductors, carbon nano-electronics, LEDs, MEMS and Photovoltaic Technology will also be addressed in the conference. (CPTIC 2015 has joined CSTIC 2015 as Symposium XII).

Sponsors of SEMICON China 2015 include: Tokyo Electron, Laytec, SMIC, Huahong Group, JCET, Disco, Edwards, Advantest, Vastity, Shanghai Sinyang, Spirox, and many others.

GLOBALFOUNDRIES, a provider of advanced semiconductor manufacturing technology, today announced a partnership with imec, a nanoelectronics research center, for joint research on future radio architectures and designs for highly integrated mobile devices and IoT applications.

A key challenge for next-generation mobile devices is controlling the cost and footprint of the radio and antenna interface circuitry, which contain all of the components that process a cellular signal across the various supported frequency bands. Today, a typical mobile device must support up to 28 bands for worldwide 2G, 3G, 4G, LTE network connectivity, and more complex carrier aggregation schemes and additional frequency bands are expected for future generations. These challenges are driving the need for an agile radio that integrates many of the separate components into one piece of silicon, including power amplifiers, antenna switches, and tuners and provides a solution which is both flexible and low cost.

GLOBALFOUNDRIES will closely collaborate with technical experts from imec to investigate low-power and compact high-performance agile radio solutions that will enable a broad range of radio architecture design–targeting improvements in area, performance and power consumption. GLOBALFOUNDRIES will also partner with imec to develop innovative ultra-low power IC design solutions leveraging GLOBALFOUNDRIES’ CMOS technology to address the demanding requirements of tomorrow’s IoT devices. Ultimately, the partnership aims to build a technology and design infrastructure that will enable future RF architectures while minimizing critical interface requirements for radio power consumption and performance.

“This collaboration expands our relationship with imec, and we’re eager to leverage their R&D expertise in RF technology to accelerate time-to-volume of designs and deliver leading-edge RF technology to our customers,” said Peter Rabbeni, director RF Segment Marketing at GLOBALFOUNDRIES. “This relationship further reflects our commitment to find RF design implementations that will efficiently extend the range of wireless communication applications without increasing the form factor or cost.”

“There are advanced chip technology challenges the industry needs to address to enable a higher level of integration and lower power consumption for future wireless communication,” said Harmke de Groot, senior director Perceptive Systems for the Internet of Things. “Imec is pleased to welcome GLOBALFOUNDRIES as a partner in ultra-low power wireless design. Leveraging imec’s advanced IC technology knowhow and system design experience, and GLOBALFOUNDRIES’ CMOS technology, we will accelerate the investigation and develop new approaches.”