Category Archives: LEDs

By CHOWDARY YANAMADALA, Senior Vice President of Business Development, ChaoLogix, Gainesville, FL 

Data is ubiquitous today. It is generated, exchanged and consumed at unprecedented rates.

According to Gartner, Internet of Things connected devices (excluding PCs, tablets and smart phones) will grow to 26 billion devices worldwide by 2020—a 30-fold increase from 2009. Sales of these devices will add $1.9 trillion in economic value globally.

Indeed, one of the major benefits of the Internet of Things movement is the connectivity and accessibility of data; however, this also raises concerns about securely managing that data.

Managing data security in hardware

Data security involves essential steps of authentication and encryption. We need to authenticate data generation and data collection sources, and we need to preserve the privacy of the data.

The Internet of Things comprises a variety of components: hardware, embedded software and services associated with the “things.” Data security is needed at each level.

Hardware security is generally implemented in the chips that make up the “things.” The mathematical security of authentication and encryption algorithms is less of a concern because this is not new. The industry has addressed these concerns for several years.

Nonetheless, hackers can exploit implementation flaws in these chips. Side channel attacks (SCAs) are a major threat to data security within integrated circuits (ICs) that are used to hold sensitive data, such as identifying information and secret keys needed for authentication or encryption algorithms. Specific SCAs include differential power analysis (DPA) and differential electro magnetic analysis (DEMA).

There are many published and unpublished attacks on the security of chips deployed in the market, and SCA threats are rapidly evolving, increasing in potency and the ease of mounting the attacks.

These emerging threats render defensive techniques adopted by the IC manufacturers less potent over time, igniting a race between defensive and offensive (threat) techniques. For example, chips that deploy defensive techniques deemed sufficient in 2012 may be less effective in 2014 due to emerging threats. Once these devices are deployed, they become vulnerable to new threats.

Another challenge IC manufacturers face is the complexity of defensive techniques. Often times, defensive techniques that are algorithm or protocol specific are layered to address multiple targeted threats.

This “Band-Aid” approach is tedious and becomes unwieldy to manage. The industry must remember that leaving hardware vulnerable to SCA threats can significantly weaken data security. This vulnerability may manifest itself in the form of revenue loss (counterfeits of consumables), loss of privacy (compromised identification information), breach of authentication (rogue devices in the closed network) and more.

How to increase the permanence of security

A simplified way to look at the SCA problem is as a signal to noise issue. In this case, signal means sensitive data leaked through power signature. Noise is the ambient or manufactured noise added to the system to obfuscate the signal from being extracted from power signature.

Many defensive measures today concentrate on increasing noise in the system to obfuscate the signal. The challenge with this approach is that emerging statis- tical techniques are becoming adept at separating the signal from the noise, thereby decreasing the potency of the deployed defensive techniques.

One way to effectively deal with this problem is to ”weave security into the fabric of design.” SCA threats can be addressed at the source rather than addressing the symptoms. What if we can make the power signature agnostic of the data processed? What if we can build security into the building blocks of design? That would make the security more permanent and simplify its implementation.

A simplified approach of weaving security into the fabric of design involves leveraging a secure standard cell library that is hardened against SCA. Such a library would use analog design techniques to tackle the problem of SCA at the source, diminishing the SCA signal to make it difficult to extract from the power signature.

Leveraging standard cells should be simple since they are the basic building blocks of digital design. As an industry, we cannot afford to bypass these critical steps to defend our data.

Dr. Zhihong LiuBy Dr. Zhihong Liu, Executive Chairman, ProPlus Design Solutions, Inc.

It wasn’t all that long ago when nano-scale was the term the semiconductor industry used to describe small transistor sizes to indicate technological advancement. Today, with Moore’s Law slowing down at sub-28nm, the term more often heard is giga-scale due to a leap forward in complexity challenges caused in large measure by the massive amounts of big data now part of all chip design.

Nano-scale technological advancement has enabled giga-sized applications for more varieties of technology platforms, including the most popular mobile, IoT and wearable devices. EDA tools must respond to such a trend. On one side, accurately modeling nano-scale devices, including complex physical effects due to small geometry sizes and complicated device structures, has increased in importance and difficulties. Designers now demand more from foundries and have higher standards for PDK and model accuracies. They need to have a deep understanding of the process platform in order to  make their chip or IP competitive.

On the other side, giga-scale designs require accurate tools to handle increasing design size. The small supply voltage associated with technology advancement and low-power applications, and the impact of various process variation effects, have reduced available design margins. Furthermore, the big circuit size has made the design sensitive to small leakage current and small noise margin. Accuracy will soon become the bottleneck for giga-scale designs.

However, traditional design tools for big designs, such as FastSPICE for simulation and verification, mostly trade-off accuracy for capacity and performance. One particular example will be the need for accurate memory design, e.g., large instance memory characterization, or full-chip timing and power verification. Because embedded memory may occupy more than 50 percent of chip die area, it will have a significant impact on chip performance and power. For advanced designs, power or timing characterization and verification require much higher accuracy than what FastSPICE can offer –– 5 percent or less errors compared to golden SPICE.

To meet the giga-scale challenges outlined above, the next-generation circuit simulator must offer the high accuracy of a traditional SPICE simulator, and have similar capacity and performance advantages of a FastSPICE simulator. New entrants into the giga-scale SPICE simulation market readily handle the latest process technologies, such as 16/14nm FinFET, which adds further challenges to capacity and accuracy.

One giga-scale SPICE simulator can cover small and large block simulations, characterization, or full-chip verifications, with a pure SPICE engine that guarantees accuracy, and eliminates inconsistencies in the traditional design flow.  It can be used as the golden reference for FastSPICE applications, or directly replace FastSPICE for memory designs.

The giga-scale era in chip design is here and giga-scale SPICE simulators are commercially available to meet the need.

Worldwide silicon wafer area shipments increased 11 percent in 2014 when compared to 2013 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its year-end analysis of the silicon wafer industry. However, worldwide silicon revenues increased by just 1 percent in 2014 compared to 2013.

Silicon wafer area shipments in 2014 totaled 10,098 million square inches (MSI), up from the 9,067 million square inches shipped during 2013. The previous market high for silicon area shipments was 9,370 MSI in 2010. Revenues totaled $7.6 billion slightly up from $7.5 billion posted in 2013, yet 2014 silicon revenues remain 37 percent below their peak set in 2007. “After three consecutive flat years, annual semiconductor silicon shipment levels achieved respectable growth last year to reach a market high,” said Hisashi Katahama, chairman of SEMI SMG and director, Technology of SUMCO Corporation. ”However, industry revenues did not experience the same magnitude of recovery.”

Annual Silicon* Industry Trends

2007

2008

2009

2010

2011

2012

2013

2014
Area Shipments (MSI) 8,661 8,137 6,707 9,370 9,043 9,031 9,067 10,098
Revenues ($B) 12.1 11.4 6.7 9.7 9.9 8.7 7.5 7.6

 

*Shipments are for semiconductor applications only and do not include solar applications

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers, epitaxial silicon wafers, and non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

The Silicon Manufacturers Group acts as an independent special interest group within the SEMI structure and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi, etc.). The purpose of the group is to facilitate collective efforts on issues related to the silicon industry including the development of market information and statistics about the silicon industry and the semiconductor market.

Design features that contributed most to the improved performance include increased rotational speed, integrated rotor sleeves, and increased purge injection temperature.

BY MIKE BOGER, Edwards Vacuum, Tokyo, Japan

The use of high-k dielectric films deposited through atomic layer deposition, primarily in batch furnaces, has intensified, particularly in the manufacture of memory devices and high-k metal gates (HKMG) in logic devices. ALD uses a sequential purge and injection of the precursor gases to generate slow, but accurate growth of the films one atomic layer at a time. One of the precusors is typically a metal organic compound from a liquid source, commonly zirconium or hafnium-containing materials, followed by ozone to create the high-k film.

Wafers are usually processed in a furnace with batch sizes of 200 or more wafers. Reliability of the vacuum system is imperative to prevent contamination and consequent scrapping of the wafers. Unexpected failures can cause significant loss of work in process and process downtime. For example, if the vacuum pump seizes suddenly due to internal contamination by process by-products, the pressure in the pipe between the vacuum and furnaces rises, and there is a risk that powder deposited in the pipe will flow back into the furnace. This powder can not only contaminate wafers in the furnace, but also force a time-consuming clean-up that may remove the furnace from operation for a day or more.

The challenge

The mean-time-between-service (MTBS) for a vacuum pump used in semiconductor manufacturing varies greatly depending on the particular process it supports and the design of the pump. For the ALD processes considered here most failures caused process by-products can be grouped into four categories.

  • Corrosion – Attack on the metal components of the pump results in the opening of clearances leading to loss of base vacuum. Depending on the location of corrosion, the oxidation of the metal may actually generate powder that can cause seizure of rotating elements.
  • Plating – The deposition of metal compounds on the surface of internal components fouls internal mechanism clearances, causing the pump to seize.
  • Powder ingestion – Powder that enters the pump can jam rotating elements, leading to seizure.
  • Condensation – Compounds in the pumped gas stream transition from a gaseous to a solid phase within the pump, depositing on internal surfaces and eventually leading to loss of clearance and seizure.

Monitoring of pump operating conditions, such as input power, current, and running temperature, can provide an indication of the health of the pump. Events that lead to failure are generally gradual in nature. Advance notice periods can be measured in days. However, failures of vacuum pumps on high-k ALD processes often happen suddenly with little to no indication of distress prior to seizure.

A typical example of a vacuum pump used on a high-k ALD process is shown in FIGURE 1. This pump was used in a full production environment and consisted of a 1,800 m3h-1 mechanical booster mounted above a 160 m3h-1 dry pump. In this case, the pump exhibited a strong spike in running power, approximately 20 times normal, and was immediately removed for inspection. Significant deposition is evident in the booster (Fig. 1 left) and also in the last stage of the dry pump (Fig. 1 right). Evidence of the loss of clearance that caused the spike in input power is observed as a shiny area on the rotor lobe. In operation this pump was exposed to TEMAH (hafnium-containing liquid precursor), TMA (aluminum-containing liquid precursor), and ozone for producing HfO2 and TMA Al2O3. It was exchanged after 1,200 hours of use.

ALD 1-A ALD 1-B

 

FIGURE 1. A picture of a disassembled pump after 1,200 hours of use on a high-k ALD process showing the deposition in the booster (left) and loss of clearance in the last stage of the dry pump (right). 

FIGURE 2 provides another example of a pump that was removed due to detection of a spike in input current. In this case, the booster, second stage, and final stage of the pump are shown. Although the process was nominally the same (deposition of HfO2 and Al2O3), the deposition pattern is different. In this case, the booster and early stages of the dry pump show signs of a thin coating of a material that exhibits a green iridescent sheen. The final stage of the pump has a brown powder accumulation, but of a lighter color than that shown in Fig. 1.

FIGURE 2. Pictures of a disassembled pump that was removed for inspection after only 457 hours due to a large current spike detected during operation. In order, the pictures show the booster, second stage of the dry pump, and the final stage of the dry pump.

FIGURE 2. Pictures of a disassembled pump that was removed for inspection after only 457 hours due to a large current spike detected during operation. In order, the pictures show the booster, second stage of the dry pump, and the final stage of the dry pump.

In both of the examples shown in Figs. 1 and 2, the service interval of the pump was short and below the user’s expectations. In these cases, which are representative of all the pumps used on this process, the user was forced to exchange pumps frequently to minimize the risk of wafer loss. Other customers had similar experiences. TABLE 1 lists the films deposited and the preventative maintenance service intervals implemented by four customers. Analysis of serviced pumps suggested that processes depositing zirconium oxide were more challenging for the pump.

Screen Shot 2015-02-10 at 5.30.54 PM

Analysis

To better understand the reliability improvement challenge, a sample of the deposited material from a failed pump was analyzed. The results of the analysis, shown in FIGURE 3, revealed deposits rich in carbon and metal oxides, consistent with metal-organic precursors. The rate of oxide deposition appeared to be higher than that which would occur through pure ALD mechanisms, suggesting some chemical vapor deposition (CVD) or decomposition of the gases being pumped.

FIGURE 3. Analysis of the deposition within a failed pump showing hafnium, oxygen, and carbon components.

FIGURE 3. Analysis of the deposition within a failed pump showing hafnium, oxygen, and carbon components.

A survey of literature [1], [2], [3], [4] revealed that the typical reactants used in high-k ALD can react at high pressure and at low temperature without the need for external energetic activation. This suggests that even if there were no CVD or decomposition of gases within the pump, ALD-like films can still be deposited on the internal surfaces of the pump.

A simulation of the vapor pressure of TEMAH (one of the precursors used) within the pump was conducted, assuming a mass flow rate of 0.2 mg min−1 for TEMAH. The simulation results were compared to the measured vapor pressure of TEMAH to determine if there was any risk of TEMAH condensing within the vacuum pump. The results, shown in FIGURE 4, suggest that there are sufficient safety margins in the actual conditions. The TEMAH will stay in vapor form while it travels through the pump, even if the actual flow varied by an order of magnitude from that assumed. Moreover, the pump temperature could be reduced substantially without risk of condensing TEMAH within the pump.

FIGURE 4. Vapor pressure of TEMAH (0.2 mg/min with 14 slm of nitrogen) and simulated vapor pressure of TEMAH in the dry pump, inlet to outlet.

FIGURE 4. Vapor pressure of TEMAH (0.2 mg/min with 14 slm of nitrogen) and simulated vapor pressure of TEMAH in the dry pump, inlet to outlet.

A number of pumps were inspected, a large majority of which were pumps exchanged prior to seizure. Unfortunately, although powder was evident in the final stages of all pumps, not all pumps had powders of the same color. Moreover, as seen in the middle photograph of Fig. 2, some pumps and boosters were relatively clean exhibiting just a green sheen of deposition.

None of the observations, other than powder in the final stage of the dry pump, were consistently repeatable, suggesting that factors upstream of the pump were also contributing to short service intervals. Powder loading varied between pumps and within the pumps, although the heaviest deposition was always located in the final stages of the dry pump. It is normal for the most deposition to occur near the exhaust of the pump because of the generally increased temperature of the exhaust gas and the increase in vapor pressure of the materials being pumped.

A diagram of the dry pump stages from inlet to outlet is shown in FIGURE 5, where the sleeves are also shown. Consistently, the final stage shaft sleeve, which is located between the 4th and 5th stage of the pump, was the weakest link in the design. Deposition would collect on the sleeve’s surface. Resulting friction between the sleeve and the stator would cause the components to heat, expand, and finally seize the pump.

FIGURE 5. Schematic of the dry pump mechanism showing inlet (1st stage) to outlet (5th stage). Rotor sleeves are shown in green.

FIGURE 5. Schematic of the dry pump mechanism showing inlet (1st stage) to outlet (5th stage). Rotor sleeves are shown in green.

FIGURE 6 shows the sleeves from between three stages of a pump exchanged for service. Another example is shown in the right side picture of Fig. 1. The sleeves are steel with a PTFE coating, giving them a green color. Evidence of the deposition is clear in the shaft sleeves on the right side of the picture.

FIGURE 6. Picture of sleeves in an exchanged pump showing deposition on the outer surfaces.

FIGURE 6. Picture of sleeves in an exchanged pump showing deposition on the outer surfaces.

Extending pump service intervals

Inconsistencies in powder deposition that suggested variations in upstream conditions were ultimately traced to condensation in the gas lines to the process chamber. The amount of condensed liquid and the length of the flow step in the ALD cycle affected the amount of deposition. When the user took care to avoid condensation, a much more consistent pattern of deposition was observed within the pump.

For any particular dry pump, the two most convenient elements that can be adjusted are the nitrogen purge and the temperature of the pump. Adding purge, or changing the location of the purge, can affect the partial pressure of the gases being pumped. Purge can also affect the temperature of the gas being pumped. In this case the purge flow was already 76 slm and further increase could have affected the downstream gas abatement device.

Experiments to extend the MTBS focused on the pump running temperature. Temperature changes within the pump can dramatically affect the propensity of the pumped gases to condense on the internal surfaces of the pump as well as the rate of reactions of any gases being pumped. However, varying the pump temperature from 140°C to nearly 180°C made any appreciable change to the service interval.

Finally, two pumps with designs that differed significantly from the original pump were evaluated. Additionally, new pump A provided significantly greater capacity at higher inlet pressures than new pump B, at the expense of greater power consumption. The results are shown in TABLE 2.

Screen Shot 2015-02-10 at 5.32.47 PM

New Pump A was initially installed with a temperature set point of 130°C. It was removed after six months for inspection prior to failure. New Pump B was tested with a temperature set point of 110°C. It was removed after six months prior to failure. A comparison of the internal condition of the Original Pump and New Pump B is shown in FIGURE 7.

FIGURE 7. Pictures comparing the third stage of the original pump and New Pump B showing the different deposition patterns.

FIGURE 7. Pictures comparing the third stage of the original pump and New Pump B showing the different deposition patterns.

Four differences in the new pump design are believed to have contributed to improved reliability:

  • 180% increase in rotational speed (180%) resulting in less residence time of the pumped gases.
  • Reduced operating temperature. Although many semiconductor processes benefit from a hot pump, this ALD process does not.
  • No rotor sleeves. The rotor sleeve in the new pumps was integrated with the rotor element itself. This not only removed the necessity for a coating, but appeared to strengthen the mechanism.
  • Heated purge. The purge in the new pumps is warmed to within 95% of the stator temperature to prevent cooling effects and reduce the chance of spontaneous condensation of gases.

Subsequent experience with a large number of pumps and customers has confirmed the advantages provided by the new pump design. New pump B is the recommended pump for this application with fixed service intervals varying between 4 and 6 months depending on the specific characteristics of the process supported.

Conclusions

Deposition of high-k materials using ALD is a widely used technique for today’s transistor and memory structures. At early introduction of the process in high volume manufacturing, pump reliability became a key concern. Careful analysis and cooperation with customers resulted in extending the service interval of the pumps from one to up to six months, an achievement that significantly reduced operating expenses and production losses due to wafer contamination and equipment downtime caused by unexpected pump failures. Analysis of the pump condition and test results showed that, more than temperature or purge, a different pump design provided the greatest improvement in service intervals. Design features that contributed most to the improved performance include increased rotational speed, integrated rotor sleeves, and increased purge injection temperature.

References

1. J. M. et al., “Impact of Hf-precursor choice on scaling and performance of high-k gate dielectrics hf-based high-k materials,” ECSTrans., p. 59, 2007.
2. X. L. et al., “Ald of hafnium oxide thin films from tetrakis (ethylmethylamino) hafnium and ozone,” J. of ECS, vol. 152, 2005.
3. H. Furuya, “Formation of metal oxide film,” Sep 2008, patent application: US20080226820 A1.
4. Y. S. et al., “Atomic layer deposition of hafnium oxide and hafnium silicate thin films using liquid precursors and ozone,” J. Vac. Sci. Tech. A, vol. 22, 2004.

A novel approach to growing nanowires promises a new means of control over their light-emitting and electronic properties. In a recent issue of Nano Letters, scientists from the U.S. Department of Energy’s Lawrence Berkeley National Lab (Berkeley Lab) demonstrated a new growth technique that uses specially engineered catalysts. These catalysts, which are precursors to growing the nanowires, have given scientists more options than ever in turning the color of light-emitting nanowires.

The new approach could potentially be applied to a variety of materials and be used for making next-generation devices such as solar cells, light emitting diodes, high power electronics and more, says Shaul Aloni, staff scientist at Berkeley Lab’s Molecular Foundry, a DOE user facility, and lead author on the study.

Since the early 2000s, scientists have made steady progress in cultivating nanowires. Initially, early nanowire samples resembled “tangled noodles or wildfire-ravaged forests,” according to the researchers. More recently, scientists have found various conditions lead to the growth of more orderly nanowire arrays.

For instance, certain substrates on which the nanowires grow create conditions so that the nanowire growth orientation is dictated by the substrate’s underlying crystal structure. Unfortunately, this and other approaches haven’t been foolproof and some nanowires still go rogue.

Moreover, there is no simple way to grow different types of nanowires in the same environment and on the same substrate. This would be useful if you wanted to selectively grow nanowires with different electronic or optical properties in the same batch, for example.

“At the Molecular Foundry we are aiming to develop new strategies and add new tools to the bag of tricks used for nanomaterials synthesis,” says Aloni. “For years we were searching for cleverer ways to grow nanostructures with different optical properties in identical growth conditions. Engineering the catalyst brings us closer to achieving this goal.”

The researchers focused on nanowires made of gallium nitride. In its bulk (non-nanoscale) form, gallium nitride emits light in the blue or ultraviolet range. If indium atoms are added to it, the range can be extended to include red, essentially making it a broad-spectrum tunable light source in the visible range.

The problem is that adding indium atoms puts the crystal structure of gallium nitride under stress, which leads to poorly performing devices. Gallium nitride nanowires, however, don’t experience the same sort of crystal strain, so scientists hope to use them as tunable, broad-spectrum light sources.

To achieve their control, the team focused on the catalysis which guide the nanowire growth. Normally, researchers use catalysts made of a single metal. The Berkeley team decided to use metallic mixtures of gold and nickel, called alloys, as catalysts instead.

In the study, the researchers found that the gallium-nitride nanowire growth orientation strongly depended on the relative concentration of nickel and gold within the catalyst. By altering the concentrations in the alloy, the researchers could precisely manipulate, even on the same substrate in the same batch, the orientation of the nanowires.

“No one had used bi-metalic catalysts to control growth direction before,” says Tevye Kuykendall, scientist at Berkeley Lab’s Molecular Foundry. Kuykendall says the mechanism driving the new growth process is not fully understood, but it involves the different tendencies of gold and nickel to align with various crystallographic surfaces at point where nanowires start to grow.

The researchers also showed that depending on the growth direction chosen, different optical properties were observed thanks to the crystal surfaces exposed at the surface of the nanowire. “One of the things that make nanostructures interesting, is that the surface plays a larger role in defining the material’s properties,” says Aloni. This leads to changes in optical properties not seen in larger-bulk materials, making them more useful.

Aloni says the team will next focus more on the chemistry of the different nanowire surfaces to further tailor the nanowire’s optical properties.

Marktech Optoelectronics, a supplier of visible and infrared LED products, introduces its latest series of high reliability metal can packages, which incorporate Cree’s LED die. Cree combines highly efficient InGaN materials with proprietary substrates to deliver superior performance for high intensity LEDs. Markech’s metal can packages, offered in different heights and lensing options, are available for single or multichip die configurations depending on the application needs.

This series of hermetically sealed TO-5, 18 and 39 packages are offered in Flat or Domed lensed options. The high lumen output of the Cree die combined with Marktech’s precise die centering capabilities make these LEDs ideal for illumination in machine vision, scanning, and medical inspection equipment.

“The die that Cree manufactures, available in a number of chip sizes, wavelengths and power outputs, are extremely stable at low or high currents, allowing equipment manufacturers a range of choices for illumination or backlighting designs” says Steve Hubert, Marktech’s product manager for Cree products.

Precise die centering within packaging is a key component to critical illumination, machine vision, and scanning applications. As illuminated surfaces continue to decrease in size, accurate detection of the scanned area relies on the correct light position.

Marktech’s series of high reliability metal can packages, offered in Blue, Green, White, and Amber colors, boast high lumen output and efficiency and can be customized into single or multichip LEDs, light arrays or miniature light rings.

Cree and Marktech will be displaying LED die products, packaged components, and chip arrays at the upcoming Photonics West show held in San Francisco from February 10-12 in booth 616.

Now established in UV curing, UV LED technology will find growth opportunities in disinfection and purification and new applications by 2017/2018. Under its new technology and market analysis entitled “UV LED – Technology, Manufacturing and Application Trends”, Yole Développement (Yole) the “More Than Moore” market research, technology and strategy consulting company, reviews and details the traditional UV lamp business and its current transition to UV LED technology. Indeed industry players confirm their interest for cheaper and more compact technology.

UV LED market

Yole’s report presents a comprehensive review of all UV lamp applications including a deep analysis of UV curing, UV purification and disinfection and analytical instruments. It highlights the UV LED working principle, market structure, UV LED market drivers and associated challenges and characteristics, the total accessible market for UV LEDs. In this report, Yole’s analysts also detail the market volume and size metrics for traditional UV lamps and UV LEDs over the period 2008-2019, with splits by application for each technology.

Thanks to their compactness and low cost of ownership, UV LED technology continues to make its way in the booming UV curing business, through replacement of incumbent technologies such as mercury lamps.

“Thanks to this an overall UV LED market that represented only ~$20M in 2008 grew to~$90M in 2014, at a compound annual growth rate of 28.5 percent,” explains Pars Mukish, Business Unit Manager, LED activities at Yole. Such growth is likely to continue as LED-powered UV curing spreads across ink, adhesive and coating industries. And Pars Mukish from Yole, explains: “By 2017/2018, the UV LED market should also see part of its revenues coming from UVC disinfection and purification applications, for which device performance is not yet sufficient. The UV LED business is therefore expected to grow from ~$90M in 2014 to ~$520M in 2019.”This market’s evaluation takes into account only standard applications, where UV LEDs replace UV lamps.
Pars Mukish adds: “The potential is even greater, if we consider UV LEDs’ ability to enable new concepts in areas like general lighting, horticultural lighting, biomedical devices, and in fighting hospital-acquired infections (HAIs).”

Even this is just scratching the surface of UV LEDs’ real potential. While the new applications do not yet have a strong impact on market size, Yole expects them to possibly count for nearly 10 percent of the total UV LED market size by 2019.

In 2008, Yole started its investigation on the UV LEDs technologies. The consulting company highlights: “Less than ten companies were developing and manufacturing these devices at this time.” Since then, more than 50 companies have entered the playground, over 30 of these between 2012 and 2014, mostly attracted by the high margin when the overcapacity and strong price pressure from the “LED TV crisis” had taken its toll on the visible LED industry. These were mostly small and medium enterprises.

And recently some big companies from the visible LED industry – namely Philips Lumileds and LG Innotek – have also secured a foothold in the UV LED business. According to Yole’s analysis, the entry of these two giants will help to further develop the industry, the market and the technology based on their strong experience of the visible LED industry.

A good example of this is that they have made a nearly full transition of their process to 6” sapphire substrates. “Compared to a 2” based process, this can provide at least a 30 percent overall productivity increase, which would help to further reduce manufacturing cost…” comments Pars Mukish.

Cambridge Nanotherm today announced that Ewald Braith has joined the board as a Non-Exec Director. Cambridge Nanotherm has already started to make significant inroads into the LED market with its innovative nano-ceramic thermal management solutions for LEDs and other electronics. Ewald has now been brought on board to lend his considerable expertise to aiding the company in its growth plans.

“We’re really excited to have Ewald on board,” commented Ralph Weir, CEO. “Ewald combines high-level strategic nous with a deep knowledge of electronic design. He’s a big-hitter in terms of his achievements in the power electronics and telco markets, and exposure to semiconductor technologies and vertical markets. Additionally, throughout his career, Ewald has led aggressive expansion into overseas markets. This is a world-class hire, and clearly indicates the level at which Cambridge Nanotherm is now operating.”

“Cambridge Nanotherm is a company with a passion for ‘growth’ and ‘innovation’,” added Braith. “I am joining the team at a very exciting point, both in terms of the company’s growth and the growth of the large scale industry and market opportunities. The markets for LED technologies are growing rapidly, and manufacturers are eager for effective ways to improve the competitiveness of their products. With its thermal management solutions Cambridge Nanotherm can and should be at the core of this opportunity. I look forward to working with the team to continue to build on the momentum already achieved, as well as helping to drive greater penetration of key high growth markets such as the US and Asia.”

Ewald has worked in a variety of high-profile companies over the last thirty years, with a focus on the telecoms and power semiconductor markets. These include Zytec, Artesyn Technologies and Emerson Network Power, as well as establishing his own consulting firm. Ewald has most recently been CEO at Detego, a RFID software solutions and services provider for the fashion industry, and he is also a member of the board at Salcomp PLC.

Rapidly growing North American quantum dot manufacturer Quantum Materials Corp today announced it has begun shipping Cadmium-free red and green quantum dots in evaluation and production quantities to select consumer electronics manufacturers. The company has increased the uniformity and enhanced stability of its Cadmium-free nanomaterials as a result of bringing previously-reported automated capital equipment, facility and personnel investments online. Quantum Materials is at the forefront of Cadmium-free quantum dot development and recently announced increasing production capacity to 2000Kg of quantum dots and nanoparticles per annum in Q2 2015.

Meetings with manufacturers at the 2015 Consumer Electronics Show (CES) spurred requests for Cadmium-free red and green quantum dots with application-specific functionality. Quantum Materials has accelerated Cadmium-free quantum dot development because electronics manufacturers’ are seeking to stay ahead of environmental regulations governing dangerous materials in consumer electronic devices. Quantum dots are easily integrated into the industry-standard thin-film roll-to-roll inkjet and surface deposition technologies currently used in existing LCD display production lines, as illustrated in an informative video detailing Cadmium-free quantum dot uses and benefits.

“We were very encouraged with the results of our meetings at CES,” said Quantum Materials Corp CEO Stephen Squires. “I personally am even more pleased with the dedication, hard work and creativity of our team. Their discoveries have enabled us to meet the stringent demands and tight delivery deadlines necessary to rapidly integrate our materials into commercial products.”

The U.S. leads the world in nanotechnology innovation with over $30 billion invested in research to date. Quantum Materials is working with manufacturers toward integrating its advanced materials into commercial products that will create jobs, generate profits, and strengthen our economy and balance of payments.  The limited industrial availability of a reliable supply of Cadmium-free quantum dots has attracted the interest of the world’s largest display and solid-state lighting manufacturers in evaluating Quantum Materials mass-production capability.  Quantum Materials’ products are the foundation for technologically superior, energy efficient and environmentally sound LCD UHD displays, the next generation of solid-state lighting, solar photovoltaic power applications, advanced battery and energy storage solutions, biotech imaging, and biomedical theranostics.

Fairchild, a global supplier of high-performance power semiconductor solutions, today announced the FL7734 Phase-Cut Dimmable Single- Stage LED Driver, a highly integrated LED controller solution for low-cost, and highly reliable LED lighting solutions from 5 W to 30 W. The FL7734 enables designers to quickly achieve great light quality designs with high dimmer compatibility while integrating full power factor correction (PFC) circuitry to meet power factor (PF) and total harmonic distortion (THD) requirements.

The FL7734 solution uses Fairchild’s unique active dimmer driving technology to eliminate visible flicker or shimmer symptoms and deliver over 90 percent dimmer compatibility with a variety of leading edge, trailing edge and digital dimmers from a wide range of manufacturers. The solution fully meets NEMA SSL 7A-2013 & ENERGY STAR standards and provides a programmable dimming curve and input current management flexibility.

“The FL7734 driver simplifies LED light designs with broad dimmer compatibility,” said James Lee, technical marketing manager at Fairchild. “LED bulb and phase-cut dimmer suppliers are different, so a good phase-cut dimmable bulb has to operate well with many different dimmers. We developed the FL7734 with this in mind.”

The FL7734 is a Flyback (or Buck-Boost) Pulse-Width Modulator (PWM) controller that uses an advanced Primary-Side Regulation (PSR) technique, which minimizes the external components required for implementation and therefore lowers BOM. To meet stringent LED brightness control requirements, the FL7734 uses Fairchild’s innovative TRUECURRENT PSR technology for tight constant current (CC) variation with a tolerance of less than ±1 percent in the wide line voltage range.

Like the FL7733A announced last November at Electronica, the FL7734 can be used in a wide variety of lamps including GU10, candel lights, A19 and PAR30/38 bulbs, down and flat lights, and indoor and outdoor lights. Both solutions deliver a highly precise CC control with better than 1% variation over the entire universal line input operating range.

To meet safety regulations and ensure long-term reliability, the FL7734 device adds comprehensive protection features including dual overvoltage protection for both open-VS and open-VDD conditions, output diode short, and open/short protection for current sense resistor and every pin of the control IC. It also features open-LED, short-LED and over-temperature shutdown protections.

The FL7734 is available in 16-pin Small-Outline Package (SOP).