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Worldwide semiconductor market revenue is on track to achieve a 9.4 percent expansion this year, with broad-based growth across multiple chip segments driving the best industry performance since 2010.

Global revenue in 2014 is expected to total $353.2 billion, up from $322.8 billion in 2013, according to a preliminary estimate from IHS Technology (NYSE: IHS). The nearly double-digit-percentage increase follows respectable growth of 6.4 percent in 2013, a decline of more than 2.0 percent in 2012 and a marginal increase of 1.0 percent in 2011. The performance in 2014 represents the highest rate of annual growth since the 33 percent boom of 2010.

“This is the healthiest the semiconductor business has been in many years, not only in light of the overall growth, but also because of the broad-based nature of the market expansion,” said Dale Ford, vice president and chief analyst at IHS Technology. “While the upswing in 2013 was almost entirely driven by growth in a few specific memory segments, the rise in 2014 is built on a widespread increase in demand for a variety of different types of chips. Because of this, nearly all semiconductor suppliers can enjoy good cheer as they enter the 2014 holiday season.”

More information on this topic can be found in the latest release of the Competitive Landscaping Tool from the Semiconductors & Components service at IHS.

Widespread growth

Of the 28 key sub-segments of the semiconductor market tracked by IHS, 22 are expected to expand in 2014. In contrast, only 12 sub-segments of the semiconductor industry grew in 2013.

Last year, the key drivers of the growth of the semiconductor market were dynamic random access memory (DRAM) and data flash memory. These two memory segments together grew by more than 30 percent while the rest of the market only expanded by 1.5 percent.

This year, the combined revenue for DRAM and data flash memory is projected to rise about 20 percent. However, growth in the rest of the market will swell by 6.7 percent to support the overall market increase of 9.4 percent.

In 2013, only eight semiconductor sub-segments grew by 5 percent or more and only three achieved double-digit growth. In 2014, over half of all the sub-segments—i.e., 15—will grow by more than 5 percent and eight markets will grow by double-digit percentages.

This pervasive growth is delivering general benefits to semiconductor suppliers, with 70 percent of chipmakers expected to enjoy revenue growth this year, up from 53 percent in 2013.

The figure below presents the growth of the DRAM and data flash segments compared to the rest of the semiconductor market in 2013 and 2014.

2014-12-18_Semi_Sectors_Growth

Semiconductor successes

The two market segments enjoying the strongest and most consistent growth in the last two years are DRAM and light-emitting diodes (LEDs). DRAM revenue will climb 33 percent for two years in a row in 2013 and 2014. This follows often strong declines in DRAM revenue in five of the last six years.

The LED market is expected to grow by more than 11 percent in 2014. This continues an unbroken period of growth for LED revenues stretching back at least 13 years.

Major turnarounds are occurring in the analog, discrete and microprocessor markets as they will swing from declines to strong growth in every sub-segment. Most segments will see their growth improve by more than 10 percent, compared to the declines experienced in 2013.

Furthermore, programmable logic device (PLD) and digital signal processor (DSP) application-specific integrated circuits (ASICs) will experience dramatic improvements in growth. PLD revenue in 2014 will grow by 10.2 percent compared to 2.1 percent in 2013, and DSP ASICs will rise by 3.8 percent compared to a 31.9 percent collapse in 2013.

Moving on up

Among the top 20 semiconductor suppliers, MediaTek and Avago Technologies attained the largest revenue growth and rise in the rankings in 2014. Both companies benefited from significant acquisitions.

MediaTek is expected to jump up five places to the 10th rank and become the first semiconductor company headquartered in Taiwan to break into the Top 10. Avago Technologies is projected to jump up eight positions in the rankings to No. 15.

The strongest growth by a semiconductor company based purely on organic revenue increase is expected to be achieved by SK Hynix, with projected growth of nearly 23 percent.

No. 13-ranked Infineon has announced its plan to acquire International Rectifier. If that acquisition is finalized in 2014 the combined companies would jump to No. 10 in the overall rankings and enjoy 16 percent combined growth.

The table below presents the preliminary IHS ranking of the world’s top 20 semiconductor suppliers in 2013 and 2014 based on revenue.

2014-12-18_Semi_Ranking_Final

Troubles for consumer electronics and Japan

Semiconductor revenue in 2014 will grow in five of the six major semiconductor application end markets, i.e. data processing, wired communications, wireless communications, automotive electronics and industrial electronics. The only market segment experiencing a decline will be consumer electronics. Revenue will expand by double-digit percentages in four of the six markets.

Japan continues to struggle, and is the only worldwide region that will see a decline in semiconductor revenues this year. The other three geographies—Asia-Pacific, the Americas and the Europe, Middle East and Africa (EMEA) region—will see healthy growth. The world will be led by led by Asia-Pacific which will post an expected revenue increase of 12.5 percent.

The case is made for delivering liquid precursors from a central delivery system to the epi/dep tool as a vapor of precisely-controlled composition. 

By EGBERT WOELK, Ph.D., Dow Electronic Materials, North Andover, MA, USA and ROGER LOO, Ph.D., imec, Leuven, Belgium 

The epi and deposition processes for silicon-based semiconductor devices have used gaseous and liquid precursors. Gaseous precursors are compounds whose vapor pressure at room temperature is higher than 1500 torr (2000 mbar), which is sufficient to drive a mass flow controller (MFC). Using only one MFC, gaseous precursors can conveniently be metered to the process. Silane and dichlorosilane (DCS) have been used with that method. The industry has also used Trichloro silane (TCS) that boils at around 33°C and can be directly metered to a low pressure epi process using an appropriate MFC. For the epi of SiGe, germane, which is a gas, has been used.

Tetraethylorthosilicate (TEOS) has long been used for the deposition of SiO2 and has mostly been delivered using direct liquid injection (DLI). DLI meters the flow of the liquid precursor to a flash evaporator and provides good control, but flash evaporation requires high temperatures and care must be taken that the precursor compound does not break up prematurely. This can be a challenge for precursors that work at lower deposition temperatures.

More recently, trisilane (Si3H8) has been used for low temperature Si epi and deposition. The delivery of trisilane to the process uses the carrier-gas-assisted delivery method. In the most common implementation, it employs an on-board evaporation ampoule dedicated to one reactor. The same setup has been used for III-V compound semiconductor and LED epi with good success. Driven by cost pressure, however, the LED epi industry is moving from dedicated onboard ampoules to a central delivery system for high-volume precursors like trimethylgallium (TMGa). One part of the cost reduction simply comes from the economies of scale. Another aspect comes from the elimination of excessive hardware, such as thermal baths and pressure controllers, and their maintenance. Most importantly, a substantial part of the cost reduction comes from yield increases due to improved process control. The same central delivery system can be used for trisilane and other liquid CVD precursors for silicon-based CVD for similar cost reduction.

Carrier-gas-assisted precursor delivery

Liquid compounds with an RT vapor pressure between 1 and 400 mbar require carrier-gas-assisted delivery. Many liquid compounds within that vapor pressure range are excellent precursors for CVD and epi processes. For such compounds, the difference between the vapor pressure and the process pressure is too small to drive an MFC for straight metering. Adding a carrier gas increases the pressure to between approximately 760 and 1500 torr (1000 and 2000 mbar). The selection of a good delivery pressure depends primarily on the desired concentration.

The carrier-gas-assisted delivery method has long been used for trimethylgallium (TMGa) and trimethylaluminium (TMAl) for the growth of GaAs and GaN. For the growth of GaAlN and GaInN for LEDs, the composition ratio of the two group III precursors is extremely critical for the performance of the final product. Therefore, the precision of the evaporation and the metering has always been a concern.

FIGURE 1a shows the setup for a straight gas delivery and FIGURE 1b shows the setup for a carrier-gas-assisted delivery. The design shown in Figure 1b requires no modification of the epi/dep tool in order to accept a normally liquid precursor. From an epi/ dep tool perspective, the design shown in Figure 1b behaves just like the straight gas delivery of Figure 1a. As such, it allows the use of the gas mixture from one delivery system at several points of use, i.e. the output of the delivery system can be subdivided. In Figure 1b the precursor vapor is made on demand. While the output (mol flux of precursor per time) is theoretically unlimited, there are practical limits that restrict the output to approximately 20 standard liters per minute (slm). The main limitation is the dynamic range of the metering valve: the best units have a dynamic range of 1 in 104, which means that they can reliably control a flow between 0.002 and 20 slm. This is important for the mol flux precision at smaller flows, i.e. when only one or two tools draw precursor.

FIGURE 1a. High vapor pressure precursor, straight vapor delivery. S: pressure sensor, V: metering valve. S and V are normally integrated into a pressure regulator. MFC meters neat vapor.

FIGURE 1a. High vapor pressure precursor, straight vapor delivery. S: pressure sensor, V: metering valve. S and V are normally integrated into a pressure regulator. MFC meters neat vapor.

FIGURE 1b. Low vapor pressure precursor, carrier gas assisted delivery in Dow's VAPORSTATIONTM Central Delivery System. S: pressure sensor, V: metering valve. MFC meters diluted precursor vapor. Pressure and temperature control guarantee high precision concentration.

FIGURE 1b. Low vapor pressure precursor, carrier gas assisted delivery in Dow’s VAPORSTATIONTM Central Delivery System. S: pressure sensor, V: metering valve. MFC meters diluted precursor vapor. Pressure and temperature control guarantee high precision concentration.

On-board ampoules and central delivery system

There are several designs of carrier-gas-assisted delivery sources. The traditional design meters carrier gas into the ampoule rather than the mixture into the process chamber. Such a delivery system is dedicated to one reactor because the mass flow is metered upstream of the evaporation vessel and the associated MFC is controlled by the epi/dep tool. The ampoule serves two functions: (1) as the transport vessel and (2) as an evaporation device. For cost reasons, the ampoule should be of simple design. This means that trade-offs for the evaporation performance have to be made. The trade-offs result in line-to-line delivery rate variations and a noticeable change of delivery rate over the life of the ampoule. For some products, such changes require run-to-run recipe adjustments. In some cases the on-board ampoule is connected to a central dispense unit that transfers liquid precursor into the on-board ampoule. The result is a complex system that is still subject to delivery rate shifts requiring recipe adjustments.

A new central delivery system design is shown in Figure 1b. The task-optimized evaporator is fitted with temperature, pressure and level sensors that hold the precursor output variation at less than +/-0.4% by use of special stability algorithms. The evaporator is a permanently-installed part of the central delivery system. It is fed from a supply canister and features two precision thermometers inside the precursor liquid and gas distribution baffles and strainers for entrained droplets. Once calibrated, the system delivers a precisely known rate to a number of epi/dep reactors in the fab.

FIGURE 2 shows the output concentration of two calibrated central delivery units under various loads [1]. The curve that is alternately dotted and solid represents the signal of the binary gas sensor, which was alternately connected to one or the other unit. The other curves represent the output of the two units in standard liters per minute. The results show that proper calibration of the temperature and pressure sensors results in error of the delivery of less than +/- 0.4%. This precision cannot be achieved with ordinary on-board ampoules.

FIGURE 2. Output and concentration of two calibrated VAPORSTATIONTM Central Delivery Systems. Concentration remains within +/- 0.4% of set point regardless of load.

FIGURE 2. Output and concentration of two calibrated VAPORSTATIONTM Central Delivery Systems. Concentration remains within +/- 0.4% of set point regardless of load.

Recently, the application of the VAPORSTATION Central Delivery system has been expanded to deliver SnCl4 to a new process for the deposition of GeSn. It was fitted to a gas delivery line that was available on a mainstream silicon epi tool.

GeSn epi using a SnCl4 as new precursor

There has been increasing interest in GeSn and SiGeSn as alternative Group IV semiconductor material for electrical and optical device applications. The continuing expansion of traditional silicon with Sn and Ge offers additional design options for band gap and stress engineering. Over the past years, stress engineering using Ge made a major contribution to the improvement in Si-CMOS device performance. More recently the use of GeSn as a stressor for Ge-CMOS and relaxed GeSn as a virtual substrate, which is used to create tensile strain in a Ge epitaxial film, have been considered. The creation of tensile strain in an epitaxial Ge film is expected to result in germanium with a direct band gap [5] for photonic devices. Epitaxial Ge1-xSnx itself has also been considered as a promising candidate material for lasers and photodetectors. It has been predicted that, for sufficiently high Sn content, relaxed Ge1-xSnx turns into a direct band gap semiconductor [6,7]. Recent work of imec and its partners describe the active functionality based on the heterogeneous integration of strained GeSn/Ge on a Si platform providing photo-detection in the mid-infrared [8].

Due to the poor solubility of Sn in the Ge matrix of less than 1%, the epitaxial growth of (Si)GeSn is very challenging. Low solubility demands out-of- equilibrium growth conditions and, from epitaxial growth point of view, extremely low growth temperatures. Until recently, GeSn was grown by molecular beam epitaxy — a technique that is not suited for mass production. More recently, deuterated stannane, SnD4 has been used as Sn precursor for a CVD process, but the practical application is questionable due to the instability of SnD4.

To eliminate the problems posed by SnD4, imec chose to investigate stannic chloride SnCl4 , a stable, benign, abundant and commercially-available liquid Sn compound. Currently though, most of the CVD reactors for SiGeSn epi are not designed to use liquid precursor sources. In order to facilitate the use of liquid CVD precursors at imec, Dow Electronic Materials provided an R&D version of the central delivery system. It features the output stability and other benefits described above. The use of one of these units enabled imec to use SnCl4 and develop a groundbreaking new CVD process using digermane (Ge2H6) and SnCl4 to grow GeSn epitaxial films in a production-compatible CVD reactor. The films are metastable GeSn alloys with up to 13% substitutional Sn [10,11].

FIGURE 3 shows a typical cross section transmission electron microscope (TEM) picture with associated (224) x-ray diffraction reciprocal space mapping (XRD RSM) of a fully strained GeSn layer, grown on top of a relaxed Ge virtual substrate. The deposition temperature for the GeSn growth was kept low (320°C) in order to allow Sn incorporation in Ge lattice without Sn precipitation or agglomeration.

FIGURE 3. (a) Cross-section TEM of a 40 nm fully strained defect free GeSn layer on 1 lm Ge/Si buffer substrate with 8% Sn grown with AP- CVD using combination of Ge2H6 and SnCl4. (b) RHEED diagram of the Ge0.92Sn0.08 surface after deoxidation in UHV at 420°C. The pattern exhibits a strong (2x1) surface reconstruction along the [110]Ge direction. (c) (224) XRD-RSM of the 40 nm Ge0.92Sn0.08/Ge bilayer showing that GeSn is fully strained on Ge.

FIGURE 3. (a) Cross-section TEM of a 40 nm fully strained defect free GeSn layer on 1 lm Ge/Si buffer substrate with 8% Sn grown with AP- CVD using combination of Ge2H6 and SnCl4. (b) RHEED diagram of the Ge0.92Sn0.08 surface after deoxidation in UHV at 420°C. The pattern exhibits a strong (2×1) surface reconstruction along the [110]Ge direction. (c) (224) XRD-RSM of the 40 nm Ge0.92Sn0.08/Ge bilayer showing that GeSn is fully strained on Ge.

The TEM picture in Fig. 3(a) exhibits a defect-free and high crystalline quality for the 40-nm-thick GeSn layer. Furthermore, the surface quality of the as-grown Ge0.92Sn0.08/Ge/Si heterostructure was investigated by reflection high-energy electron diffraction (RHEED) analysis after ex-situ transfer to a MBE system. An annealing in ultra-high vacuum up to 420°C resulted in an oxide-free GeSn surface showing a strong (2×1) surface reconstruction as seen on RHEED pattern along the [110] azimuth (Fig. 3(b)). Finally, the XRDRSM around the (2 2 4) Bragg reflections (Fig. 3(c)) demonstrates that the grown GeSn layer is fully strained on Ge/Si (001) substrate.

Conclusion

The use of an improved delivery system for liquid CVD precursors allowed the
use of stannic chloride for the growth of GeSn. The new process developed by imec produces metastable GeSn with concentrations of substitutional tin of 13%.
TM Trademark of The Dow Chemical Company (“Dow”) or an affiliated company of Dow.

References

1. Control of vapor feed from liquid precursors to the OMVPE process, E. Woelk, R. DiCarlo, Journal of Crystal Growth, Available online 29 October 2013, In Press, Corrected Proof.
2. p and n-type germanium layers grown using iso-butyl germane in a III-V metal-organic vapor phase epitaxy reactor, R. Jakomin, G. Beaudoin, N. Gogneau, B. Lamare, L. Largeau, O. Mauguin, I. Sagnes, Thin Solid Films, 519, (2011), 4186–4191.
3. Crystalline Properties and Strain Relaxation Mechanism of CVD Grown GeSn, F. Gencarelli, B. Vincent, J. Demeule- meester, A. Vantomme, A. Moussa, A. Franquet, A. Kumar, H. Bender, J. Meersschaut, W. Vandervorst, R. Loo, M. Caymax, K. Temst, M. Heyns, ECS Trans. 50, (2013), 875-883.
4. Antimony surfactant for epitaxial growth of SiGe buffer layers at high deposition temperatures. Storck, P.; Vorder- westner, M.; Kondratyev, A.; Talalaev, R.; Amamchyan, A.; Woelk, E. Thin Solid Films vol. 518 issue 6 January 1, 2010. p. S23-S29.
5. M. V. Fischetti and S. E. Laux, Journal of Applied Physics 80, 2234 (1996).
6. D. W. Jenkins and J. D. Dow, Physical Review B, 36, 7994 (1987).
7. M. R. Bauer, J. Tolle, C. Bungay, A. V. G. Chizmeshya, D. J. Smith, J. Menéndez and J. Kouvetakis, Solid State Communication 127, 355 (2003).
8. A. Gassenq, F. Gencarelli, J. Van Campenhout, Y. Shimura, R. Loo, G. Narcy, B. Vincent, and G. Roelkens, OPTICS EXPRESS 20 (25) , 27297 (2012).
9. R. F. Spohn and C. B. Richenburg, ECS Transactions 50 (9), 921 (2012).
10. B. Vincent, F. Gencarelli, H. Bender, C. Merckling, B. Douhard, D. H. Petersen, O. Hansen, H. H. Henrichsen, J. Meersschaut, W. Vandervorst, M. Heyns, R. Loo, and M. Caymax, Appl. Phys. Lett., 99, 152103 (2011).
11. F. Gencarelli, B. Vincent, J. Demeulemeester, A. Vantomme, A. Moussa, A. Franquet, A. Kumar, H. Bender, J. Meerss- chaut, W. Vandervorst, R. Loo, M. Caymax, K. Temst, and M. Heyns ECS Journal of Solid State Science and Technology 2 (4), 134 (2013).
12. S. Gupta, B. Vincent, B. Yang, D. Lin, F. Gencarelli, J. Lin, R. Chen, O. Richard, H. Bender, B. Magyari-Koepe, M. Caymax, J. Dekoster, Y.; Nishi, and K. Saraswat, K. Extended Abstracts of the 2013 International Electronic Device Meeting (IEDM) (2012) p. 375.

EGBERT WOELK, PH.D., is director of marketing at Dow Electronic Materials, North Andover, MA. ROGER LOO, PH.D., is a principal scientist at imec, Leuven, Belgium.

In a sub-basement deep below the Laboratory for Integrated Science and Engineering at Harvard University, Mikhail Kats gets dressed. Mesh shoe covers, a face mask, a hair net, a pale gray jumpsuit, knee-high fabric boots, vinyl gloves, safety goggles, and a hood with clasps at the collar–these are not to protect him, Kats explains, but to protect the delicate equipment and materials inside the cleanroom.

While earning his Ph.D. in applied physics at the Harvard School of Engineering and Applied Sciences, Kats has spent countless hours in this cutting-edge facility. With his adviser, Federico Capasso, the Robert L. Wallace Professor of Applied Physics and Vinton Hayes Senior Research Fellow in Electrical Engineering, Kats has contributed to some stunning advances.

One is a metamaterial that absorbs 99.75 percent of infrared light–very useful for thermal imaging devices. Another is an ultrathin, flat lens that focuses light without imparting the distortions of conventional lenses. And the team has produced vortex beams, light beams that resemble a corkscrew, that could help communications companies transmit more data over limited bandwidth.

Certainly the most colorful advance to emerge from the Capasso lab, however, is a technique that coats a metallic object with an extremely thin layer of semiconductor, just a few nanometers thick. Although the semiconductor is a steely gray color, the object ends up shining in vibrant hues. That’s because the coating exploits interference effects in the thin films; Kats compares it to the iridescent rainbows that are visible when oil floats on water. Carefully tuned in the laboratory, these coatings can produce a bright, solid pink–or, say, a vivid blue–using the same two metals, applied with only a few atoms’ difference in thickness.

Capasso’s research group announced the finding in 2012, but at that time, they had only demonstrated the coating on relatively smooth, flat surfaces like silicon. This fall, the group published a second paper, in the journal Applied Physics Letters, taking the work much further.

“I cut a piece of paper out of my notebook and deposited gold and germanium on it,” Kats says, “and it worked just the same.”

That finding, deceptively simple given the physics involved, now suggests that the ultrathin coatings could be applied to essentially any rough or flexible material, from wearable fabrics to stretchable electronics.

“This can be viewed as a way of coloring almost any object while using just a tiny amount of material,” Capasso says.

It was not obvious that the same color effects would be visible on rough substrates, because interference effects are usually highly sensitive to the angle of light. And on a sheet of paper, Kats explains, “There are hills and valleys and fibers and little things sticking out–that’s why you can’t see your reflection in it. The light scatters.”

On the other hand, the applied films are so extremely thin that they interact with light almost instantaneously, so looking at the coating straight on or from the side–or, as it turns out, looking at those rough imperfections in the paper–doesn’t make much difference to the color. And the paper remains flexible, as usual.

Demonstrating the technique in the cleanroom at the Center for Nanoscale Systems, a National Science Foundation-supported research facility at Harvard, Kats uses a machine called an electron beam evaporator to apply the gold and germanium coating. He seals the paper sample inside the machine’s chamber, and a pump sucks out the air until the pressure drops to a staggering 10^-6 Torr (a billionth of an atmosphere). A stream of electrons strikes a piece of gold held in a carbon crucible, and the metal vaporizes, traveling upward through the vacuum until it hits the paper. Repeating the process, Kats adds the second layer. A little more or a little less germanium makes the difference between indigo and crimson.

This particular lab technique, Kats points out, is unidirectional, so to the naked eye very subtle differences in the color are visible at different angles, where slightly less of the metal has landed on the sides of the paper’s ridges and valleys. “You can imagine decorative applications where you might want something that has a little bit of this pearlescent look, where you look from different angles and see a different shade,” he notes. “But if we were to go next door and use a reactive sputterer instead of this e-beam evaporator, we could easily get a coating that conforms to the surface, and you wouldn’t see any differences.”

Many different pairings of metal are possible, too. “Germanium’s cheap. Gold is more expensive, of course, but in practice we’re not using much of it,” Kats explains. Capasso’s team has also demonstrated the technique using aluminum.

“This is a way of coloring something with a very thin layer of material, so in principle, if it’s a metal to begin with, you can just use 10 nanometers to color it, and if it’s not, you can deposit a metal that’s 30 nm thick and then another 10nm. That’s a lot thinner than a conventional paint coating that might be between a micron and 10 microns thick.”

In those occasional situations where the weight of the paint matters, this could be very significant. Capasso remembers, for example, that the external fuel tank of NASA’s space shuttle used to be painted white. After the first two missions, engineers stopped painting it and saved 600 pounds of weight.

Because the metal coatings absorb a lot of light, reflecting only a narrow set of wavelengths, Capasso suggests that they could also be incorporated into optoelectronic devices like photodetectors and solar cells.

“The fact that these can be deposited on flexible substrates has implications for flexible and maybe even stretchable optoelectronics that could be part of your clothing or could be rolled up or folded,” Capasso says.

Harvard’s Office of Technology Development continues to pursue commercial opportunities for the new color coating technology and welcomes contact from interested parties.

Kats, who concludes his year-long postdoctoral research position at SEAS this month, will become an assistant professor at the University of Wisconsin, Madison, in January. He credits those many hours spent in Harvard’s state-of-the-art laboratory facilities for much of his success in applied physics.

“You learn so much while you’re doing it,” Kats says. “You can be creative, discover something along the way, apply something new to your research. It’s marvelous that we have students and postdocs down here making things.”

By DAVE HEMKER, Senior Vice President and Chief Technology Officer, Lam Research Corp.

Given the current buzz around the Internet of Things (IoT), it is easy to lose sight of the challenges
– both economic and technical. On the economic side is the need to cost-effectively manufacture up to a trillion sensors used to gather data, while on the technical side, the challenge involves building out the infrastructure. This includes enabling the transmission, storage, and analysis of volumes of data far exceeding anything we see today. These divergent needs will drive the semiconductor equipment industry to provide very different types of manufacturing solutions to support the IoT.

In order to fulfill the promise of the IoT, sensor technology will need to become nearly ubiquitous in our businesses, homes, electronic products, cars, and even our clothing. Per-unit costs for sensors will need to be kept very low to ensure the technology is economically viable. To support this need, trailing-edge semiconductor manufacturing capabilities provide a viable option since fully depreciated wafer processing equipment can produce chips cost efficiently. For semiconductor equipment suppliers, this translates into additional sales of refurbished and productivity-focused equipment and upgrades that improve yield, throughput, and running costs. In addition to being produced inexpensively, sensors intended for use in the IoT will need to meet several criteria. First, they need to operate on very low amounts of power. In fact, some may even be self-powered via MEMS (microelectromechanical systems)-based oscillators or the collection of environmental radio frequency energy, also known as energy harvesting/scavenging. Second, they will involve specialized functions, for example, the ability to monitor pH or humidity. Third, to enable the transmission of data collected to the supporting infrastructure, good wireless communications capabilities will be important. Finally, sensors will need to be small, easily integrated into other structures – such as a pane of glass, and available in new form factors – like flexible substrates for clothing. Together, these new requirements will drive innovation in chip technology across the semiconductor industry’s ecosystem.

The infrastructure needed to support the IoT, in contrast, will require semiconductor performance to continue its historical advancement of doubling every 18-24 months. Here, the challenges are a result of the need for vast amounts of networking, storage in the Cloud, and big data analysis. Additionally, many uses for the IoT will involve risks far greater than those that exist in today’s internet. With potential medical and transportation applications, for example, the results of data analysis performed in real time can literally be a matter of life or death. Likewise, managing the security and privacy of the data being generated will be paramount. The real-world nature of things also adds an enormous level of complexity in terms of predictive analysis.

Implementing these capabilities and infrastructure on the scale imagined in the IoT will require far more powerful memory and logic devices than are currently available. This need will drive the continued extension of Moore’s Law and demand for advanced semiconductor manufacturing capability, such as atomic-scale wafer processing. Controlling manufacturing process variability will also become increasingly important to ensure that every device in the new, interconnected world operates as expected.

With development of the IoT, semiconductor equipment companies can look forward to opportunities beyond communications and computing, though the timing of its emergence is uncertain. For wafer processing equipment suppliers in particular, new markets for leading-edge systems used in the IoT infrastructure and productivity-focused upgrades for sensor manufacturing are expected to develop.

The use of a semi-aqueous organic film stripper and residue remover that does not contain N-Methyl-2 pyrrolidone (NMP) is compared with current NMP-based chemistry.

By NIK MUSTAPHA and DR. GLENN WESTWOOD, Avantor Performance Materials, Inc. MARKUS TAN, JOACHIM NG, and YANG MING CHIEH, Philips Lumileds Singapore

Philips Lumileds collaborated with Avantor Performance Materials, a global manufacturer of high-performance chemistries, to evaluate one of Avantor’s post-etch residue remover and photoresist stripper products as a replacement for a current chemistry. Avantor’s J.T. Baker ALEGTM-368 organic film stripper and residue remover is an engineered blend of organic solvents and semi-aqueous compo-nents suitable for bulk photoresist removal and post-etch/ash residue and sidewall polymer removal. Designed to provide broad process latitude in terms of processing times and temperatures, ALEGTM-368 organic film stripper and residue remover is completely water soluble, requires no intermediate solvent rinse, and contains no hydroxylamine (HA), NMP, or fluoride elements.

The authors worked together to assess whether a change to Philips Lumileds’ process of record (POR), using this product, could be accomplished without impacting yield or device quality, and with the desired cost savings.

NMP replacement challenges

Pending changes in environmental, health, and safety regulations in key manufacturing locations around the world may prohibit the use of NMP-based post-etch residue and photoresist removal products in LED manufacturing. The shift can already be observed in Europe and in some parts of Asia and the United States, where companies are moving toward NMP-free manufacturing environments. In today’s competitive environment, it is vital for companies to find alternative chemistries that are not only effective and emphasize good performance, but also provide better cost of ownership. Philips Lumileds is taking a significant step to be part of this change.

Initial verification tests of NMP-free product

As part of the process verification, several wafers were used to check etch rate on critical substrates such as III/V Nitride, Al, Ag, and Au. These wafers were also used to verify the effectiveness of the ALEGTM-368 product to remove photoresist. Data were then compared with the current POR (TABLE 1).

TABLE 1. Comparable etch rate data (A/min) shown by baseline and ALEGTM-368 product on critical substrates.

TABLE 1. Comparable etch rate data (A/min) shown by baseline and ALEGTM-368 product on critical substrates.

It was important to confirm the effectiveness of the ALEGTM-368 product in stripping capability of negative photoresist. A wafer with 5μm thickness was used as an experiment. The wafer was dipped in the ALEGTM-368 product at 75°C followed by a water rinse step. To ensure uniformity of chemical performance, five locations were inspected by a scanning electron microscope (SEM) before and after treatment with the NMP-free product (FIGURE 1). Post-treatment images after dipping the wafer in the ALEGTM-368 product indicated that no resist remained on top of the metal surface (FIGURE 2). This supports the effectiveness of the ALEGTM-368 product; it is capable of stripping photoresist completely, without visible damage to the metal surface.

FIGURE 1. Cross-sectioning images showing resist on top of III/V metal surface before ALEGTM-368 process step.

FIGURE 1. Cross-sectioning images showing resist on top of III/V metal surface before ALEGTM-368 process step.

FIGURE 2. Cross-sectioning images showed no resist on top of III/V metal surface after processing in ALEGTM-368.

FIGURE 2. Cross-sectioning images showed no resist on top of III/V metal surface after processing in ALEGTM-368.

Resist stripping and residue remover verification test on pattern wafers

Further tests were conducted on pattern wafers comparing POR and the ALEGTM-368 product at 75 °C, for 30 minutes. Wafers were then cleaved and subjected to SEM inspection.

LEDs Fig 3a LEDs Fig 3b

 

FIGURE 3. Post-treatment for POR material. No photoresist remained under high-magnification confocal microscope inspection. POR material showed good stripping capability on patterned wafers.

LEDs Fig 4a LEDs Fig 4b

 

FIGURE 4. Post-treatment using the ALEGTM-368 product. No resist remained under high-magnification confocal microscope inspection. POR material showed good stripping capability on patterned wafers. 

 

High-magnification images were obtained to verify cleaning performance and stripping capability of the ALEGTM-368 product and POR wafers. For top-view inspection, a high-magnification confocal microscope was used to verify complete removal of photoresist. Results are shown in FIGURES 3 and 4. Both the POR and the ALEGTM-368 product showed equal performance in terms of cleaning polymer residues and stripping photo resist on patterned wafers (FIGURES 5 and 6). The next critical step was to verify electrical performance for both the POR and the ALEGTM-368 product.

LEDs Fig 5a LEDs Fig 5b

 

FIGURE 5. SEM images showing post-treatment for POR. 

LEDs Fig 6a LEDs Fig 6b

 

FIGURE 6. SEM images showing post-treatment for the ALEGTM-368 product. 

Electrical performance for engineering lots

Wafers were sampled from several production lots before being split into two groups, one group using the baseline and the other using the ALEGTM-368 product. Both groups were processed in an automated tool following the recommended process condition at an operating temperature of 75°C and a processing time of 30 minutes. To achieve wafer uniformity, the tool was equipped with a mega-sonic function and recirculation to ensure effective cleaning of post-etch residues and stripping of negative photoresist.

After chemical treatment, the wafers were given an intermediate rinse using an IPA solvent to remove any remaining traces of the ALEGTM-368 product from the surface of the wafer. Without this step, chemical left on the surface of the wafer could cause corrosion, water marks, or other device defects. Wafers were then subjected to a QDR (quick dump rinse) to remove all remaining solvent on the wafers. This step normally takes five to ten minutes, with noticeable CO2 bubbling to serve as extra protection from corrosion of exposed metal. Finally, all wafers were subjected to a nitrogen dry for five minutes, a vital process since any remaining moisture could cause severe corrosion and impact electrical performance and final yield.

Once all process steps were performed, both groups were subjected to electrical tests to ensure the chips on the wafers were functioning well and within specifications. Results, as indicated in FIGURE 7, showed no significant differences in term of electrical performance for both the baseline and the ALEGTM-368 product. All wafers met specification and were subject to final yield probe.

FIGURE 7. Electrical performance comparing ALEGTM-380 and ALEGTM-368 products for real production wafers.

FIGURE 7. Electrical performance comparing ALEGTM-380 and ALEGTM-368 products for real production wafers.

Comparable Performance in Final Yield

The same production wafers which were processed using the ALEGTM-368 product at 75 °C were then subjected to final yield analysis and compared to current POR. There was slight improvement in the standard deviation for the ALEGTM-368 product when compared to baseline chemistry. Overall, both products showed comparable final yield at 98 percent (FIGURE 8).

FIGURE 8. Yield distribution for ALEGTM-380 and ALEGTM-368 products on real production wafers.

FIGURE 8. Yield distribution for ALEGTM-380 and ALEGTM-368 products on real production wafers.

Reduced Cost of Ownership

It is undeniable that operating cost is a major consideration in LED manufacturing. Prior to adopting the current POR chemistry, Philips Lumileds tried both HA-based and NMP-based chemistries. Using the HA-based chemistry, a pre-treatment process was needed to soften the photoresist prior to stripping, followed by a solvent intermediate rinse. A strip process with the ALEGTM-368 product eliminated this step and resulted in significant cost savings and increased throughput due to process simplification (TABLE 2).

TABLE 2. Higher throughput and better cost of ownership due to a reduction in process steps.

TABLE 2. Higher throughput and better cost of ownership due to a reduction in process steps.

Summary

The NMP-free ALEGTM-368 product was comparable to POR when tested in various steps of the LED manufacturing process, including: substrate compatibility on critical layers, electrical performance on actual device, and final yield. In terms of process simplification, use of the ALEGTM-368 product also showed similar technical benefits as POR, in which a significant reduction of the number of steps and chemicals used in the process leads to improved cost of ownership.

This collaboration demonstrates how a manufacturer can translate its commitment to environmental, health, and safety improvements and reduction of cost of ownership into the commercialization of a new cleaning process which can bolster its competitive position in the global LED manufacturing industry.

NIK MUSTAPHA is a Principal Applications Engineer, AvantorTM Performance Materials, Inc. MARKUS TAN is Chief Process Engineer, JOACHIM NG is Senior Manager-Process Engineering, and YANG MING CHIEH is a Process Engineer at Philips Lumileds Singapore. DR. GLENN WESTWOOD, Senior Research Scientist, AvantorTM Performance Materials, Inc.

The most expensive defect


December 18, 2014

Defects that aren’t detected inline cost fabs the most. 

By DAVID W. PRICE and DOUGLAS G. SUTHERLAND, KLA-Tencor, Milpitas, CA

Defect inspection tools can be expensive. But regardless of the cost of the inspection tool needed to find a defect, the fab is almost always better off financially if it can find and fix that defect inline versus at the end of line (e.g., electrical test and failure analysis). Here, we are referring to the term defect in a general sense—the same concepts also apply to metrology measurements.

The third fundamental truth of process control for the semiconductor IC industry is:

The most expensive defect is the one that wasn’t detected inline.

FIGURE 1A (top) shows an imaginary SPC chart for a factory experiencing a baseline shift in defectivity (an excursion) beginning at Lot #300. FIGURE 1B (bottom) shows the same scenario except the fab has an effective inline monitor at the point of the excursion. In this case, the excursion is quickly identified and the offending process tool is taken offline for process tuning or maintenance. The excursion is contained and relatively few lots are impacted by the resulting yield loss.

Defects 1a

FIGURE 1. It is always better to find and fix problems inline versus at the end of line. 1a. Problem identification and correction does not occur until bad wafers reach end-of-line test. 1b. Problem identification and correction occurs immediately.

FIGURE 1. It is always better to find and fix problems inline versus at the end of line. 1a. Problem identification and correction does not occur until bad wafers reach end-of-line test. 1b. Problem identification and correction occurs immediately.

The difference between these two scenarios is that in the top chart, the fab is unable to detect the excursion inline so the baseline shift continues unabated until the first affected lots hit end of line test. For a foundry process with a 60-day cycle time, this delay could easily exceed 20 days.

In our experience working with IC manufacturers, the majority of financial impact does not come from large excursions that cause significant yield loss to every affected wafer—those problems are usually identified and rectified very early on. Rather, the largest losses usually come from small excursions that are difficult to detect. They cause relatively low levels of yield loss but persist for prolonged periods of time. It is not uncommon to see thousands or even tens of thousands of wafers exposed to these low level excursions.

The culprit is nearly always a process control capability issue that can be traced back to one or more possible problems. The following list is not meant to be exhaustive, but is instead, representative of the most common causes:

Defects 2

FIGURE 2. Cost vs. mean time to detection (MTTD) of finding a defect inline. The curves are drawn for 4 different wafer costs in a fab with 100k WSPM. It is assumed that the excursion takes place at a single step in the process and happens once per year to each of the process tools at that step. The yield loss is assumed to be 20% during the excursion.

  • Insufficient number of inspection points to allow effective isolation of the defect source.
  • Failing to use a sensitive enough inspection tool or recipe (pixel size is too large, wrong wavelength,
  • etc.)
  • Inspection area of wafer is too low.
  • Review sample size is too small.

Often, the original inspection strategy was carefully designed, but as time passed, changes were made to reduce costs. As new sources of noise are introduced in the SPC chart, the fab becomes less sensitive to small excursions.

FIGURE 2 shows the economic impact to the fab for the two scenarios shown by the SPC chart in FIGURE 1. Imagine an excursion which results in a net 25 percent yield loss (e.g., one out of four wafers must be scrapped). Finding that excursion at end-of-line (+30 days) versus inline (greater than one day) would amount to a staggering $21 million loss per occurrence for an average size run rate of 25k wafer starts per month. Given that this value only repre- sents the cost of re-manufacturing the scrapped wafers it could actually be a conservative estimate. The true cost could easily be double that amount for a fab that is running at the limit of their capacity since it would directly impact revenue.

Even if the situation requires the use of a relatively expensive inspection tool to find, monitor and resolve the problem, it is nearly always in the factory’s best interest to do so. One of the implications of this truth is that if an important defect type can only be detected by a certain inspection tool, then that inspection tool is almost always the most cost-effective solution for that layer. Rather than modifying process control strategies to save costs, it is nearly always in the factory’s best interest to maintain capable, inline process control strategies that prevent the financial impact of ‘the most expensive defect.’

Author’s Note: This is the third in a series of 10 installments that explore fundamental truths about process control—defect inspection and metrology—for the semiconductor industry. Each article introduces one of the 10 fundamental truths and highlights their implications.

Read more Process Watch:

Process Watch: Fab managers don’t like surprises

Process Watch: The 10 fundamental truths of process control for the semiconductor IC industry

Process Watch: Exploring the dark side

The Dangerous Disappearing Defect,” “Skewing the Defect Pareto,” “Bigger and Better Wafers,” “Taming the Overlay Beast,” “A Clean, Well-Lighted Reticle,” “Breaking Parametric Correlation,” “Cycle Time’s Paradoxical Relationship to Yield,” and “The Gleam of Well-Polished Sapphire.”

 

North America-based manufacturers of semiconductor equipment posted $1.22 billion in orders worldwide in November 2014 (three-month average basis) and a book-to-bill ratio of 1.02, according to the November EMDS Book-to-Bill Report published today by SEMI.   A book-to-bill of 1.02 means that $102 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in November 2014 was $1.22 billion. The bookings figure is 10.4 percent higher than the final October 2014 level of $1.10 billion, and is 1.7 percent lower than the November 2013 order level of $1.24 billion.

The three-month average of worldwide billings in November 2014 was $1.19 billion. The billings figure is 0.5 percent higher than the final October 2014 level of $1.18 billion, and is 6.8 percent higher than the November 2013 billings level of $1.11 billion.

“”With the rise in bookings, the book-to-bill ratio climbed above parity in November,”” said SEMI president and CEO Denny McGuirk. “”2014 has been a solid growth year for the semiconductor equipment market, and we expect the foundry and memory sector to continue leading investments in 2015.””

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill

June 2014 

$1,327.5

$1,455.0

1.10

July 2014 

$1,319.1

$1,417.1

1.07

August 2014 

$1,293.4

$1,346.1

1.04

September 2014 

$1,256.5

$1,186.2

0.94

October 2014 (final)

$1,184.2

$1,102.3

0.93

November 2014 (prelim)

$1,189.8

$1,217.1

1.02

Source: SEMI, December 2014

Daintree Networks has been named by CIO Review Magazine as one of the ’50 Most Promising Internet of Things (IoT) Companies 2014.’ The list features the best vendors and consultants providing technologies and services related to IoT. In the same issue, Daintree Networks CEO Danny Yu was featured as the ‘Entrepreneur of the Month,’ which highlights his career path and leadership of Daintree Networks to becoming a prominent player in the Enterprise-IoT market and top provider of wireless mesh networking solutions for smart buildings.

A distinguished panel comprised of CEOs, CIOs, CTOs, and analysts including the CIO Review editorial board determined the list of top companies at the forefront of tackling challenges in the Internet of Things market in the U.S. “We are happy to showcase Daintree Networks as a top IoT company due to the success of its ControlScope solution in advancing the IoT landscape for commercial entities,” said Harvi Sachar, publisher and founder, CIO Review. “Daintree’s dedication to true open standards-based solutions continues to break down adoption barriers and provides significant cost advantages to its customers. We’re excited to have them on our top IoT companies list, and to feature Daintree’s leadership, CEO Danny Yu, as the ‘Entrepreneur of the Month.'”

“We are honored to be recognized by CIO Review Magazine as one of the top ’50 Most Promising IoT Companies for 2014,'” said Danny Yu, Daintree Networks CEO. “This distinction reinforces the success of our Enterprise Internet of Things,(E-IoT) approach, which leverages our true open standards-based solutions to provide cost-effective wireless mesh networking for smart buildings. In addition, as ‘Entrepreneur of the Month,’ I appreciate the recognition, but the credit goes to the dedicated, forward-thinking employees of the company who are driving our explosive growth.”

What’s next for MEMS?


December 16, 2014

By Paula Doe, SEMI

The proliferation of sensors into high volume consumer markets, and into the emerging Internet of Things, is driving the MEMS market to maturity, with a developed ecosystem to ease use and grow applications. But it is also bringing plenty of demands for new technologies, and changes in how companies will compete.

While the IoT may be all about sensors, it is not necessarily a bonanza for most traditional MEMS sensor makers. “The surprising winner turns to be optical MEMS for optical cross connect for the data center, where big growth is coming,” said Jérémie Bouchaud, IHS Director and Sr. Principal Analyst, MEMS & Sensors, at the recent MEMS Industry Group (MIG) “MEMS Executive Congress” held in Scottsdale, Arizona from November 5-7.

The market for wearables will also see fast growth for the next five years, largely for smart watches, driving demand for motion sensors, health sensors, sensor hubs and software –but even in 2019 the market for sensors in wearables will remain <5% the size of the phone/tablet market, IHS predicts.  The greater IoT market may reach billions of other connected devices in the next decade, but sensor demand will be very fragmented and very commoditized. Smart homes may use 20 million sensors in 2018, but many other industrial applications will probably each use only 100,000 to 2-3 million sensors a year, Bouchaud noted.

And most of this sensor market will be non-MEMS sensors, some mature and some emerging, including light sensors, fingerprint sensors, pulse sensors, gas sensors, and thermal sensors, all requiring different and varied manufacturing technologies.  Much of the new sensor demand from automotive will be also be for non-MEMS radar and cameras, though they will also add MEMS for higher performance gyros, lidar and microbolometers, according to IHS. Expect major MEMS makers to diversify into more of these other types of sensors.

MEMS Exec Bouchaud - IHS - MIG US 2014_Page_22_Resized

Yole Développement CEO Jean Christophe Eloy looked at how the value in the IoT would develop.  While the emerging IoT market is initially primarily a hardware market, with hardware sales climbing healthily for the next five years or so, it will quickly become primarily a software and services market.  In five to six years hardware sales will level off, and the majority of the value will shift to data processing and value added services.  This information service market will continue to soar, to account for 75% of the $400 Billion IoT market by 2024.

MEMS Exec JC Eloy_Market Panel_MIG 2014 V1_Page_28_Resized

Re-thinking the business models?

The IoT will bring big changes to the electronics industry, from new technologies to new business models, and new leaders, suggested George Liu, TSMC Director of Corporate Development.  He of course also argued that the high volume and low costs required for connected objects would drive sensor production to high volume foundries, and drive more integration with CMOS for smart distributed processing at CMOS makers.

Liu projected these changes would mean a new set of companies would come out on top. Few leading system makers managed to successfully transition from the PC era to the mobile handset era, or from the mobile handset era to the smart phone era, as both the key technologies and the winning business models changed, and chip makers faced disruption as well. “For one thing, the business model changed from making everything in house to making nothing,” he noted. “The challenge is to focus on where one is most efficient.”

“The odds of Apple or Google being the dominant players in the next paradigm is zero,” concurred Chris Wasden, Executive Director, Sorenson Center for Discovery and Innovation at the University of Utah.

Lots of other things will have to change to enable the IoT as well. Liu projected that devices will need to operate at near threshold or even sub-threshold voltages, with “thinner” processing overhead, while the integration of more different functions will redefine the system-in-a-chip. Smaller and lower cost devices will require new materials and new architectures, new types of heterogenous integration and wafer-level packaging, and an ecosystem of standard open platforms to ease development. TSMC’s own MEMS development kit has layout rules, but not yet behaviorial rules, always the more challenging issue for these mechanical structures. “That’s the next big thing for us,” he asserted. “These huge gaps mean huge opportunities.”

IDMs and systems companies still likely to dominate                     

Still, the wide variety, and sometimes tricky mechanics and low volumes, of many MEMS devices have been a challenge for the volume foundries.  The fabless MEMS model has seen only limited success so far and is unlikely to see much in the next decade either, countered Jean Christophe Eloy, CEO of Yole Développement, who pointed out that some 75% of the MEMS business is dominated by the four big IDMs who can drive costs down with volumes and diversified product lines. To date, only two fabless companies—InvenSense and Knowles—are among the top 30 MEMS suppliers.

Most of the rest of the top 30 are system makers with their own fabs, making their own MEMS devices to enable higher value system products of their own, which is likely to continue to remain a successful approach, as the opportunities for adding value increasingly come from software, processers, and systems.  “MEMS value has always been at the system level,” noted Eloy.

GE’s recent introduction of an improved MEMS RF switch to significantly reduce the size and cost of its MRI systems is one compelling example, with the potential of the little MEMS component to greatly extend the use of this high-contrast soft-tissue imaging technology.  Though the company sold off its general advanced sensors unit last year to connector maker Amphenol Corp., it is still making its unique RF switch using a special alloy in house in small volumes as a key enabler of its high value MRI systems. These imagers work by aligning the spin of hydrogen nuclei with a strong magnet, tipping them off axis with a strong RF pulse from an antenna, then measuring how they snap back into alignment with lots of localized antennas with low power RF switches close to the body.  “We’re now launching a new receive chain using MEMS RF switches,” reported Tim Nustad, GM and CTO, Global Magnetic Resonance, GE Healthcare. “Later we can see a flexible, light weight MRI blanket.”

Opportunity for smaller, lower power, lower cost technologies

So far, MEMS makers have driven down the cost of devices by continually shrinking the size of the die.  But that may be about to change, as the mechanical moving structures have about reached the limit of how much smaller they can get and still produce the needed quality signal.  That’s opening the door for a new generation of devices using different sensing structures and different manufacturing processes.  For inertial sensors, options include bulk acoustic wave sensing from Qualtre, piezoresistive nanowires from Tronics and CEA/Leti, and even extrapolating gyroscope-like data with software from accelerometers and magnetometers. MCube’s virtual gyro with this approach, now in production with some design wins, claims to save 80% of the power and 50% of the cost of a conventional MEMS gyro.

Piezoelectric sensing, often with PZT films, is also drawing attention, with products in development  for timing devices and microphones. Sand9 claims lower noise and lower power for its piezoelectric MEMS timing, now starting volume manufacturing for Intel and others for shipments in 1Q15.  It has also recently received a patent for piezo microphone, while startup Vesper (formerly known as Baker-Calling and then Sonify) also reports working with a major customer for its piezoelectric MEMS microphone.

More open platforms ease development of new applications of established devices

The maturing ecosystem of open development platforms across the value chain is helping to ease commercialization of new applications. The two latest developments in this infrastructure are a standard interface to connect all kinds of different sensors to the controller, and an open library of basic sensor processing software. The MIPI Alliance brought together major users and suppliers—ranging across STMicroelectronics and InvenSense, to AMD and Intel, to Broadcom and Qualcomm, to Cadence and Mentor Graphics—to agree on an interface specification to make it easier for system designers to connect and manage a wide range of sensors from multiple suppliers while minimizing power consumption of the microcontroller.  Meanwhile, sensor makers and researchers are making a selection of baseline algorithms available for open use to ease development of new products.  Offerings include Freescale’s inertial sensor fusion and PNI Sensors’ heart rate monitoring algorithms, along with other contributions from Analog Devices, Kionix, NIST, UC Berkeley and Carnegie Mellon to start. The material will be available through the MIG website.

Plenty of companies have also introduced their own individual platforms to ease customer development tasks as well, ranging from MEMS foundries’ inertial sensor manufacturing platforms to processor makers’ development boards and kits. Recently STMicroelectronics also adding its sensor fusion and other software blocks to its development platform.

KegData is one example of a company making use of these platforms to enable development of a solution for a niche problem – an automated system for telling pub owners how much beer is left in their kegs, using a Freescale pressure sensor and development tools. Currently the only way to know when a beer keg is empty is to go lift and weigh or shake it, a problem for efficiently managing expensive refrigerated inventory.  Adding a pressure sensor in the coupler on top of the keg allows the height of the beer to be measured by the differential pressure between the liquid and the gas above it. The sensor then sends the information to a hub controller that communicates with the internet, letting the pub manager know to order more, or even automatically placing the order directly with the distributor.  The startup’s business model is to give the system to distributors for free, but sell them the service of automating inventory management for their customers, saving them the significant expense of sending drivers around to shake the kegs and take pre-orders.

More broadly, MEMS microphones are poised to continue to find a wide range of new applications. IHS’ Bouchaud  pointed out that cars will soon each be using 12-14 MEMS microphone units, to listen for changes in different conditions, while home security applications will use them to detect  security breaches from unusual patterns of sounds, from people in the house to dogs barking. Startup MoboSens says it converts its chemical water quality data into audio signals to feed it into the phone’s mic port for better quality.

Opportunities still for new types of MEMS devices

Growth will also continue to come from new MEMS devices that find additional ways to replace conventional mechanical parts with silicon. Eloy noted that MEMS autofocus units may finally be the next breakout device, as they have started shipping in the last few weeks, and aim at shipping for products in 2015.  MEMS microspeakers are also making progress and could come soon. But ramping new devices to the high volumes demanded by consumer markets is particularly challenging. “The only way to enter the market is with new technology, but high volume consumer markets make entry very hard for new devices,” he said. “The market is saturated, wins depend on production costs, and not everyone can keep up…. The last significant new device was the MEMS microphone, and that was ten years ago.”

But innovative new MEMS technologies also continue to be developed for initial applications in higher margin industrial and biomedical fields. One interesting platform is the MEMS spectrometer from VTT Technical Research Center of Finland.  This robust tunable interferometer essentially consists of an adjustable air gap between two mirrors, made of alternating ALD or LPCVD bands of materials with different defraction indexes, explained Anna Rissanen, VTT research team leader for MOEMS and bioMEMS instruments. The structure can be tuned by different voltages to filter particular bands of light, while a single-point detector, instead of the usual array, enables very small and low cost spectrometers or hyper spectral cameras. VTT spinout Spectral Engines is commercializing near-IR and mid-IR sensors aimed at detecting moisture, hydrocarbons and gases in industrial applications.  Other programs have developed sensors for environmental analysis by flyover by nano satellites and UAVs, sensors for monitoring fuel quality to optimize energy use and prevent engine damage, and sensors that can diagnose melanoma from a scan of the skin.

Keep up with these changing manufacturing technology demands at upcoming MEMS events at SEMICON China 2015SEMICON Russia 2015SEMICON West 2015, and at the new European MEMS Summit planned for Milan in September.

A team of researchers led by North Carolina State University has found that  stacking materials that are only one atom thick can create semiconductor junctions that transfer charge efficiently, regardless of whether the crystalline structure of the materials is mismatched – lowering the manufacturing cost for a wide variety of semiconductor devices such as solar cells, lasers and LEDs.

“This work demonstrates that by stacking multiple two-dimensional (2-D) materials in random ways we can create semiconductor junctions that are as functional as those with perfect alignment” says Dr. Linyou Cao, senior author of a paper on the work and an assistant professor of materials science and engineering at NC State.

“This could make the manufacture of semiconductor devices an order of magnitude less expensive.”

Schematic illustration of monolayer MoS2 and WS2 stacked vertically. Image: Linyou Cao.

Schematic illustration of monolayer MoS2 and WS2 stacked vertically. Image: Linyou Cao.

For most semiconductor electronic or photonic devices to work, they need to have a junction, which is where two semiconductor materials are bound together. For example, in photonic devices like solar cells, lasers and LEDs, the junction is where photons are converted into electrons, or vice versa.

All semiconductor junctions rely on efficient charge transfer between materials, to ensure that current flows smoothly and that a minimum of energy is lost during the transfer. To do that in conventional semiconductor junctions, the crystalline structures of both materials need to match. However, that limits the materials that can be used, because you need to make sure the crystalline structures are compatible. And that limited number of material matches restricts the complexity and range of possible functions for semiconductor junctions.

“But we found that the crystalline structure doesn’t matter if you use atomically thin, 2-D materials,” Cao says. “We used molybdenum sulfide and tungsten sulfide for this experiment, but this is a fundamental discovery that we think applies to any 2-D semiconductor material. That means you can use any combination of two or more semiconductor materials, and you can stack them randomly but still get efficient charge transfer between the materials.”

Currently, creating semiconductor junctions means perfectly matching crystalline structures between materials – which requires expensive equipment, sophisticated processing methods and user expertise. This manufacturing cost is a major reason why semiconductor devices such as solar cells, lasers and LEDs remain very expensive. But stacking 2-D materials doesn’t require the crystalline structures to match.

“It’s as simple as stacking pieces of paper on top of each other – it doesn’t even matter if the edges of the paper line up,” Cao says.

The paper, “Equally Efficient Interlayer Exciton Relaxation and Improved Absorption in Epitaxial and Non-epitaxial MoS2/WS2 Heterostructures,” was published as a “just-accepted” manuscript in Nano Letters Dec. 3.

Lead authors of the paper are Yifei Yu, a Ph.D. student at NC State; Dr. Shi Hu, a former postdoctoral researcher at NC State; and Liqin Su, a Ph.D. student at the University of North Carolina at Charlotte. The paper was co-authored by Lujun Huang, Yi Liu, Zhenghe Jin, and Dr. Ki Wook Kim of NC State; Drs. Alexander Puretzky and David Geohegan of Oak Ridge National Laboratory; and Dr. Yong Zhang of UNC Charlotte. The research was funded by the U.S. Army Research Office under grant number W911NF-13-1-0201 and the National Science Foundation under grant number DMR-1352028.