Category Archives: Packaging Materials

The 63rd annual IEEE International Electron Devices Meeting (IEDM), to be held December 2-6, 2017 at the Hilton San Francisco Union Square hotel, may go down as one of the most memorable editions for the sheer variety and depth of its talks, sessions, courses and events.

Among the most-anticipated talks are presentations by Intel and Globalfoundries, which will each detail their forthcoming competing FinFET transistor technology platforms in a session on Wednesday morning. FinFET transistors are a major driver of the continuing progress of the electronics industry, and these platforms are as important for their commercial potential as they are for their technical innovations.*

Each year at the IEDM, the world’s best technologists in micro/nano/bioelectronics converge to participate in a technical program consisting of more than 220 presentations, along with other events.

“Those who attend IEDM 2017 will find much that is familiar, beginning with a technical program describing breakthroughs in areas ranging from mainstream CMOS technology to innovative nanoelectronics to medical devices. The Sunday Short Courses are also a perennial favorite because they are not only comprehensive but are also taught by accomplished world experts,” said Dr. Barbara De Salvo, Scientific Director at Leti. “But we have added some new features this year. One is a fourth Plenary session, on Wednesday morning, featuring Nobel winner Hiroshi Amano. Another is a revamped Tuesday evening panel. Not only will it focus on a topic of great interest to many people, it is designed to be more open and less formal.”

Other features of the IEDM 2017 include:

  • Focus Sessions on the following topics: 3D Integration and Packaging; Modeling Challenges for Neuromorphic Computing; Nanosensors for Disease Diagnostics; and Silicon Photonics: Current Status and Perspectives.
  • A vendor exhibition will be held, based on the success of last year’s event at the IEDM.
  • The IEEE Magnetics Society will again host a joint poster session on MRAM (magnetic RAM) in the exhibit area. New for this year, though, is that the Society will also hold its annual MRAM Global Innovation Forum on Thursday, Dec. 7 at the same hotel, enabling IEDM attendees to participate. (Refer to the IEEE Magnetics Society website.) The forum consists of invited talks by leading experts and a panel discussion.

Here are details of some of the events that will take place at this year’s IEDM:

90-Minute Tutorials – Saturday, Dec. 2
These tutorials on emerging technologies will be presented by leading technical experts in each area, with the goal of bridging the gap between textbook-level knowledge and cutting-edge current research.

  • The Evolution of Logic Transistors Toward Low Power and High Performance IoT Applications, Dr. Dae Won Ha, Samsung Electronics
  • Negative Capacitance Transistors, Prof. Sayeef Salahuddin, UC Berkeley
  • Fundamental, Thermal, and Energy Limits of PCM and ReRAM, Prof. Eric Pop, Stanford University
  • Hardware Opportunities in Cognitive Computing: Near- and Far-Term, Dr. Geoffrey Burr, Principal Research Staff Member, IBM Research-Almaden
  • 2.5D Interposers and High-Density Fanout Packaging as Enablers for Future Systems Integration, Dr. Venkatesh Sundaram, Associate Director, Georgia Tech 3D Systems Packaging Research Center
  • Silicon Photonics for Next-Generation Optical Interconnects, Dr. Joris Van Campenhout, Program Director Optical I/O, Imec

Short Courses – Sunday, Dec. 3
The day-long Short Courses provide the opportunity to learn about important developments in key areas, and they enable attendees to network with the industry’s leading technologists.

Boosting Performance, Ensuring Reliability, Managing Variability in Sub-5nm CMOS, organized by Sandy Liao of Intel, will feature the following sections:

  • Transistor Performance Elements for 5nm Node and Beyond, Gen Tsutsui, IBM
  • Multi-Vt Engineering and Gate Performance Control for Advanced FinFET Architecture, Steve CH Hung, Applied Materials
  • Sub-5nm Interconnect Trends and Opportunities, Zsolt Tokei, Imec
  • Transistor Reliability: Physics, Current Status, and Future Considerations, Stephen M. Ramey, Intel
  • Back End Reliability Scaling Challenges, Variation Management, and Performance Boosters for sub-5nm CMOS,Cathyrn Christiansen, Globalfoundries
  • Design-Technology Co-Optimization for Beyond 5nm Node, Andy Wei, TechInsights

Merged Memory-Logic Technologies and Their Applications, organized by Kevin Zhang of TSMC, will feature the following sections:

  • Embedded Non Volatile Memory for Automotive Applications, Alfonso Maurelli, STMicroelectronics
  • 3D ReRAM: Crosspoint Memory Technologies, Nirmal Ramaswamy, Micron
  • Ferroelectric Memory in CMOS Processes, Thomas Mikolajick, Namlab
  • Embedded Memories Technology Scaling & STT-MRAM for IoT & Automotive, Danny P. Shum, Globalfoundries
  • Embedded Memories for Energy-Efficient Computing, Jonathan Chang, TSMC
  • Abundant-Data Computing: The N3XT 1,000X, Subhasish Mitra, Stanford University

Plenary Presentations – Monday, Dec. 4

  • Driving the Future of High-Performance Computing, Lisa Su, President & CEO, AMD
  • Energy-Efficient Computing and Sensing: From Silicon to the Cloud, Adrian Ionescu, Professor, EPFL
  • System Scaling Innovation for Intelligent Ubiquitous Computing, Jack Sun, VP of R&D, TSMC

Plenary Presentation – Wednesday, Dec. 6

  • Development of a Sustainable Smart Society by Transformative Electronics, Hiroshi Amano, Professor, Nagoya University. Dr. Amano received the 2014 Nobel Prize in Physics along with Isamu Akasaki and Shuji Nakamura for the invention of efficient blue LEDs, which sparked a revolution in innovative, energy-saving lighting. His talk will be preceded by the Focus Session on silicon photonics.

Evening Panel Session – Tuesday evening, Dec. 5

  • Where will the Next Intel be Headquartered?  Moderator: Prof. Philip Wong, Stanford

Entrepreneurs Lunch
Jointly sponsored by IEDM and IEEE EDS Women in Engineering, this year’s Entrepreneurs Lunch will feature Courtney Gras, Executive Director for Launch League, a local nonprofit focused on developing a strong startup ecosystem in Ohio. The moderator will be Prof. Leda Lunardi from North Carolina State University. Gras is an engineer by training and an entrepreneur by nature. After leaving her job as a NASA power systems engineer to work for on own startup company, she discovered a passion for building startup communities and helping technology-focused companies meet their goals. Named to the Forbes ’30 Under 30′ list in 2016, among many other recognitions and awards, Gras enjoys sharing her stories of founding a cleantech company with young entrepreneurs. She speaks on entrepreneurship, women in technology and clean energy at venues such as TEDx Budapest, the Pioneers Festival, and the IEEE WIE International Women’s Leadership Conference.

 

China IC industry outlook


October 17, 2017

SEMI, the global industry association and provider of independent electronics market research, today announced its new China IC Industry Outlook Report, a comprehensive report for the electronics manufacturing supply chain. With an increasing presence in the global semiconductor manufacturing supply chain, the market opportunities in China are expanding dramatically.

China is the largest consumer of semiconductors in the world, but it currently relies mainly on semiconductor imports to drive its growth. Policies and investment funds are now in place to further advance the progress of indigenous suppliers in China throughout the entire semiconductor supply chain. This shift in policy and related initiatives have created widespread interest in the challenges and opportunities in China.

With at least 15 new fab projects underway or announced in China since 2017, spending on semiconductor fab equipment is forecast to surge to more than $12 billion, annually, by 2018. As a result, China is projected to be the top spending region in fab equipment by 2019, and is likely to approach record all-time levels for annual spending for a single region.

Figure 1

Figure 1

This report covers the full spectrum of the China IC industry within the context of the global semiconductor industry. With more than 60 charts, data tables, and industry maps from SEMI sources, the report reveals the history and the latest industry developments in China across vast geographical areas ranging from coastline cities to the less developed though emerging mid-western regions.

The China IC industry ecosystem outlook covers central and local government policies, public and private funding, the industry value chain from design to manufacturing and equipment to materials suppliers. Key players in each industry sector are highlighted and discussed, along with insights into China domestic companies with respect to their international peers, and potential supply implications from local equipment and material suppliers. The report specifically details semiconductor fab investment in China, as well as the supply chain for domestic equipment and material suppliers.

Figure 2

Figure 2

Using a simple layer-by-layer coating technique, researchers from the U.S. and Korea have developed a paper-based flexible supercapacitor that could be used to help power wearable devices. The device uses metallic nanoparticles to coat cellulose fibers in the paper, creating supercapacitor electrodes with high energy and power densities – and the best performance so far in a textile-based supercapacitor.

By implanting conductive and charge storage materials in the paper, the technique creates large surface areas that function as current collectors and nanoparticle reservoirs for the electrodes. Testing shows that devices fabricated with the technique can be folded thousands of times without affecting conductivity.

“This type of flexible energy storage device could provide unique opportunities for connectivity among wearable and internet of things devices,” said Seung Woo Lee, an assistant professor in the Woodruff School of Mechanical Engineering at the Georgia Institute of Technology. “We could support an evolution of the most advanced portable electronics. We also have an opportunity to combine this supercapacitor with energy-harvesting devices that could power biomedical sensors, consumer and military electronics, and similar applications.”

The research, done with collaborators at Korea University, was supported by the National Research Foundation of Korea and reported September 14 in the journal Nature Communications.

Yongmin Ko, Minseong Kwon, Wan Ki Bae, Byeongyong Lee, Seung Woo Lee & Jinhan Cho, “Flexible supercapacitor electrodes based on real metal-like cellulose papers,” (Nature Communications, 2017) http://dx.doi.org/10.1038/s41467-017-00550-3

Yongmin Ko, Minseong Kwon, Wan Ki Bae, Byeongyong Lee, Seung Woo Lee & Jinhan Cho, “Flexible supercapacitor electrodes based on real metal-like cellulose papers,” (Nature Communications, 2017) http://dx.doi.org/10.1038/s41467-017-00550-3

Energy storage devices are generally judged on three properties: their energy density, power density and cycling stability. Supercapacitors often have high power density, but low energy density – the amount of energy that can be stored – compared to batteries, which often have the opposite attributes. In developing their new technique, Lee and collaborator Jinhan Cho from the Department of Chemical and Biological Engineering at Korea University set out to boost energy density of the supercapacitors while maintaining their high power output.

They began by dipping paper samples into a beaker of solution containing an amine surfactant material designed to bind the gold nanoparticles to the paper. Next they dipped the paper into a solution containing gold nanoparticles. Because the fibers are porous, the surfactants and nanoparticles enter the fibers and become strongly attached, creating a conformal coating on each fiber.

By repeating the dipping steps, the researchers created a conductive paper on which they added alternating layers of metal oxide energy storage materials such as manganese oxide. The ligand-mediated layer-by-layer approach helped minimize the contact resistance between neighboring metal and/or metal oxide nanoparticles. Using the simple process done at room temperatures, the layers can be built up to provide the desired electrical properties.

“It’s basically a very simple process,” Lee said. “The layer-by-layer process, which we did in alternating beakers, provides a good conformal coating on the cellulose fibers. We can fold the resulting metallized paper and otherwise flex it without damage to the conductivity.”

Though the research involved small samples of paper, the solution-based technique could likely be scaled up using larger tanks or even a spray-on technique. “There should be no limitation on the size of the samples that we could produce,” Lee said. “We just need to establish the optimal layer thickness that provides good conductivity while minimizing the use of the nanoparticles to optimize the tradeoff between cost and performance.”

The researchers demonstrated that their self-assembly technique improves several aspects of the paper supercapacitor, including its areal performance, an important factor for measuring flexible energy-storage electrodes. The maximum power and energy density of the metallic paper-based supercapacitors are estimated to be 15.1 mW/cm2 and 267.3 uW/cm2, respectively, substantially outperforming conventional paper or textile supercapacitors.

The next steps will include testing the technique on flexible fabrics, and developing flexible batteries that could work with the supercapacitors. The researchers used gold nanoparticles because they are easy to work with, but plan to test less expensive metals such as silver and copper to reduce the cost.

During his Ph.D. work, Lee developed the layer-by-layer self-assembly process for energy storage using different materials. With his Korean collaborators, he saw a new opportunity to apply that to flexible and wearable devices with nanoparticles.

“We have nanoscale control over the coating applied to the paper,” he added. “If we increase the number of layers, the performance continues to increase. And it’s all based on ordinary paper.”

In addition to those already mentioned, the research team included Yongmin Ko and Minseong Kwon from Korea University, Wan Ki Bae from the Photoelectronic Hybrids Research Center at the Korea Institute of Science and Technology, and Byeongyong Lee from Georgia Tech.

Physicists at the University of California, Riverside have developed a photodetector – a device that senses light – by combining two distinct inorganic materials and producing quantum mechanical processes that could revolutionize the way solar energy is collected.

Photodetectors are almost ubiquitous, found in cameras, cell phones, remote controls, solar cells, and even the panels of space shuttles. Measuring just microns across, these tiny devices convert light into electrons, whose subsequent movement generates an electronic signal. Increasing the efficiency of light-to-electricity conversion has been one of the primary aims in photodetector construction since their invention.

Lab researchers stacked two atomic layers of tungsten diselenide (WSe2) on a single atomic layer of molybdenum diselenide (MoSe2). Such stacking results in properties vastly different from those of the parent layers, allowing for customized electronic engineering at the tiniest possible scale.

This image shows an energy diagram of the WSe2-MoSe2 device. When a photon (1) strikes the WSe2 layer, it knocks loose an electron (2), freeing it to conduct through the WSe2 (3). At the junction between the two materials, the electron drops down into MoSe2 (4). The energy given off in the drop catapults a second electron from the WSe2 (5) into the MoSe2 (6), where both electrons are free to move and generate electricity. Credit: University Communications, UC Riverside.

This image shows an energy diagram of the WSe2-MoSe2 device. When a photon (1) strikes the WSe2 layer, it knocks loose an electron (2), freeing it to conduct through the WSe2 (3). At the junction between the two materials, the electron drops down into MoSe2 (4). The energy given off in the drop catapults a second electron from the WSe2 (5) into the MoSe2 (6), where both electrons are free to move and generate electricity. Credit: University Communications, UC Riverside.

Within atoms, electrons live in states that determine their energy level. When electrons move from one state to another, they either acquire or lose energy. Above a certain energy level, electrons can move freely. An electron moving into a lower energy state can transfer enough energy to knock loose another electron.

UC Riverside physicists observed that when a photon strikes the WSe2 layer, it knocks loose an electron, freeing it to conduct through the WSe2. At the junction between WSe2 and MoSe2, the electron drops down into MoSe2. The energy given off then catapults a second electron from the WSe2 into the MoSe2, where both electrons become free to move and generate electricity.

“We are seeing a new phenomenon occurring,” said Nathaniel M. Gabor, an assistant professor of physics, who led the research team. “Normally, when an electron jumps between energy states, it wastes energy. In our experiment, the waste energy instead creates another electron, doubling its efficiency. Understanding such processes, together with improved designs that push beyond the theoretical efficiency limits, will have a broad significance with regard to designing new ultra-efficient photovoltaic devices.”

Study results appear today in Nature Nanotechnology.

“The electron in WSe2 that is initially energized by the photon has an energy that is low with respect to WSe2,” said Fatemeh Barati, a graduate student in Gabor’s Quantum Materials Optoelectronics lab and the co-first author of the research paper. “With the application of a small electric field, it transfers to MoSe2, where its energy, with respect to this new material, is high. Meaning, it can now lose energy. This energy is dissipated as kinetic energy that dislodges the additional electron from WSe2.”

In existing solar panels models, one photon can at most generate one electron. In the prototype the researchers developed, one photon can generate two electrons or more through a process called electron multiplication.

The researchers explained that in ultrasmall materials, electrons behave like waves. Though it is unintuitive at large scales, the process of generating two electrons from one photon is perfectly allowable at extremely small length scales. When a material, such as WSe2 or MoSe2, gets thinned down to dimensions nearing the electron’s wavelength, the material’s properties begin to change in inexplicable, unpredictable, and mysterious ways.

“It’s like a wave stuck between walls closing in,” Gabor said. “Quantum mechanically, this changes all the scales. The combination of two different ultra small materials gives rise to an entirely new multiplication process. Two plus two equals five.”

“Ideally, in a solar cell we would want light coming in to turn into several electrons,” said Max Grossnickle, also a graduate student in Gabor’s lab and the research paper’s co-first author. “Our paper shows that this is possible.”

Barati noted that more electrons could be generated also by increasing the temperature of the device.

“We saw a doubling of electrons in our device at 340 degrees Kelvin (150 F), which is slightly above room temperature,” she said. “Few materials show this phenomenon around room temperature. As we increase this temperature, we should see more than a doubling of electrons.”

Electron multiplication in conventional photocell devices typically requires applied voltages of 10-100 volts. To observe the doubling of electrons, the researchers used only 1.2 volts, the typical voltage supplied by an AA battery.

“Such low voltage operation, and therefore low power consumption, may herald a revolutionary direction in photodetector and solar cell material design,” Grossnickle said.

He explained that the efficiency of a photovoltaic device is governed by a simple competition: light energy is either converted into waste heat or useful electronic power.

“Ultrathin materials may tip the balance in this competition by simultaneously limiting heat generation, while increasing electronic power,” he said.

Gabor explained that the quantum mechanical phenomenon his team observed in their device is similar to what occurs when cosmic rays, coming into contact with the Earth’s atmosphere with high kinetic energy, produce an array of new particles.

He speculated that the team’s findings could find applications in unforeseen ways.

“These materials, being only an atom thick, are nearly transparent,” he said. “It’s conceivable that one day we might see them included in paint or in solar cells incorporated into windows. Because these materials are flexible, we can envision their application in wearable photovoltaics, with the materials being integrated into the fabric. We could have, say, a suit that generates power – energy-harvesting technology that would be essentially invisible.”

WIN Semiconductors Corp (TPEx:3105), the world’s largest pure-play compound semiconductor foundry, has released an optimized version of its 0.25µm gallium nitride technology, NP25, that provides superior DC and RF transistor performance. NP25 is a 0.25µm-gate GaN-on-SiC process, and offers users the flexibility to produce both fully integrated amplifier products as well as custom discrete transistors. In production since 2014, the optimized 0.25µm process offers enhanced RF performance with fast switching time, higher gain and increased power added efficiency for demanding power applications through Ku-band

Optimized NP25 transistors exhibit more ideal DC and RF IV characteristics and provide 2 dB higher maximum stable gain. Increased gain leads directly to higher power density and PAE under a range of tuning and bias conditions. This performance-optimized process is fully qualified and supported with a comprehensive design kit and transistor models.

The WIN NP25 technology is fabricated on 4-inch silicon carbide substrates and operates at a drain bias of 28 volts. At 10GHz, NP25 provides saturated output power of 5 watts/mm with 19 dB linear gain and over 65% power added efficiency. These performance metrics make the NP25 process well suited for a variety of high power, broad bandwidth and linear transmit functions in the radar, satellite communications, and wireless infrastructure markets.

As microchips become ever smaller and therefore faster, the shrinking size of their copper interconnects leads to increased electrical resistivity at the nanoscale. Finding a solution to this impending technical bottleneck is a major problem for the semiconductor industry.

One promising possibility involves reducing the resistivity size effect by altering the crystalline orientation of interconnect materials. A pair of researchers from Rensselaer Polytechnic Institute conducted electron transport measurements in epitaxial single-crystal layers of tungsten (W) as one such potential interconnect solution. They performed first-principles simulations, finding a definite orientation-dependent effect. The anisotropic resistivity effect they found was most marked between layers with two particular orientations of the lattice structure, namely W(001) and W(110). The work is published this week in the Journal of Applied Physics, from AIP Publishing.

The measured resistivity of epitaxial tungsten layers with (001) and (011) crystal orientation vs thickness d. The tungsten Fermi surface is color coded according to the wave vector dependent Fermi velocity vf. At small thickness, where surface scattering dominates, W(011) is nearly twice as conductive as W(001). Transport simulations indicate that this is due to the anisotropy in the Fermi surface. These results indicate how narrow wires in future computer chips can be made two times more conductive, effectively reducing the required electric power by 50 percent. Credit: Daniel Gall, Rensselaer Polytechnic Institute

The measured resistivity of epitaxial tungsten layers with (001) and (011) crystal orientation vs thickness d. The tungsten Fermi surface is color coded according to the wave vector dependent Fermi velocity vf. At small thickness, where surface scattering dominates, W(011) is nearly twice as conductive as W(001). Transport simulations indicate that this is due to the anisotropy in the Fermi surface. These results indicate how narrow wires in future computer chips can be made two times more conductive, effectively reducing the required electric power by 50 percent. Credit: Daniel Gall, Rensselaer Polytechnic Institute

Author Pengyuan Zheng noted that both the 2013 and 2015 International Technology Roadmap for Semiconductors (ITRS) called for new materials to replace copper as interconnect material to limit resistance increase at reduced scale and minimize both power consumption and signal delay.

In their study, Zheng and co-author Daniel Gall chose tungsten because of its asymmetric Fermi surface — its electron energy structure. This made it a good candidate to demonstrate the anisotropic resistivity effect at the small scales of interest. “The bulk material is completely isotropic, so the resistivity is the same in all directions,” Gall said. “But if we have thin films, then the resistivity varies considerably.”

To test the most promising orientations, the researchers grew epitaxial W(001) and W(110) films on substrates and conducted resistivity measurements of both while immersed in liquid nitrogen at 77 Kelvin (about -196 degrees Celsius) and at room temperature, or 295 Kelvin. “We had roughly a factor of 2 difference in the resistivity between the 001 oriented tungsten and 110 oriented tungsten,” Gall said, but they found considerably smaller resistivity in the W(011) layers.

Although the measured anisotropic resistance effect was in good agreement with what they expected from calculations, the effective mean free path — the average distance electrons can move before scattering against a boundary — in the thin film experiments was much larger than the theoretical value for bulk tungsten.

“An electron travels through a wire on a diagonal, it hits a surface, gets scattered, and then continues traveling until it hits something else, maybe the other side of the wire or a lattice vibration,” Gall said. “But this model looks wrong for small wires.”

The experimenters believe this may be explained by quantum mechanical processes of the electrons that arise at these limited scales. Electrons may be simultaneously touching both sides of the wire or experiencing increased electron-phonon (lattice vibrations) coupling as the layer thickness decreases, phenomena that could affect the search for another metal to replace copper interconnects.

“The envisioned conductivity advantages of rhodium, iridium, and nickel may be smaller than predicted,” said Zheng. Findings like these will prove increasingly important as quantum mechanical scales become more commonplace for the demands of interconnects.

The research team is continuing to explore the anisotropic size effect in other metals with nonspherical Fermi surfaces, such as molybdenum. They found that the orientation of the surface relative to the layer orientation and transport direction is vital, as it determines the actual increase in resistivity at these reduced dimensions.

“The results presented in this paper clearly demonstrate that the correct choice of crystalline orientation has the potential to reduce nanowire resistance,” said Zheng. The importance of the work extends beyond current nanoelectronics to new and developing technologies, including transparent flexible conductors, thermoelectrics and memristors that can potentially store information. “It’s the problem that defines what you can do in the next technology,” Gall said.

A sea of spinning electrons


October 3, 2017

Picture two schools of fish swimming in clockwise and counterclockwise circles. It’s enough to make your head spin, and now scientists at Rutgers University-New Brunswick and the University of Florida have discovered the “chiral spin mode” – a sea of electrons spinning in opposing circles.

“We discovered a new collective spin mode that can be used to transport energy or information with very little energy dissipation, and it can be a platform for building novel electronic devices such as computers and processors,” said Girsh Blumberg, senior author of the study and a professor in the Department of Physics and Astronomy in Rutgers’ School of Arts and Sciences.

Collective chiral spin modes are propagating waves of electron spins that do not carry a charge current but modify the “spinning” directions of electrons. “Chiral” refers to entities, like your right and left hands, that are matching but asymmetrical and can’t be superimposed on their mirror image.

The study, led by Hsiang-Hsi (Sean) Kung, a graduate student in Blumberg’s Rutgers Laser Spectroscopy Lab, was published in Physical Review Letters. Kung used a custom-made, ultra-sensitive spectrometer to study a prototypical 3D topological insulator. A microscopic theoretical model that predicts the energy and temperature evolution of the chiral spin mode was developed by Saurabh Maiti and Professor Dmitrii Maslov at the University of Florida, strongly substantiating the experimental observation.

The blue and red cones show the energy and momentum of surface electrons in a 3D topological insulator. The spin structure is shown in the blue and red arrows at the top and bottom, respectively. Light promotes electrons from the blue cone into the red cone, with the spin direction flipping. The orderly spinning leads to the chiral spin mode observed in this study. Credit: Hsiang-Hsi (Sean) Kung/Rutgers University-New Brunswick

The blue and red cones show the energy and momentum of surface electrons in a 3D topological insulator. The spin structure is shown in the blue and red arrows at the top and bottom, respectively. Light promotes electrons from the blue cone into the red cone, with the spin direction flipping. The orderly spinning leads to the chiral spin mode observed in this study.
Credit: Hsiang-Hsi (Sean) Kung/Rutgers University-New Brunswick

In a vacuum, electrons are simple, boring elementary particles. But in solids, the collective behavior of many electrons interacting with each other and the underlying platform may result in phenomena that lead to new applications in superconductivity, magnetism and piezoelectricity (voltage generated via materials placed under pressure), to name a few. Condensed matter science, which focuses on solids, liquids and other concentrated forms of matter, seeks to reveal new phenomena in new materials.

Silicon-based electronics, such as computer chips and computers, are one of the most important inventions in human history. But silicon leads to significant energy loss when scaled down. One alternative is to harness the spins of electrons to transport information through extremely thin wires, which in theory would slash energy loss.

The newly discovered “chiral spin mode” stems from the sea of electrons on the surface of “3D topological insulators.” These special insulators have nonmagnetic, insulating material with robust metallic surfaces, and the electrons are confined so they move only on 2D surfaces.

Most importantly, the electrons’ spinning axes are level and perpendicular to their velocity. Chiral spin modes emerge naturally from the surface of such insulating materials, but they were never observed before due to crystalline defects. The experimental observation in the current study was made possible following the development of ultra-clean crystals by Rutgers doctoral student Xueyun Wang and Board of Governors Professor Sang-Wook Cheong in the Rutgers Center for Emergent Materials.

The discovery paves new paths for building next generation low-loss electronic devices.

Researchers from Finland and Taiwan have discovered how graphene, a single-atom-thin layer of carbon, can be forged into three-dimensional objects by using laser light. A striking illustration was provided when the researchers fabricated a pyramid with a height of 60nm, which is about 200 times larger than the thickness of a graphene sheet. The pyramid was so small that it would easily fit on a single strand of hair. The research was supported by the Academy of Finland and the Ministry of Science and Technology of the Republic of China.

A similar structure was made experimentally by using laser irradiation in a process called "optical forging." Credit: The University of Jyväskylä

A similar structure was made experimentally by using laser irradiation in a process called “optical forging.” Credit: The University of Jyväskylä

Graphene is a close relative to graphite, which consists of millions of layers of graphene and can be found in common pencil tips. After graphene was first isolated in 2004, researchers have learned to routinely produce and handle it. Graphene can be used to make electronic and optoelectronic devices, such as transistors, photodetectors and sensors. In future, we will probably see an increasing number of products containing graphene.

“We call this technique optical forging, since the process resembles forging metals into 3D shapes with a hammer. In our case, a laser beam is the hammer that forges graphene into 3D shapes,” explains Professor Mika Pettersson, who led the experimental team at the Nanoscience Center of the University of Jyväskylä, Finland. “The beauty of the technique is that it’s fast and easy to use; it doesn’t require any additional chemicals or processing. Despite the simplicity of the technique, we were very surprised initially when we observed that the laser beam induced such substantial changes on graphene. It took a while to understand what was happening.”

“At first, we were flabbergasted. The experimental data simply made no sense,” says Dr Pekka Koskinen, who was responsible for the theory. “But gradually, by close interplay between experiments and computer simulations, the actuality of 3D shapes and their formation mechanism started to become clear.”

“When we first examined the irradiated graphene, we were expecting to find traces of chemical species incorporated into the graphene, but we couldn’t find any. After some more careful inspections, we concluded that it must be purely structural defects, rather than chemical doping, that are responsible for such dramatic changes on graphene,” explains Associate Professor Wei Yen Woon from Taiwan, who led the experimental group that carried out X-ray photoelectron spectroscopy at the synchrotron facility.

The novel 3D graphene is stable and it has electronic and optical properties that differ from normal 2D graphene. Optically forged graphene can help in fabricating 3D architectures for graphene-based devices.

The basics of laser marking are reviewed, as well as current and emerging laser technologies.

BY DIETRICH TÖNNIES, Ph.D. and DIRK MÜLLER, Ph.D., Coherent Inc., Santa Clara, CA

Laser marking is established at multiple points in semiconductor production and applications continue to diversify. There are several laser technologies servicing the application space. This article reviews the basics of laser marking and the current and emerging laser technologies they utilize. It is intended to give a clear sense of what applications parameters drive the choice of laser (speed, cost, resolution, etc.), and provide those developing a new application some guidance on how to select the optimum technology.

Laser marking basics

Laser marking usually entails inducing a visible color or texture change on a surface. Alternatively, although less commonly, marking sometimes involves producing a macroscopic change in surface relief (e.g.engraving). To understand what laser type is best for a specific marking application, it is useful to examine the different laser/ material interactions that are generated by commonly used laser types.

Most frequently, lasers produce high contrast marks through a thermal interaction with the work piece. That is, material is heated until it undergoes a chemical reaction (e.g. oxidation) or change of crystalline structure that produces the desired color or texture change. However, the particulars of this process vary significantly between different materials and laser types.

CO2 lasers have been employed extensively for PCB marking because they provide a fast method of producing high contrast features. However, they are rarely selected when marking at the die or package level. This is because the focused spot size scales with wavelength due to diffraction. CO2 lasers emit the longest infrared (IR) output of any marking laser. Additionally, IR penetrates far into many materials, which can cause a substantial thermal impact on surrounding structures. Consequently, CO2 laser marking is limited to producing relatively large features where a significant heat affected zone (HAZ) can be tolerated.

Fiber lasers, which offer high power output in the near IR, have emerged over the past few years as one of the most cost effective tools for high-speed marking. Furthermore, the internal construction of fiber lasers renders a compact footprint, facilitating their integration into marking and test handlers. Cost and space savings are further enhanced when the output of a single, high power fiber laser is split, feeding two scanner systems.

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But fiber lasers have disadvantages, too. One reason for the low cost of many fiber lasers is that they are produced in high volumes with designs meant for general-purpose applications. For example, they usually produce a high quality beam with a Gaussian intensity profile. This is advantageous for many material processing applications, but not always for laser marking. In fact, a more uniform beam intensity distribution, called a flat-top profile, is sometimes more useful since it produces marks with a sharper, more abrupt edge (rather than a smooth transition from the marked to the unmarked region). Coherent recently introduced a new type of fiber (NuBEAM Flat-Top fiber technology) which enables efficient conversion of single-mode laser beams into flat-top beam profiles, specifically to address this issue.

Other quality criteria, such as high-purity linear polarization, and stability of pulse energy and pulse width, are difficult to achieve with low-cost fiber lasers. This limits their use in more stringent or sensitive marking applications. From a practical standpoint, most fiber lasers cannot be repaired in the field, but are replaced as a whole. This leads to longer equipment downtime and increased maintenance efforts as compared to traditional marking lasers based on diode-pumped, solid-state (DPSS) technology (specifically, DPSS is used here to refer to lasers with crystal resonators).

DPSS lasers also emit in the near infrared. Generally, these lasers are more expensive than a fiber laser of the same output power level. So, infrared DPSS lasers are most commonly used in applications having technical requirements that cannot be met by fiber lasers,such as high volume production of more advanced and expensive semiconductor devices.

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One advantage of DPSS laser technology is that it can be configured to directly produce a multi-mode beam profile which is essentially flat-top. The Coherent ❘ Rofin PowerLine E Air 30-1064 IC is an example which has found extensive use in semiconductor marking, since it provides an efficient way to rapidly produce very high contrast marks.

Another useful feature of DPSS lasers, which produce pulsewidths in the nanosecond regime, is that their output is much more stable than that of fiber lasers. This makes it much easier to reliably frequency double or triple their infrared light within the laser head, giving a choice of output in the green or ultraviolet (UV). Output at these wavelengths provides two significant benefits. First, they offer additional options in matching the absorption of the material to the laser wavelength. Stronger absorption generally yields higher marking efficiency and reduced HAZ, since the laser light doesn’t penetrate as far into the material. The second benefit of shorter wavelengths is the ability to focus to smaller spot sizes (because of their lower diffraction) and produce smaller, finer marks.

However, frequency multiplied DPSS lasers are generally more costly and voluminous than either fiber lasers or infrared DPSS lasers with comparable output power. Lower power translates into reduced marking speed.

Therefore, green and UV DPSS lasers are typically employed when they offer a significant advantage due to the particular absorption characteristics of the material(s) being marked.

Another emerging and important class of marking lasers has pulsewidths in the sub-nanosecond range. Due to the nature of the laser/material interaction at short pulsewidths, these lasers tend to produce the smallest possible HAZ with excellent depth control.

There are just a few products currently on the market that exploit this property. One example is the PowerLine Pico 10 from Coherent ❘ Rofin which generates 0.5 ns laser pulses in either the near IR (8 W total power) or green (3 W total power), at pulse repetition rates between 300 kHz and 800 kHz. This combination of output characteristics makes it capable of high speed marking of a wide range of materials where mark penetration depth must neces- sarily be shallow because of low material thickness, or to minimize HAZ.

Laser marking today

Typically, the first consideration in choosing a laser for a specific application is matching the absorption characteristics of the material with the laser wavelength. Similarly, desired feature size is also driven by laser wavelength, as well as by the precision of the beam scanning system. Next, HAZ constraints usually determine the maximum pulsewidth which can be used (although this choice is again highly material dependent). To see how these parameters interact in practice, it’s useful to review some real world applications.

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Epoxy-based molding compounds

The most commonly used molding compounds absorb very well in the near IR. Specifically, the near IR laser transforms the usually black molding compound into a gray/white powder, yielding high contrast marks. Plus, many IC packages have mold compound caps thick enough to easily tolerate a marking depth of 30 μm to 50 μm. As a result, many marking systems based on near IR lasers, both fiber and DPSS, are currently in use.

However, some semiconductor devices with small form factor have only thin mold compound caps to protect wire bonded silicon dies, and a marking depth of only 10 μm or less is required. Increasingly, green lasers are used for this type of shallow marking because of a stronger absorption at this wavelength by the epoxy matrix.

Ceramics

The process window when marking ceramics, such as used in packaging power semiconductors, high-brightness LEDs, RF devices, saw filters or MEMS sensors, is relatively narrow. Accurate focus and high pulse energy are critical to ensure reliable marking results, and ideally, the laser marker should have the capability to adjust the focus of the laser beam onto the ceramic surface in real time, in order to compensate for package height variations. Because of their more reliable interaction with ceramic materials, DPSS lasers based on Nd:YAG, which offer high pulse energies and relatively long pulses, are often still used for marking ceramic lids and substrates. Coherent ❘ Rofin has also developed a special fiber laser (the PowerLine F 20 Varia IC), which offers adjustable pulse widths up to 200 ns, specifically to improve process windows for marking applications of this type.

The ceramic substrates used with high-power LEDs often require tiny marks to identify individual devices. IR lasers are the preferred lasers for marking these ceramic substrates, providing their spot size is not too big for the layout to be marked. For very small marking features a green laser or UV laser is often required.

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Organic substrates

IC substrates or interposers are marked during production with traceable data matrix codes. The thin green solder resist layer on top of the substrate has to carry the mark, and care has to be taken that the copper underneath the solder resist is not exposed. Moreover, data matrix codes can be quite small, with cell sizes of only 125 μm or even less. Since the spot size of the focused laser beam must thus be much smaller than the cell size, the final spot diameter must be significantly less than 100 μm.

Defective IC substrates often are identified by marking large features (e.g., a cross) into the solder resist layer. Although the part is defective, the properties of the mark are still important. This is because it has to be reliably recognized by subsequent processing tools, and also, because any delamination of the solder resist layer might cause problems during succeeding processes.

IC strips have gold pads along their periphery which are used to identify parts found to be defective after die attach and wire bonding. For defective parts, the gold pad is marked by converting its color from gold to black or to dark grey.

Ideally, it is desirable to have one laser marker that can accomplish all three of these marking applications tasks. The green DPSS laser has become the standard laser marker for these applications, with UV lasers occasionally employed for high-end substrates.

Semiconductors

The growing demand for flip-chip devices, wafer-level packaging and defective die identification drives the need for direct marking of silicon, GaAs, GaN/sapphire or other semiconductors. Silicon is partially trans- parent in the near IR, and lasers at this wavelength are used whenever deep marks into silicon are required, such as placing wafer IDs near the wafer edge. Near IR laser markers are also selected for marking molded fan-out wafer level packaging wafers.

However, for marking either flip-chips or the backside of wafers, green lasers are preferred because of the strong absorption of this wavelength in silicon. Wafer backside marking requires only very shallow marks and the shallow laser penetration avoids potential damage to the circuitry on the reverse side of the flip-chip or wafer. The need for shallow marking also minimizes the laser power requirement. For example, Coherent ❘ Rofin provides a 6 W green laser (the PowerLine E 12 SHG IC) that is well suited for wafer backside marking, and can also mark the wafer through the tape whenever the wafer is mounted on a film frame.

Metals

Near IR lasers are widely used for marking the metal lids used with microprocessors and other high power consumption ICs.

Leadframes, which are plated with tin, silver or gold, are marked either before or after plating. Since leadframes are used for cost sensitive devices, capital investment is critical, and economical fiber lasers are often chosen for this reason.

Laser marking tomorrow

As packages get thinner and smaller, they will require shallower, higher resolution marks. Sub-nanosecond lasers are the most promising method for producing these types of marks, and are compatible with a wide range of materials. The diverse capabilities of this technology are shown in Figure 5, which depicts marking results on four different materials using a sub-nanosecond laser (Coherent ❘ Rofin PowerLine Pico 10-532 IC).

The first image is a flexible IC substrate; very thin solder resist layers and metal coatings make it important that the laser does not cause delamination. Here, the circular gold pad has been converted to black without delamination. In the next image, an IC substrate has been given a white mark, again without delaminating the solder resist.

The third image shows very small characters (< 150 μm) marked on the backside of a silicon wafer containing hundred thousands of tiny discrete semiconductor devices. Producing marks of this resolution through the film would be difficult to accomplish with a nanosecond pulsewidth laser.

The final image is a copper leadframe coated with thin silver film. Here, the goal is to produce a shallow mark with high contrast without engraving the under- lying material, which has been accomplished with the sub-nanosecond laser.

Conclusion

Semiconductor fabrication and packaging represent challenging marking applications, often requiring small, fine marks produced without a significant effect on surrounding material. An overall trend towards smaller and thinner device geometries will drive increased use of higher precision laser tools, such as those utilizing green and UV nanosecond lasers, and even sub-nanosecond lasers, while cost-sensitive applications will continue to utilize inexpensive fiber lasers.

A research group consisting of scientists from Tomsk Polytechnic University, Germany and Venezuela proved vulnerability of a two-dimensional semiconductor gallium selenide in air. This discovery will allow manufacturing superconducting nanoelectronics based on gallium selenide, which has never been previously achieved by any research team in the world.

The study was published in Semiconductor Science and Technology.

One of the promising areas of modern materials science is the study of two-dimensional (2D) materials, i.e. thin films consisting of one or several atomic layers. 2D materials due to their electrical superconductivity and strength could be a basis for modern nanoelectronics. Optic applications in nanoelectronics require advanced materials capable of ‘generating’ great electron fluxes upon light irradiation. Gallium selenide (GaSe) is one of the 2D semiconductors that can cope with this problem most efficiently.

‘Some research teams abroad tried to create electronic devices based on GaSe. However, despite extensive theoretical studies of this material, which were published in major scientific journals, the stability of the material in real devices remained unclear,’ says Prof. Raul Rodriguez, the Department of Lasers and Lighting Engineering.

The research team revealed the reasons behind this. They studied GaSe by means of Raman spectroscopy and x-ray photoelectron spectroscopy that allowed proving the existence of chemical bonds between gallium and oxygen. Photoluminescence in oxidized substance is absent that also proves the formation of oxides. It means that the scientists revealed that GaSe oxidizes quickly in air and loses its electrical conductivity necessary for creating nanoeletronic devices.

‘GaSe monolayers become oxidized almost immediately after being exposed to air. Further research of GASe stability in air will allow making proposals how to protect it and maintain its optoelectronic properties,’ emphasize the authors.

According to Prof. Rodriguez, for GaSe not to lose its unique properties it should be placed in a vacuum or inert environment. For example, it can be applied in encapsulated devices that are vacuum-manufactured and then covered with a protective layer eliminating air penetration.

This method can be used to produce next generation optoelectronics, detectors, light sources and solar batteries. Such devices of ultra-small sizes will have very high quantum efficiency, i.e. they will be able to generate large electron fluxes under small external exposure.