Category Archives: Packaging Materials

Silicon nanosheets are thin, two-dimensional layers with exceptional optoelectronic properties very similar to those of graphene. Albeit, the nanosheets are less stable. Now researchers at the Technical University of Munich (TUM) have, for the first time ever, produced a composite material combining silicon nanosheets and a polymer that is both UV-resistant and easy to process. This brings the scientists a significant step closer to industrial applications like flexible displays and photosensors.

Similar to carbon, silicon forms two dimensional networks that are only one atomic layer thick. Like graphene, for whose discovery Andre Geim and Konstantin Novoselov received the Nobel Prize in 2010, these layers possess extraordinary optoelectrical properties. Silicon nanosheets might thus find application in nanoelectronics, for example in flexible displays, field-effect transistors and photodetectors. With its ability to store lithium ions, it is also under consideration as an anode material in rechargeable lithium batteries.

“Silicon nanosheets are particularly interesting because today’s information technology builds on silicon and, unlike with graphene, the basic material does not need to be exchanged,” explains Tobias Helbich from the WACKER Chair for Macromolecular Chemistry at TUM. “However, the nanosheets themselves are very delicate and quickly disintegrate when exposed to UV light, which has significantly limited their application thus far.”

Polymer and nanosheets – the best of both worlds in one

Now Helbich, in collaboration with Professor Bernhard Rieger, Chair of Macromolecular Chemistry, has for the first time successfully embedded the silicon nanosheets into a polymer, protecting them from decay. At the same time, the nanosheets are protected against oxidation. This is the first nanocomposite based on silicon nanosheets.

“What makes our nanocomposite special is that it combines the positive properties of both of its components,” explains Tobias Helbich. “The polymer matrix absorbs light in the UV domain, stabilizes the nanosheets and gives the material the properties of the polymer, while at the same time maintaining the remarkable optoelectronic properties of the nanosheets.”

Long-term goal of nanoelectronics – In leaps and bounds to industrial application

Its flexibility and durability against external influences also makes the newly developed material amenable to standard polymer technology for industrial processing. This puts actual applications within an arm’s reach.

The composites are particularly well suited for application in the up and coming field of nanoelectronics. Here, “classical” electronic components like circuits and transistors are implemented on scales of less than 100 nanometers. This allows whole new technologies to be realized – for faster computer processors, for example.

Nanoelectronic photodetector

The first successful application of the nanocomposite constructed by Helbich was only recently presented in the context of the ATUMS Graduate Program (Alberta / TUM International Graduate School for Functional Hybrid Materials): Alina Lyuleeva and Prof. Paolo Lugli from the Institute of Nanoelectronics at TU Munich, in collaboration with Helbich and Rieger, succeeded in building a photodetector based on these silicon nanosheets.

To this end, they mounted the polymer embedded silicon nanosheets onto a silicon dioxide surface coated with gold contacts. Because of its Lilliputian dimensions, this kind of nanoelectronic detector saves a lot of both space and energy.

The research is part of the ATUMS Graduate Program (Alberta / TUM International Graduate School for Functional Hybrid Materials (ATUMS; IRTG 2022)) in which German and Canadian scientists in the fields of chemistry, electrical engineering and physics collaborate closely. Their goal is not only to create novel functions based on nanoparticles and polymer materials, but, at the same time, to develop first applications. The work is funded by the German Research Council (DFG) and the Natural Science and Engineering Research Council of Canada (NSERC).

A chance observation of crystals forming a mark that resembled the stain of a coffee cup left on a table has led to the growth of customized polycrystals with implications for faster and more versatile semiconductors.

Thin-film semiconductors are the foundation of a vast array of electronic and optoelectronic devices. They are generally fabricated by crystallization processes that yield polycrystals with a chaotic mix of individual crystals of different orientations and sizes.

Significant advances in controlling crystallization has been made by a team led by Professor Aram Amassian of Material Science and Engineering at KAUST. The group included individuals from the KAUST Solar Center and others from the University’s Physical Science and Engineering Division in collaboration with Cornell University. Amassian said, “There is no longer a need to settle for random and incoherent crystallization.”

Crystallization behavior can be controlled locally, creating regions with different crystal patterns. Credit: KAUST 2017

Crystallization behavior can be controlled locally, creating regions with different crystal patterns. Credit: KAUST 2017

The team’s recent discovery began when Dr. Liyang Yu of the KAUST team noticed that a droplet of liquid semiconductor material dried to form an outer coffee-ring shape that was much thicker than the material at the center. When he induced the material to crystallize, the outer ring crystallized first.

“This hinted that local thickness matters for initiating crystallization,” said Amassian, which went against the prevailing understanding of how polycrystal films form.

This anomaly led the researchers to delve deeper. They found that the thickness of the crystallizing film could be used to manipulate the crystallization of many materials (see top image). Most crucially, tinkering with the thickness also allowed fine control over the position and orientation of the crystals in different regions of a semiconductor.

“We discovered how to achieve excellent semiconductor properties everywhere in a polycrystal film,” said Amassian. He explained that seeding different patterns of crystallization at different locations also allowed the researchers to create bespoke arrays that can now be used in electronic circuits (see bottom image).

This is a huge improvement to the conventional practice of making do with materials whose good properties are not sustained throughout the entire polycrystal nor whose functions at different regions can be controlled.

“We can now make customized polycrystals on demand,” Amassian said.

Amassian hopes that this development will lead to high-quality, tailored polycrystal semiconductors to promote advances in optoelectronics, photovoltaics and printed electronic components. The method has the potential to bring more efficient consumer electronic devices, some with flexible and lightweight parts, new solar power generating systems and advances in medical electronics. And all thanks to the chance observation of an odd pattern in a semiconductor droplet.

The team will now explore ways to move their work beyond the laboratory through industry partnerships and research collaborations.

Technavio analysts forecast the global carbon nanotube (CNT) market to grow at a staggering CAGR of almost 22% during the forecast period, according to their latest report.

The research study covers the present scenario and growth prospects of the global CNT market for 2017-2021. To calculate the market size, the report considers the revenue generated from the sales of CNTs worldwide.

The production capacities of CNTs will expand due to their growing demand. Factors such as the need to enhance the efficiency of electronic and semiconductor products, high use of CNTs in the aerospace and defense sectors, and the need to increase the efficiency of energy-sector-related devices are driving the market.

Technavio’s sample reports are free of charge and contain multiple sections of the report including the market size and forecast, drivers, challenges, trends, and more.

Technavio hardware and semiconductor analysts highlight the following three factors that are contributing to the growth of the global CNT market:

  • Advantages due to physical properties
  • Potential to replace other materials
  • Rise in production capacities

Advantages due to physical properties

The structure of CNTs is closely related to graphite, which is traditionally made by stacking sheets of carbon on top of another. These sheets can easily slide over each other. CNTs are made by rolling these sheets into a cylinder, with their edges joined. This structure offers extraordinary electrical, mechanical, optical, thermal, and chemical properties to CNTs.

Sunil Kumar Singh, a lead embedded systems analyst at Technavio, says, “Being a carbon-based product, CNTs are not vulnerable to environmental or physical degradation issues. Due to this advantage, CNTs are in high demand and are used in multiple applications such as medicine, aerospace and defense, electronics, automotive, energy, construction, and sports.”

Potential to replace other materials

CNTs have the potential to replace the key materials in some industries such as semiconductor and energy. Research centers are developing CNTs that can be used in solar cells as an alternative to silicon, which is the key material used in producing electricity from solar energy. By using CNTs instead of silicon, the conversion efficiency of solar cells can be enhanced.

“CNTs have the potential to replace indium-tin-coated films, which are fragile and expensive. These films are used in liquid crystal displays, solar cells, organic light-emitting diodes, touchscreens, and high-strength materials like bulletproof vests and hydrogen fuel cells used to power cars,” adds Sunil.

Rise in production capacities

Production capacity for CNTS for 2015 was 4,567 metric tons globally. MWCNT dominates this market space due to its low production cost and high-scalability. Whereas, SWCNT still has issues with scaling up the volume produced and reduced the cost. Techniques available for CNT production such as substrate-free growth and substrate-bound growth while deploying vapor-solid-solid (VSS) and vapor-liquid-solid (VLS) are widely adopted for catalyst-based synthesis.

Many CNT vendors are investing heavily in new production facilities to meet the growing demand from sectors such as consumer goods, electrical and electronics, energy, healthcare, automobile, and aerospace and defense. Among countries, China has increased the production of CNTs backed by high government funding for nanomaterials.

Versum Materials, Inc. (NYSE: VSM), a materials supplier to the semiconductor industry, announced today that it would expand its manufacturing capacity at its Delivery Systems and Service (DS&S) headquarters in Allentown, Pennsylvania. To support customer demand and the growth in its DS&S business, new positions will be created for highly skilled technicians, engineers, quality control personnel, and manufacturing and support staff.

The timing of the expansion aligns with the 25th anniversary of manufacturing at the Allentown location. The 31,000-square-foot, state-of-the-art facility was established in 1992 as the Semiconductor Equipment Manufacturing Center (SEMC) of Air Products, which Versum Materials spun-off from in October 2016. The facility will be rebranded Vultee Street as part of this announcement.

The manufacturing capacity expansion will serve the semiconductor, LCD and LED markets around the globe with gas and chemical delivery equipment designed to meet their precise purity and safety requirements. This investment will increase the production of Versum Materials’ line of GASGUARD ultra-high purity specialty gas equipment and CHEMGUARD chemical delivery equipment.

Last year, Versum Materials increased capacity at its DS&S manufacturing location in Ansan, South Korea, where in addition to the above-mentioned equipment, it produces a line of GASKEEPER specialty gas equipment designed specifically for the region.

“We are excited about our prospects for growth in the industry and supporting our valued customers with state-of-the-art, high-purity equipment. We are enhancing our manufacturing capacity to keep pace with our customers’ increasing requirements for more flexibility and shorter lead times,” said Jeff White, vice president and general manager of DS&S.

The company expects the expansion of the Allentown facility to be complete this spring. A list of open positions can be found on the company’s career page.

Materion Corporation (NYSE:MTRN) announced today that it has completed the previously announced acquisition of the target materials business of the Heraeus Group, of Hanau, Germany, for approximately $30 million.

The acquisition strengthens Materion’s position in precious and non-precious target materials for the architectural and automotive glass, photovoltaic, display and semiconductor markets. The business, now operating within the Materion Advanced Materials business segment, is expected to generate approximately $50 to $60 million in new value-added sales on an annualized basis and be accretive to 2017 earnings. Materion Advanced Materials reported value-added sales of $176.3 million in 2016.

Through this transaction, Materion’s Advanced Materials segment gains target manufacturing capability in Europe, Asia and the U.S., as well as new technologies and a highly specialized workforce of 135 employees.

Donald G. Klimkowicz, President, Materion Advanced Materials, commented, “Beyond accelerating and solidifying our global materials offering in semiconductor and display, the acquisition provides diversification, critical mass and new opportunities in other growing target-related areas where Materion has not enjoyed as strong a position including glass and photovoltaic. This truly is a winning combination.”

Added Materion Chief Executive Officer Richard J. Hipple, “This transaction is the latest in a series of advanced materials acquisitions made by Materion since 2005 to augment our growth and further our diversification into a leading advanced materials organization. I am very excited about the prospects for future growth that this acquisition brings us in existing and new markets, and how closely the values and culture of the Heraeus employees who join us match with our own. We welcome them to the Materion family.”

Materion Corporation is headquartered in Mayfield Heights, Ohio. The Company, through its wholly owned subsidiaries, supplies highly engineered advanced enabling materials to global markets. Products include precious and non-precious specialty metals, inorganic chemicals and powders, specialty coatings, specialty engineered beryllium alloys, beryllium and beryllium composites, and engineered clad and plated metal systems.

Ionotronic devices rely on charge effects based on ions, instead of electrons or in addition to electrons. These devices open new opportunities for creating electrically switchable memories. However, there are still many technical challenges to overcome before this new kind of memories can be produced.

Researchers at Aalto University in Finland have visualized how oxygen ion migration in a complex oxide material causes the material to alter its crystal structure in a uniform and reversible fashion, prompting large modulations of electrical resistance. They performed simultaneous imaging and resistance measurements in a transmission electron microscope using a sample holder with a nanoscale electrical probe. Resistance-switching random access memories could utilize this effect.

Researchers performed imaging and resistance measurements in a transmission electron microscope using a sample holder with a nanoscale electrical probe. Credit: Mikko Raskinen / Aalto University

Researchers performed imaging and resistance measurements in a transmission electron microscope using a sample holder with a nanoscale electrical probe. Credit: Mikko Raskinen / Aalto University

Sample holder helps control migration of ions 

“In a transmission electron microscope, a beam of high-energy electrons is transmitted through a very thin specimen. Various detectors collect the electrons after their interaction with the sample, providing detailed information about the atomic structure and composition of the material. The technique is extremely powerful for nanomaterials characterization, but if used conventionally, it does not allow for active material manipulation inside the microscope. In our study, we utilized a special sample holder with a piezo-controlled metallic probe to make an electrical nanocontact. This in situ method allowed us to apply short voltage pulses and thereby control the migration of oxygen ions in our sample,” explains Academy of Finland Research Fellow Lide Yao.

The researchers found that migration of oxygen ions away from the contact area results in an abrupt change in the oxide lattice structure and an increase of electrical resistance. Reversal of the voltage polarity fully restores the original material properties. Electro-thermal simulations, performed by PhD candidate Sampo Inkinen, showed that a combination of current-induced sample heating and electric-field-directed ion migration causes the switching effect.

Ionotronic concept for manipulation of several material properties

“The material that we investigated in this study is a complex oxide. Complex oxides can exhibit many interesting physical properties including magnetism, ferroelectricity, and superconductivity, and all these properties vary sensitively with the oxidation state of the material. Voltage-induced migration of oxygen ions does change the amount of oxidation, triggering strong material responses. While we have demonstrated direct correlations between oxygen content, crystal structure, and electrical resistance, the same ionotronic concept could be utilized to control other material properties,” says Professor Sebastiaan van Dijken, who is a coauthor on the paper with Yao.

“In the current study, we employed a special sample holder for simultaneous measurements of the atomic-scale structure and electrical resistance. We are now developing an entirely new and unique holder that would allow for transmission electron microscopy measurements while the specimen is irradiated by intense light. We plan to investigate atomic scale processes in perovskite solar cells and other optoelectronic materials with this setup in the future,” adds Yao.

Versum Materials, Inc. (NYSE: VSM), a materials supplier to the semiconductor industry, announced today that Edward “Ed” Shober has been appointed to the position of senior vice president of its Materials segment. Mr. Shober will be responsible for the company’s Process Materials (PM) and Advanced Materials (AM) global businesses, which produce specialty chemicals and materials utilized in the next generation of semiconductors and displays for smart devices, as well as high-purity, specialty gases used in the semiconductor manufacturing process. Mr. Shober has led the AM business since 2011 and has more than 20 years’ experience serving Versum Materials’ customers in the semiconductor industry.

“Ed will continue to support our culture of operating as an agile organization that is relentlessly focused on building on our global technology leadership and establishing a reputation for quality, safety and reliability,” stated Guillermo Novo, President and CEO of Versum Materials. “Because of Ed’s customer relationships, leadership, experience and technical capabilities, we are confident that’s Ed’s transition will be seamless for our customers and his industry knowledge will continue to be an invaluable asset to our team.”

Mr. Shober joined Air Products in 1994, leading engineering activities in the electronics engineering and electronics package plants organizations. In 1999, he was named vice president of engineering and operations for TRiMEGA, a joint venture between Air Products and Kinetic Systems providing turnkey solutions to semiconductor fabs, and served as TRiMEGA’s chief operating officer from 2001-2004. Mr. Shober went on to lead DA NanoMaterials, Air Products’ joint venture with DuPont, as its chief operating officer from 2004-2007 and chief executive officer from 2007-2010. In October 2011, he served as the director of Advanced Materials Integration, Electronics Division, until assuming leadership of Air Products’ Advanced Materials business. He previously served as the vice president of Advanced Materials for the Materials Technologies business of Air Products since 2012. Mr. Shober holds a Bachelor of Science degree in civil/structural engineering from Brown University.

GlobalFoundries_Ajit_ManochSEMI, the global association connecting and representing the worldwide electronics manufacturing supply chain, today announced the appointment of Ajit Manocha as its president and CEO. He will succeed Denny McGuirk, who announced his intention to retire last October. The SEMI International Board of Directors conducted a comprehensive search process, selecting Manocha, an industry leader with over 35 years of global experience in the semiconductor industry.  Manocha will begin his new role on March 1 at SEMI’s new Milpitas headquarter offices.

“Ajit has a deep understanding of our industry’s dynamics and the interdependence of the electronics manufacturing supply chain,” said Y.H. Lee, chairman of SEMI’s board of directors. “From his early days developing dry etch processes at AT&T Bell Labs, to running global manufacturing for Philips/NXP, Spansion, and, as CEO of GLOBALFOUNDRIES, Ajit has been formative to our industry’s growth. Ajit is the ideal choice to drive our SEMI 2020 plan and beyond, ensuring that SEMI provides industry stewardship and engages its members to advance the interests of the global electronics manufacturing supply chain.”

“Beyond his experience leading some of our industry’s top fabs, Ajit has long been active at SEMI and has served on boards of several global associations and consortia,” said Denny McGuirk, retiring president and CEO of SEMI. “Ajit’s experience in technology, manufacturing, and industry stewardship is a powerful combination. I’m very excited to be passing the baton to Ajit as he will continue to advance the growth and prosperity of SEMI’s members.”

“I have tremendous respect for the work SEMI does on behalf of the industry,” said Ajit Manocha, incoming president and CEO of SEMI. “I am excited to be joining SEMI at a time when our ecosystem is rapidly expanding due to extensive innovation on several fronts.  From applications based on the Internet and the growth of mobile devices to artificial intelligence/machine learning, autonomous vehicles, and the Internet of Things, there is a much broader scope for SEMI to foster heterogeneous collaboration and fuel growth today than ever before.  I am looking forward to leading the global SEMI organization as we strive to maximize value for our members across this extended global ecosystem.”

Manocha was formerly CEO at GLOBALFOUNDRIES, during which he also served as vice chairman and chairman of the Semiconductor Industry Association (SIA).  Earlier, Manocha served as EVP of worldwide operations at Spansion. Prior to Spansion, he was EVP and chief manufacturing officer at Philips/NXP Semiconductors. Manocha also held senior management positions within AT&T Microelectronics. He began his career at AT&T Bell Laboratories as a research scientist where he was granted several patents related to microelectronics manufacturing. Manocha holds a bachelor’s degree from the University of Delhi and a master’s degree in physical chemistry from Kansas State University.

An Steegen reveals some of the secrets of semiconductor scaling – a pipeline full of materials, device architectures and advanced techniques that promise to further extend semiconductor scaling.

BY AN STEEGEN, Executive Vice President Semiconductor Technology & Systems, imec

The explosive growth of data traffic fuels the demand for ever more processing power and storage capacity. Moore’s Law continues to be necessary, but innova- tions are needed beyond this law to help managing the devices power, performance, area and cost.

The end of happy scaling?

Data traffic explosion, fueled by the Internet of Things, social media and server applications, has created a continuous need for advanced semiconductor technologies. Servers, mobile devices, and IoT devices drive the require- ments for processing and storage. “At the same time, this trend is also creating more diversification,” said An Steegen, Executive Vice President Semiconductor Technology & Systems at Imec (Leuven, Belgium). “IoT devices, for example, will need low-power signal acquisition and processing, and embedded non-volatile memory technol- ogies. For mobile and server applications, on the contrary, further dimensional scaling, continuous transistor archi- tecture innovations and memory hierarchy diversification are among the key priorities.”

But will we be able to continue traditional semiconductor scaling, as initiated by Gordon Moore more than 50 years ago? “For a long time, we have lived in the happy scaling era, where every technology node reshrinks and redoubles the number of transistors per area, for the same cost,” Steegen said. “But the last 10-12 years, we have not been following that happy scaling path. The number of transistors still doubles, but device scaling provides us with diminishing returns. We’ve seen these dark periods of ‘dark silicon’ before, but, fortunately, we’ve always managed to get out of these periods. Again, the technology box will provide new features to help manage power, performance and area node by node as we move to the next generation.”

The technology box for dimensional scaling

On the dimensional scaling side, extreme ultraviolet lithography (EUVL) is considered an important enabler for continuing Moore’s Law. “Ideally, we would need it at the 10nm node, where we will start replacing single exposures with multiple exposures. More realistically, it will hopefully be ready to lower the costs for the 7nm technology,” said Steegen. “At imec, we already showed that EUVL is capable of printing 7nm logic dimensions with one single exposure.” Still, issues need to be resolved, related to, for example, the line-edge roughness. “At the same time, to enhance dimensional scaling, we increasingly make use of scaling boosters, such as self-aligned gate contact or buried power rail. These tricks allow a standard cell height to be reduced from 9 to 6 tracks, leading to a bit density increase and large die cost reduction – a nice example of design- technology co-optimization.”

Improving power/performance in the front-end of line

FinFET technology has been the killer device for the 14 and 10nm technology nodes. But for the 7-5nm, Steegen foresees challenges: “At these nodes, FinFET technology can’t meet the 20% performance scaling and 40% power gain anymore. To go beyond 7nm will require horizontal gate-all-around nanowires, which promise better electro- static control. In such a configuration, the drive current per footprint can be maximized by vertically stacking multiple horizontal nanowires. In 2016, at IEDM, we demonstrated for the first time the CMOS integration of vertically stacked gate-all-around Si nanowire MOSFETs. Vertical nanowires, although requiring a more disruptive process flow, could be a next step. Or junction-less gate- all-around nanowire FET devices, which, as shown at the 2016 VLSI conference, appear as an attractive option for advanced logic, low-power circuits and analog/RF applications.” Further down the road, from the 2.5nm node onwards, fin/nanowire devices are expected to run out of steam. “Sooner or later, we will need to find the next switch,” she said. “Promising approaches are tunnel-FETs, which can provide a 3x drive current improvement, and spin-wave majority gates.” Spin-wave majority gates with micro-sized dimensions have already been reported. But to be CMOS-competitive, they must be scaled and handle waves with nanometer-sized wavelengths. An Steegen: “In 2016, imec proposed a method to scale these spin-wave devices into nanometer dimensions, opening routes towards building spin-wave majority gates that promise to outperform CMOS-based logic technology in terms of power and area reduction.”

Extending or replacing Cu in the back-end-of-line

Looking ahead, it might as well be the interconnect that will threaten further device scaling. Therefore, the back- end-of-line (BEOL) and the struggle to keep scaling the BEOL needs attention as well. “We look at ways to extend the life of Cu, for example with liners of ruthenium (Ru) or cobalt (Co). On the longer term, we will probably need alternative metals, such as Co for local interconnects or vias,” says Steegen.

The future memory hierarchy

Besides a central processing unit, memory to store all the data and instructions is another key element of the classical Von Neumann computer architecture. The ever increasing performance of computation platforms and the consumer’s hunger for storing and exchanging ever more data drive the need to keep on scaling memory technol- ogies. Besides this scaling trend, existing memories that make up today’s memory hierarchy are challenged with the need for new types of memory.

Steegen said: “STT-MRAM, for example, is an emerging memory concept that has the potential to become the first embedded non-volatile memory technology on advanced logic nodes for advanced applications. It is also an attractive technology for future high-density stand-alone applications. It promises non-volatility, high-speed, low-voltage switching and nearly unlimited read/write endurance. But its scalability towards higher densities has always been challenging. Recently, we have been able to demon- strate a high-performance perpendicular magnetic tunnel junction device as small as 8nm, combined with a manufacturable solution for a highly scalable STT-MRAM array.” The future memory landscape also requires a new type of memory able to fill the gap between DRAM and solid-state memories: the storage class memory. This memory type should allow massive amounts of data to be accessed in very short latency. Imec is working there on MRAM and resistive RAM (RRAM) approaches.

Beyond classical scaling – towards system- technology co-optimization

A challenge for traditional Von Neumann computing is to increase the data transfer bandwidth between the processing chip and the memory. And this is where 3D approaches enter the scene. Said Steegen: “With advanced CMOS scaling, new opportunities for 3D chip integration arise. For example, it becomes possible to realize different partitions of a system-on-chip (SoC) circuit and hetero- geneously stacking these partitions with high inter- connect densities. At the smallest partitions, chips are no longer stacked as individual die, but as full wafers bonded together.” An increased bandwidth is also enabled by optical I/O. In this context, imec continues its efforts to realize building blocks (e.g. optical modulators, Ge photodetectors) with 50Gb/s channel data rate for its Si photonics platform.

Moore’s Law will continue, but not only through the conventional routes of scaling. “We have moved from pure technology optimization (involving novel materials and device architectures) to design-technology co-optimi- zation (e.g. the use of scaling boosters to reduce cell height). And we are already thinking ahead about a next phase, system-technology co-optimization. And to keep computing power improving, we are exploring ways beyond the classical Von Neumann model, such as neuro- morphic computing, a brain-inspired computer concept and quantum computing, which exploits the laws of quantum physics. There are plenty of creative ideas that will allow the industry to further extend semiconductor scaling,” Steegen concluded.

AN STEEGEN is imec’s Executive Vice President Semiconductor Technology & Systems. In that role, she heads the research hub’s efforts to define and enable next-generation ICT technology and to feed the industry roadmaps.

Heat transport is of similar fundamental importance and its control is for instance necessary to efficiently cool the ever smaller chips. An international team including theoretical physicists from Konstanz, Junior Professor Fabian Pauly and Professor Peter Nielaba and their staff, has achieved a real breakthrough in better understanding heat transport at the nanoscale. The team used a system that experimentalists in nanoscience can nowadays realize quite routinely and keeps serving as the “fruit fly” for breakthrough discoveries: a chain of gold atoms. They used it to demonstrate the quantization of the electronic part of the thermal conductance. The study also shows that the Wiedemann-Franz law, a relation from classical physics, remains valid down to the atomic level. The results were published in the scientific journal “Science” on 16 February 2017.

This is an artists' view of the quantized thermal conductance of an atomically thin gold contact. Credit: Created by Enrique Sahagun

This is an artists’ view of the quantized thermal conductance of an atomically thin gold contact. Credit: Created by Enrique Sahagun

To begin with, the test object is a microscopic gold wire. This wire is pulled until its cross section is only one atom wide and a chain of gold atoms forms, before it finally breaks. The physicists send electric current through this atomic chain, that is through the thinnest wire conceivable. With the help of different theoretical models the researchers can predict the conductance value of the electric transport, and also confirm it by experiment. This electric conductance value indicates how much charge current flows when an electrical voltage is applied. The thermal conductance, that indicates the amount of heat flow for a difference in temperature, could not yet be measured for such atomic wires.

Now the question was whether the Wiedemann-Franz law, that states that the electric conductance and the thermal conductance are proportional to each other, remains valid also at the atomic scale. Generally, electrons as well as atomic oscillations (also called vibrations or phonons) contribute to heat transport. Quantum mechanics has to be used, at the atomic level, to describe both the electron and the phonon transport. The Wiedemann-Franz law, however, only describes the relation between macroscopic electronic properties. Therefore, initially the researchers had to find out how high the contribution of the phonons is to the thermal conductance.

The doctoral researchers Jan Klöckner and Manuel Matt did complementary theoretical calculations, which showed that usually the contribution of phonons to the heat transport in atomically thin gold wires is less than ten percent, and thus is not decisive. At the same time, the simulations confirm the applicability of the Wiedemann-Franz law. Manuel Matt used an efficient, albeit less accurate method that provided statistical results for many gold wire stretching events to calculate the electronic part of the thermal conductance value, while Jan Klöckner applied density functional theory to estimate the electronic and phononic contributions in individual contact geometries. The quantization of the thermal conductance in gold chains, as proven by experiment, ultimately results from the combination of three factors: the quantization of the electrical conductance value in units of the so-called conductance quantum (twice the inverse Klitzing constant 2e2/h), the negligible role of phonons in heat transport and the validity of the Wiedemann-Franz law.

For quite some time it has been possible to theoretically calculate, with the help of computer models as developed in the teams of Fabian Pauly and Peter Nielaba, how charges and heat flow through nanostructures. A highly precise experimental setup, as created by the experimental colleagues Professor Edgar Meyhofer and Professor Pramod Reddy from the University of Michigan (USA), was required to be able to compare the theoretical predictions with measurements. In previous experiments the signals from the heat flow through single atom contacts were too small. The Michigan group succeeded in improving the experiment: Now the actual signal can be filtered out and measured.

The results of the research team make it possible to study heat transport not only in atomic gold contacts but many other nanosystems. They offer opportunities to experimentally and theoretically explore numerous fundamental quantum heat transport phenomenona that might help to use energy more efficiently, for example by exploiting thermoelectricity.