Category Archives: Materials

Researchers from Tomsk Polytechnic University together with their international colleagues have discovered a method to modify and use the one-atom thin conductor of current and heat, graphene without destroying it. Thanks to the novel method, the researchers were able to synthesize on single-layer graphene a well-structured polymer with a strong covalent bond, which they called ‘polymer carpets’. The entire structure is highly stable; it is less prone to degradation over time that makes the study promising for the development of flexible organic electronics. Also, if a layer of molybdenum disulfide is added over the ‘nanocarpet’, the resulting structure generates current under exposure to light. The study results were published in Journal of Materials Chemistry C.

This is the scheme for obtaining a hybrid structure of 'graphene-polymer'. Credit: Tomsk Polytechnic University

This is the scheme for obtaining a hybrid structure of ‘graphene-polymer’. Credit: Tomsk Polytechnic University

Graphene is simultaneously the most durable, light and an electrically conductive carbon material. It can be used for manufacturing solar batteries, smartphone screens, thin and flexible electronics, and even in water filters since graphene films pass water molecules and stop all other compounds. Graphene should be integrated into complex structures to be used successfully. However, it is a challenge to do that. According to scientists, graphene itself is stable enough and reacts poorly with other compounds. In order to make it react with other elements, i.e. to modify it, graphene is usually at least partially destroyed. This modification degrades the properties of the materials obtained.

Professor Raul D. Rodriguez from the Research School for Chemistry & Applied Biomedical Sciences says: ‘When functionalizing graphene, you should be very careful. If you overdo it, the unique properties of graphene are lost. Therefore, we decided to follow a different path.

In graphene, there are inevitable nanodefects, for example, at the edges of graphene and wrinkles in the plane. Hydrogen atoms are often attached to such defects. It is this hydrogen that can interact with other chemicals.’

To modify graphene, the authors use a thin metal substrate on which a graphene single-layer is placed. Then graphene is covered with a solution of bromine-polystyrene molecules. The molecules interact with hydrogen and are attached to the existing defects, resulting in polyhexylthiophene (P3HT). Further exposed to light during the photocatalysis, a polymer begins to ‘grow’.

‘In the result, we obtained the samples which structure resembles ‘polymer carpets’ as we call them in the paper. Above such a ‘polymer carpet’ we place molybdenum disulfide. Due to a unique combination of materials, we obtain a ‘sandwich’ structure’ that functions like a solar battery. That is, it generates current when exposed to light. In our experiments a strong covalent bond is established between the molecules of the polymer and graphene, that is critical for the stability of the material obtained,’ notes Rodriguez.

According to the researcher, the method for graphene modification, on the one hand, enables obtaining a very sturdy compound; on the other hand, it is rather simple and cheap as affordable materials are used. The method is versatile because it makes growing very different polymers directly on graphene possible.

‘The strength of the obtained hybrid material is achieved additionally because we do not destroy graphene itself but use pre-existing defects, and a strong covalent bond to polymer molecules. This allows us to consider the study as promising for the development of thin and flexible electronics when solar batteries can be attached to clothes, and when deformed they will not break,’ the professor explains.

NUST MISIS scientists have finally found out why a material that could potentially become the basis for ultra-fast memory in new computers is formed. Professor Petr Karpov and Serguei Brazovskii, both researchers at NUST MISIS, have managed to develop a theory which explains the mechanism of the latent state formation in layered tantalum disulfide, one of the most promising materials for modern microelectronics. The latent state of matter (which will be discussed further) was discovered by Serguei Brazovskii with a group of experimenters from Slovenia in 2014. The experiment that led to the beginning of the “boom” for the studies of layered materials lied in the fact that the tantalum disulfide sample, which was less than 100 nanometers big, was affected by an ultrashort laser (an electric pulse). The state of the material changed because of pulses in the irradiated area, and the sample became either a conductor of dielectrics or vice versa, depending on the experimenters’ wish. The switching even occurred in just one picosecond –a far quicker rate than in the “fastest” materials used as storage mediums in modern computers. That condition didn’t fade after exposure, but instead persisted. Accordingly, the material has become a potential candidate for the basis of the next generation of information data mediums.

Serguei Brazovskii is currently serving as the leading scientist of the “Theory of locally adjustable electronic states in layered materials” project at NUST MISIS, as well as working as a leading scientist at the University of Paris-Sud (Orsay, France) Laboratory of Theoretical Physics and Statistical Models.

Professor Petr Karpov, engineer at the NUST MISIS Department for Theoretical Physics and Quantum Technologies, explained the root of the matter, “The ‘boom’ in the study of layered tantalum disulfide happened, as well as a number of articles on this topic in different journals being published, after our colleagues from Slovenia discovered the latent state of the matter, unattainable in conventional (thermodynamic) phase transitions. However, most of these works were experimental, and the theory lagged behind. That is, the state could have been received but why did it turn out [that way]? What were the mechanisms of its formation? What its nature is in general, remained unclear. Why doesn’t the system return to its original state, continuing to remain in modified form indefinitely? In this article we tried to find the theoretical justification of the occurring processes”.

Tantalum disulfide belongs to a special group of conductor materials in which so-called charge-density waves are formed. This means that in addition to the natural peaks of electron density caused by the presence of an atom, there is also another periodicity that is several times greater than the distance between the adjacent atoms of the crystal lattice. In this case, the degree of that periodicity is the “root of thirteen”, so there is quite a large difference.

Picture A shows a layer of tantalum atoms. The period between the “superpeaks” is marked with a red arrow. The state of the different sites in the tantalum disulfide layer differ from each other in the fact that the maximum electron density is centered on tantalum atoms. The red ones show one state, while the “blue” and “white” ones show other states.

The work of NUST MISIS scientists consisted of constructing and studying a universal theoretical model that could describe the most important and intriguing property of the newly discovered state: the formation and transformation of nano-structural mosaics (pic. b). Some of the metal atoms fly out of the lattice after the processing of electrical impulses in the sample of layered tantalum disulfide, and that causes defects — charged vacancies in the electronic crystal.

However, instead of keeping a maximum distance from each other, the charges are “smeared” along the linear chains of tantalum atoms, forming boundaries of zones with different states of tantalum atoms. These “domains” then essentially chain up, connected to a global network. Manipulating these nanosets is the reason for the switching and memory effects observed in the material.

“We tried to find out why similar charges in such a structure do not repel, but, in fact, are attracted to each other. It turned out that this process is energetically more profitable than the maximum removal of positive charges from each other because the formation of fractional charged domain walls minimizes the charge of the constituent wall of atoms, which is why the domain system becomes more stable. This is completely confirmed by the experiment, and the whole crystal can be taken to such a state with a domain mosaic and globules dividing the walls”, — added Petr Karpov.

According to the scientists, thanks to the development of this theory, it is possible to confirm that the domain state of tantalum disulfide can be used for long-term storage and super-fast operation of information.

Cree, Inc. (NASDAQ: CREE) announces that it signed a non-exclusive, worldwide, royalty-bearing patent license agreement with Nexperia BV, a Dutch company. The agreement provides Nexperia access to Cree’s extensive gallium nitride (GaN) power device patent portfolio, which includes over 300 issued U.S. and foreign patents that describe inventive aspects of high electron mobility transistor (HEMT) and GaN Schottky diode devices. The portfolio addresses novel device structures, materials and processing improvements, and packaging technology. The patent license involves no transfer of technology.

“Cree was founded to develop novel compound semiconductor materials like GaN and SiC and to create devices that capitalize on their unique properties,” said John Palmour, Cree co-founder and CTO of Wolfspeed, a Cree company. “Cree’s decades of innovation are now yielding devices that enable market introductions of new power management and wireless systems. To help facilitate the growth of these new markets, Cree is licensing its GaN power device patents for GaN power-management systems.”

Graphene, a two-dimensional lattice of carbon atoms, has attracted enormous interest from a broad base of the research community for more than one decade. Graphene nanoribbons (GNRs), narrow strips of graphene, being quasi one-dimensional, possess complementary features relative to their two-dimensional counterpart of graphene sheets. Based on theoretical calculations, GNRs’ electrical properties can be controlled by the width and edge configuration and they can vary from being metallic to semiconducting. The physical properties of the GNRs depend significantly on the size and number of layers, which in turn depend on their synthesis method. There are three major approaches for synthesis of GNRs: cutting graphene by different lithographic techniques; bottom-up synthesis from polycyclic molecules; and unzipping of carbon nanotubes (CNTs). While the bottom-up method provides a route to precise edge control, and the lithographic method can afford GNRs with precise placement, the unzipping method has the advantage of mass-production on a large scale.

MWCNT unzipping methods can be classified into four major types: the reductive-intercalation-assisted approach, the oxidative unzipping, the electrochemical unzipping, and the group of methods that can be denoted as miscellaneous. The first approach is based on the well-known ability of alkali metals to intercalate graphite with expansion in the Z-axis direction. Being applied toward MWCNTs, such lattice expansion induces extreme stress within the concentric walls, resulted in the bursting, or longitudinal opening, of the tubes. The resulted GNRs are highly conductive, but they remain multi-layered and foliated. Due to the attraction between the surfaces, they do not exfoliate to single-layer ribbons.

The oxidative approach involves treatment of MWCNTs in acidic oxidative media with the formulation almost identical to that used in production of graphene oxide (GO) from graphite by the Hummers method. The resulting product is graphene oxide nanoribbons (GONRs). Unlike GNRs obtained by the reductive-intercalation method, GONRs easily exfoliate in aqueous solution, and they can be obtained as single-layered structures. A reaction mechanism for oxidative unzipping was proposed by Kosynkin et al.1 Invoking the classical oxidation of the alkenes by permanganate in acids, the first step is the formation of manganate ester on a C-C bond, and the second step is the rupture of the C-C bond with formation of ketones at the newly formed edges. This mechanism was further developed in the theoretical work by Rangel et al.2 The original synthesis spawned numerous studies on oxidative unzipping of MWCNTs. In many reports, the unzipping process was denoted as “chemical” as opposed to the “intercalation-exfoliation”, indicating that the permanganate-induced oxidative mechanism has been commonly accepted, and was even suggested toward unzipping SWCNTs.

The newly proposed mechanism was based on the Lab’s competences on the studies of the mechanism of GO formation of graphite that involves three consecutive steps: (a) intercalation of graphite by sulfuric acid with formation of a stage-1 H2SO4-graphite intercalation compound (GIC); (b) conversion of stage-1 H2SO4-GIC into pristine GO, and (c) exfoliation of GO to single-layer sheets upon exposure to water. Thus, under given conditions, formation of stage-1 H2SO4-GIC is unavoidable for any graphitic material. Subsequently, the mechanism of the oxidative unzipping of MWCNTs might be also intercalation-driven. If this is correct, one should be able to stop the reaction after the first intercalation-unzipping step before the second oxidation step proceeds. If attained, this will afford unzipped but not oxidized or minimally oxidized products possessing properties similar to reductively unzipped GNRs obtained by potassium or sodium-potassium metal intercalation. In this work, the Lab investigated the impact of the two key parameters, the KMnO4/MWCNT ratio, and the time of reaction on the structure and composition of as-obtained GNR products, and derived a revised and more complete understanding of the unzipping process.

The researchers demonstrated that the mechanism of the oxidative unzipping of MWCNTs is indeed intercalation-driven. The overall unzipping process involves the same three steps as in the course of GO production from graphite by the Hummers and modified Hummers methods: intercalation, oxidation, and exfoliation. With MWCNTs, the intercalation is associated with simultaneous unzipping. At low KMnO4/MWCNT ratios, one can obtain GNRs with characteristics similar to those produced by reductive unzipping. 0.12 wt equiv KMnO4 is the threshold ratio sufficient for almost complete unzipping, with only small amounts of covalent oxidation. Controlling the KMnO4/MWCNT ratio and time of reaction allows one to produce GNRs with the properties varying in a broad continuous range from multi-layered graphenic GNRs through single-layered GONRs. Thus, the team answered several questions that remained open in the field of unzipping MWCNTs, such as the reason why the inner-most walls of the nanotubes remain zipped. The intercalation-driven reaction mechanism provides a rationale for the impossibility of unzipping single-wall and few-wall CNTs, and aids in a reevaluation of the data from the oxidative unzipping process.

Indium Corporation, one of more than 3,000 ON Semiconductor production suppliers, was selected for its commitment to ensuring high quality and supply continuity in an evolving semiconductor market.

The annual Perfect Quality Award was presented to Weng Fai Pang, Managing Director for Asia-Pacific Operations, and Tim Twining, Vice President of Marketing, at ON Semiconductor’s Supplier Executive Conference in March in Hong Kong, China.

Indium Corporation is a materials manufacturer and supplier to the global electronics, semiconductor, thin-film, and thermal management markets. Products include solders and fluxes; brazes; thermal interface materials; sputtering targets; indium, gallium, germanium, and tin metals and inorganic compounds; and NanoFoil®. Founded in 1934, the company has global technical support and factories located in China, Malaysia, Singapore, South Korea, the United Kingdom, and the USA.

When power generators like windmills and solar panels transfer electricity to homes, businesses and the power grid, they lose almost 10 percent of the generated power. To address this problem, scientists are researching new diamond semiconductor circuits to make power conversion systems more efficient.

The view of the H-diamond MOSFET NOR logic circuit from above (left), and the operation of the NOR logic circuits, showing that the circuit only produces voltage when both inputs are at zero. Credit: Liu et al.

The view of the H-diamond MOSFET NOR logic circuit from above (left), and the operation of the NOR logic circuits, showing that the circuit only produces voltage when both inputs are at zero. Credit: Liu et al.

A team of researchers from Japan successfully fabricated a key circuit in power conversion systems using hydrogenated diamond (H-diamond.) Furthermore, they demonstrated that it functions at temperatures as high as 300 degrees Celsius. These circuits can be used in diamond-based electronic devices that are smaller, lighter and more efficient than silicon-based devices. The researchers report their findings this week in Applied Physics Letters, from AIP Publishing.

Silicon’s material properties make it a poor choice for circuits in high-power, high-temperature and high-frequency electronic devices. “For the high-power generators, diamond is more suitable for fabricating power conversion systems with a small size and low power loss,” said Jiangwei Liu, a researcher at Japan’s National Institute for Materials Science and a co-author on the paper.

In the current study, researchers tested an H-diamond NOR logic circuit’s stability at high temperatures. This type of circuit, used in computers, gives an output only when both inputs are zero. The circuit consisted of two metal-oxide-semiconductor field-effect transistors (MOSFETs), which are used in many electronic devices, and in digital integrated circuits, like microprocessors. In 2013, Liu and his colleagues were the first to report fabricating an E-mode H-diamond MOSFET.

When the researchers heated the circuit to 300 degrees Celsius, it functioned correctly, but failed at 400 degrees. They suspect that the higher temperature caused the MOSFETs to breakdown. Higher temperatures may be achievable however, as another group reported successful operation of a similar H-diamond MOSFET at 400 degrees Celsius. For comparison, the maximum operation temperature for silicon-based electronic devices is about 150 degrees.

In the future, the researchers plan to improve the circuit’s stability at high temperatures by altering the oxide insulators and modifying the fabrication process. They hope to construct H-diamond MOSFET logic circuits that can operate above 500 degrees Celsius and at 2.0 kilovolts.

“Diamond is one of the candidate semiconductor materials for next-generation electronics, specifically for improving energy savings,” said Yasuo Koide, a director at the National Institute for Materials Science and co-author on the paper. “Of course, in order to achieve industrialization, it is essential to develop inch-sized single-crystal diamond wafers and other diamond-based integrated circuits.”

Veeco Instruments Inc. (Nasdaq: VECO) today announced that ON Semiconductor (Nasdaq: ON) has ordered its Propel® High-volume Manufacturing (HVM) Gallium Nitride (GaN) Metal Organic Chemical Vapor Deposition (MOCVD) system. Based on its successful beta evaluation of the Propel HVM tool, ON Semiconductor ordered the production-level Propel system for GaN power electronics manufacturing. As the industry’s first single-wafer cluster platform, the Propel GaN MOCVD system is specifically designed for high-voltage power-management devices used in data centers; automotive, information and communication technology; defense; aerospace and power distribution systems, among other applications.

“Our prior learning with Veeco’s K465i™ GaN MOCVD system drove us to investigate the Propel HVM platform for our production ramp,” said Marnix Tack, PhD, senior director of corporate R&D and Open Innovation at ON Semiconductor. “The beta test results demonstrated superior device performance with high uniformity and within-wafer and wafer-to-wafer repeatability, while meeting our cost-of-ownership targets for six- and eight-inch wafers. As such, the Propel HVM system proved to be the most suitable platform for our power electronics manufacturing needs.”

The Propel HVM platform is based on Veeco’s innovative single-wafer system with proprietary IsoFlange™ and SymmHeat™ technologies that provide homogeneous laminar flow and uniform temperature profile across the entire wafer. The system enables production of power electronics, laser diodes, RF devices and advanced LEDs with higher performance and production yields while ensuring very low cost-of-ownership.

“The Propel HVM platform is rapidly gaining traction in the industry as innovative companies like ON Semiconductor recognize the benefits of GaN-on-silicon, which will partially replace current silicon technology for power electronics,” commented Peo Hansson, PhD, senior vice president and general manager of Veeco MOCVD operations. “With its highly controlled doping, run-to-run stability, superior wafer uniformity, high productivity and uptime, Propel HVM extends the benefits of our TurboDisc® platform to a unique single-wafer architecture. These capabilities benefit customers that seek a superior solution for manufacturing while providing a path for scaling to eight-inch wafers and expansion to RF and other advanced applications.”

GaN is a wide band gap semiconductor material with specific advantages over conventional technologies such as gallium arsenide (GaAs) and silicon carbide (SiC). GaN has enormous potential in the short term due to its benefits in terms of thermal behavior, efficiency, weight and size. According to market research firm Yole Développement, the GaN power device business was worth $14 million in 2016, and projects that it will reach $460 million by 2022, with a compound annual growth rate (CAGR) of 79 percent. GaN-based devices will be used increasingly in RF amplifiers, LEDs and high voltage applications among others, primarily due to their abilities to operate at high frequency, power density and temperature with improved efficiency and linearity.

Veeco is discussing the power of its innovative MOCVD and wet etch systems in the “5G: Where Are We and What’s Next?” track at the CS International Conference this week in Brussels, Belgium. Somit Joshi, senior director of MOCVD marketing is presenting a session titled, “Enabling GaN RF and Power Electronics through Innovative MOCVD and Wet Etch Process Technologies,” on Wednesday, April 11, and the Veeco team will also be accepting the CS Industry 2018 Award for Innovation for its GENxcel™ R&D MBE System at the awards ceremony held during the conference.

Technavio market research analysts forecast the global carbon nanotubes market to grow at a CAGR of more than 20% during the period 2018-2022, according to their latest report.

This market research report segments the global carbon nanotubes market into the following applications (chemicals, plastics, and composites, electronics; and energy, battery, and capacitors), products (single-walled carbon nanotubes and multi-walled carbon nanotubes) and key regions (the Americas, APAC, and EMEA).

In this report, Technavio analysts highlight the miniaturization of semiconductor components as a key factor contributing to the growth of the global carbon nanotubes market:

Miniaturization of semiconductor components

The focus on the production of miniaturized components is one of the biggest drivers for the market. There has been strong growth in miniaturized components as they are used in many consumer electronic devices. Miniaturization continues to be the key trend that is driving the electronics industry. Components are designed to nano-sized physical dimensions, which enables more number of surface mount devices (SMDs) to be placed on a printed circuit board (PCB). Therefore, the bulkiness of a PCB is reduced with more functionalities being added. Several components can be placed on a PCB with the help of miniaturization. Miniaturization can be seen in various devices, from mobile phones, computers, car engines, and even phone adapters. However, with the decrease in feature size, the dimensional tolerance and diversity must be maintained. This will impact the materials that are required for fabrication purposes.

According to a senior analyst at Technavio for semiconductor equipment, “For example, PCBs are required to support micro-components and will have to have the ability to support many components without breakage. An optimal design on the PCB needs to be stenciled, and placement of the component is done as per the stencil. The need to pack a higher component density in a PCB assembly is being fueled by the increasing demand for miniaturization of components.”

Technavio’s sample reports are free of charge and contain multiple sections of the report such as the market size and forecast, drivers, challenges, trends, and more.

Global carbon nanotubes market segmentation

Of the three major applications, the chemicals, plastics, and composites segment held the largest market share in 2017, accounting for nearly 56% of the global carbon nanotubes market.

Of the two major products, the multi-walled carbon nanotubes segment held the largest market share in 2017, accounting for nearly 88% of the market. The market share for this product is expected to decrease nearly 13% by 2022. The fastest growing product is single-walled carbon nanotubes, which will account for nearly 25% of the total market share by 2022.

Looking for more information on this market? Request a free sample report

By Jamie Girard, Sr. Director, Public Policy, SEMI

Although many months past due, Congress on March 23 finalized the federal spending for the remainder of fiscal year (FY) 2018, only hours before a what would have been the third government shutdown of the year. Congressional spending has been allocated in fits and starts since the end of FY 2017 last September, with patchwork deals keeping things running amid pervasive uncertainty. While this clearly isn’t an ideal way to fund the federal government, the end result will make many in the business of research and development pleased with the addition of more resources for science and innovation.

There was grave concern over the future of federal spending with the release of the president’s FY 2018 budget, which would have cut the National Science Foundation (NSF) budget by 11 percent and National Institutes of Standards & Technology (NIST) spending by 30 percent. Relief came with early drafts from Congress that whittled those cuts down to between 2-9 percent. But the real boost was a February bipartisan Congressional agreement that lifted self-imposed spending caps and introduced a generous dose of non-defense discretionary spending, increasing NSF spending 3.9 percent over the previous year and the NIST budget an astounding 25.9 percent over FY 2017 levels.

SEMI applauds this much-needed support for basic research and development (R&D) at these agencies after their budgets were cut or flat-funded for multiple cycles. It is well understood that federal R&D funding is critical to U.S. competitiveness and future economic prosperity. With the stakes that high, full funding of R&D programs at the NSF and NIST should be a bipartisan national priority backed by a strong and united community of stakeholders and advocates in the business, professional, research, and education communities.

With the work for FY 2018 completed, Congress will now turn to FY 2019 spending – already behind schedule due to the belated completion of the previous year’s budget. With 2018 an election year, Congress will likely begin work on the FY 2019 budget in short order, but probably won’t complete its work prior to the November elections.  SEMI will continue to work with lawmakers to support the R&D budgets at the agencies and their important basic science research. If you’d like to know how you can be more involved with SEMI’s public policy work, please contact Jamie Girard, Sr. Director, Public Policy at [email protected].

Today, research and innovation hub in nanoelectronics and digital technologies imec, and fabless technology innovator Qromis, have announced the development of high performance enhancement mode p-GaN power devices on 200mm engineered Coefficient of Thermal Expansion (CTE)-matched substrates, processed in imec’s silicon pilot line. The substrates are offered by Qromis as commercial 200mm QST® substrates as part of their patented product portfolio. The results will be presented at next week’s CS international Conference (April 10-11, Brussels, Belgium).

Today, GaN-on-Si technology is the industry standard platform for commercial GaN power switching devices for wafer diameters up to 150mm/6 inch.  Imec has pioneered the development of GaN-on-Si power technology for 200mm/8 inch wafers and qualified enhancement mode HEMT and Schottky diode power devices for 100V, 200V and 650V operating voltage ranges, paving the way to high volume manufacturing applications. However, for applications beyond 650V such as electric cars and renewable energy, it has become difficult to further increase the buffer thickness on 200mm wafers to the levels required for higher breakdown and low leakage levels, because of the mismatch in coefficient of thermal expansion (CTE) between the GaN/AlGaN epitaxial layers and the silicon substrate.  One can envisage to use thicker Si substrates to keep wafer warp and bow under control for 900V and 1200V applications, but practice has learned that for these higher voltage ranges, the mechanical strength is a concern in high volume manufacturing, and the ever thicker wafers can cause compatibility issues in wafer handling in some processing tools.

Carefully engineered and CMOS fab-friendly QST® substrates with a CTE-matched core having a thermal expansion that very closely matches the thermal expansion of the GaN/AlGaN epitaxial layers, are paving the way to 900V-1200V buffers and beyond, on a standard semi-spec thickness 200mm substrate. Moreover, QST® substrates open perspectives for very thick GaN buffers, including realization of free-standing and very low dislocation density GaN substrates by >100 micron thick fast-growth epitaxial layers. These unique features will enable long awaited commercial vertical GaN power switches and rectifiers suitable for high voltage and high current applications presently dominated by Si IGBTs and SiC power FETs and diodes.

“QST® is revolutionizing GaN technologies and businesses for 200mm and 300mm platforms”, stated Cem Basceri, President and CEO of Qromis.  “I am very pleased to see the successful demonstration of high performance GaN power devices by stacking leading edge technologies from Qromis, imec and AIXTRON,” Basceri said.

In this specific collaboration, imec and Qromis developed enhancement mode p-GaN power device specific GaN epitaxial layers on 200mm QST®substrates, with buffers grown in AIXTRON’s G5+ C 200mm high volume manufacturing MOCVD system.

Imec then ported its p-GaN enhancement mode power device technology to the 200mm GaN-on- QST® substrates in their silicon pilotline and demonstrated high performance power devices with threshold voltage of 2.8 Volt.  “The engineered QST® substrates from Qromis facilitated a seamless porting of our process of reference from thick GaN-on-Si substrates to standard thickness GaN-on- QST® substrates using the AIX G5+ C system, in a joint effort of imec, Qromis and AIXTRON,” stated Stefaan Decoutere, program director for GaN power technology at imec. The careful selection of the material for the core of the substrates, and the development of the light-blocking wrapping layers resulted in fab-compatible standard thickness substrates and first-time-right processing of the power devices.

quormis