Category Archives: Materials

Magnolia Optical Technology, Inc. announced that it is working with the Defense Advanced Research Projects Agency (DARPA) under the Phase II SBIR Program for Development of High-Performance Thin-Film Solar Cells for Portable Power Applications (Contract No D15PC00222).

Photovoltaic devices can provide a portable source of electrical power for a wide variety of defense and commercial applications, including mobile power for dismounted soldiers, unmanned aerial vehicles, and remote sensors.

“The goal of the current program is to develop high-efficiency GaAs-based solar cells that maintain their performance over changing environmental conditions, and that are thinner and thus more cost-effective to produce,” said Dr. Roger Welser, Magnolia’s Chief Technical Officer. “By combining thin III-V absorbers with advanced light-trapping structures, single-junction GaAs-based devices provide a means to deliver high efficiency performance over a wide range of operating conditions at a fraction of the cost of the multi-junction structures typically employed for space power. In addition, the incorporation of nano-enhanced III-V absorbers provides a pathway to extend infrared absorption and increase the photovoltaic power conversion efficiency of cost-effective thin-film solar cells.”

Dr. Ashok Sood, President of Magnolia stated “changes in the solar spectrum can dramatically degrade the performance of traditional multi-junction devices – changes that occur naturally throughout the day, from season to season, and from location to location as sunlight passes through the earth’s atmosphere. Moreover, multi-junction III-V cells require thick, complex epitaxial layers and are therefore inherently expensive to manufacture. The technology under development as part of this DARPA-funded program addresses these key weaknesses in the established high-performance photovoltaic technology. The photovoltaic market is a rapidly growing segment of the energy industry with a wide range of commercial and defense applications.”

Magnolia specializes in developing optical technologies for defense and commercial applications. Based in Woburn, MA, Magnolia develops both thin film and nanostructure-based technologies that cover the ultraviolet, visible, and infrared part of the spectrum. These technologies are developed for use in advanced military sensors and other commercial applications including solar cells.

If scientists are ever going to deliver on the promise of implantable artificial organs or clothing that dries itself, they’ll first need to solve the problem of inflexible batteries that run out of juice too quickly. They’re getting closer, and today researchers report that they’ve developed a new material by weaving two polymers together in a way that vastly increases charge storage capacity.

The researchers will present their work today at the 255th National Meeting & Exposition of the American Chemical Society (ACS). ACS, the world’s largest scientific society, is holding the meeting here through Thursday. It features more than 13,000 presentations on a wide range of science topics.

Supercapacitors woven like the red and white of a candy cane could have increased charge storage capacity compared to current technology. Credit: Tiesheng Wang

Supercapacitors woven like the red and white of a candy cane could have increased charge storage capacity compared to current technology. Credit: Tiesheng Wang

“We had been developing polymer networks for a different application involving actuation and tactile sensing,” Tiesheng Wang says. “After the project, we realized that the stretchable, bendable material we’d made could potentially be used for energy storage.”

Batteries, specifically lithium-ion batteries, dominate the energy storage landscape. However, the chemical reactions underlying the charging and discharging process in batteries are slow, limiting how much power they can deliver. Plus, batteries tend to degrade over time, requiring replacement. An alternate energy storage device, the supercapacitor, charges rapidly and generates serious power, which could potentially allow electric cars to accelerate more quickly, among other applications. Plus, supercapacitors store energy electrostatically, not chemically, which makes them more stable and long-lasting than many batteries. But today’s commercially available supercapacitors require binders and have low energy density, limiting their application in emerging go-anywhere electronics.

Wang, a graduate student in the lab of Stoyan Smoukov, Ph.D., at the University of Cambridge (U.K.) suspected that a flexible conducting polymer-based material from another project they were working on could be a better alternative. Conducting polymers, such as poly(3,4-ethylenedioxythiophene) (PEDOT), are candidate supercapacitors that have advantages over traditional carbon-based supercapacitors as charge storage materials. They are pseudocapacitive, meaning they allow reversible electrochemical reactions, and they also are chemically stable and inexpensive. However, ions can only penetrate the polymers a couple of nanometers deep, leaving much of the material as dead weight. Scientists working to improve ion mobility had previously developed nanostructures that deposit thin layers of conducting polymers on top of support materials, which improves supercapacitor performance by making more of the polymer accessible to the ions. The drawback, according to Wang, is that these nanostructures can be fragile, difficult to make reproducibly when scaled-up and poor in electrochemical stability, limiting their applicability.

So, Smoukov and Wang developed a more robust material by weaving together a conducting polymer with an ion-storage polymer. The two polymers were stitched together to form a candy cane-like geometry, with one polymer playing the role of the white stripe and the other, red. While PEDOT conducts electricity, the other polymer, poly(ethylene oxide) (PEO), can store ions. The interwoven geometry is instrumental to the energy storage benefits, Wang says, because it allows the ions to access more of the material overall, approaching the “theoretical limit.”

When tested, the candy cane supercapacitor demonstrated improvements over PEDOT alone with regard to flexibility and cycling stability. It also had nearly double the specific capacitance compared to conventional PEDOT-based supercapacitors.

Still, there’s room for improvement, Smoukov says. “In future experiments, we will be substituting polyaniline for PEDOT to increase the capacitance,” he says. “Polyaniline, because it can store more charge per unit of mass, could potentially store three times as much electricity as PEDOT for a given weight.” That means lighter batteries with the same energy storage can be charged faster, which is an important consideration in the development of novel wearables, robots and other devices.

By Jay Chittooran, SEMI Public Policy

Following through on his 2016 campaign promise, President Trump is implementing trade policies that buck conventional wisdom in Washington, D.C. and among U.S. businesses. Stiff tariffs and the dismantling of longstanding trade agreements – cornerstones of these new actions – will ripple through the semiconductor industry with particularly damaging effect. China, a chief target of criticism from President Trump, has again found itself in the crosshairs of the administration, with trade tensions rising to a fever pitch.

The Trump Administration has long criticized China for what it considers unfair trade practices, often zeroing in on intellectual property. In August 2017, the Office of the U.S. Trade Representative (USTR), charged with developing and recommending U.S trade policy to the president, launched a Section 301 investigation into whether China’s practice of forced technology transfer has discriminated against U.S. firms. As the probe continues, it is becoming increasingly clear that the United States will impose tariffs on China based on its current findings. Reports suggest that the tariffs could come soon, hitting a range of products from consumer electronics to toys. Other measures could include tightening restrictions on the trade of dual-use goods – those with both commercial and military applications – curbing Chinese investment in the United States, and imposing strict limits on the number of visas issued to Chinese citizens.

With China a major and intensifying force in the semiconductor supply chain, raising tariffs hangs like the Sword of Damocles over the U.S. and global economies. A tariff-ignited trade war with China could stifle innovation, undermine the long-term health of the semiconductor industry, and lead to unintended consequences such as higher consumer prices, lower productivity, job losses and, on a global scale, a brake on economic growth.

Other recently announced U.S. trade actions could also cloud the future for semiconductor companies. The Trump administration, based on two separate Section 232 investigations claiming that overproduction of both steel and aluminum are a threat to U.S. national security, recently levied a series of tariffs and quotas on every country except Canada and Mexico. While these tariffs have yet to take effect, the mere prospect has angered U.S. trading partners – most notably Korea, the European Union and China. Several countries have threatened retaliatory action and others have taken their case to the World Trade Organization.

Trade is oxygen to the semiconductor industry, which grew by nearly 30 percent last year and is expected to be valued at an estimated $1 trillion by 2030. Make no mistake: SEMI fully supports efforts to buttress intellectual property protections. However, the Trump administration’s unfolding trade policy could antagonize U.S. trade partners.

For its part, SEMI is weighing in with USTR on these issues, underscoring the critical importance of trade to the semiconductor industry as we educate policymakers on trade barriers to industry growth and encourage unobstructed cross-border commerce to advance semiconductors and the emerging technologies they enable. On behalf of our members, we continue our work to increase global market access and lessen the regulatory burden on global trade. If you are interested in more information on trade, or how to be involved in SEMI’s public policy program, please contact Jay Chittooran, Public Policy Manager, at [email protected].

Originally published on the SEMI blog.

Some novel materials that sound too good to be true turn out to be true and good. An emergent class of semiconductors, which could affordably light up our future with nuanced colors emanating from lasers, lamps, and even window glass, could be the latest example.

These materials are very radiant, easy to process from solution, and energy-efficient. The nagging question of whether hybrid organic-inorganic perovskites (HOIPs) could really work just received a very affirmative answer in a new international study led by physical chemists at the Georgia Institute of Technology.

Laser light in the visible range is processed for use in the testing of quantum properties in materials in Carlos Silva's lab at Georgia Tech. Credit: Georgia Tech/Allison Carter

Laser light in the visible range is processed for use in the testing of quantum properties in materials in Carlos Silva’s lab at Georgia Tech. Credit: Georgia Tech/Allison Carter

The researchers observed in an HOIP a “richness” of semiconducting physics created by what could be described as electrons dancing on chemical underpinnings that wobble like a funhouse floor in an earthquake. That bucks conventional wisdom because established semiconductors rely upon rigidly stable chemical foundations, that is to say, quieter molecular frameworks, to produce the desired quantum properties.

“We don’t know yet how it works to have these stable quantum properties in this intense molecular motion,” said first author Felix Thouin, a graduate research assistant at Georgia Tech. “It defies physics models we have to try to explain it. It’s like we need some new physics.”

Quantum properties surprise

Their gyrating jumbles have made HOIPs challenging to examine, but the team of researchers from a total of five research institutes in four countries succeeded in measuring a prototypical HOIP and found its quantum properties on par with those of established, molecularly rigid semiconductors, many of which are graphene-based.

“The properties were at least as good as in those materials and may be even better,” said Carlos Silva, a professor in Georgia Tech’s School of Chemistry and Biochemistry. Not all semiconductors also absorb and emit light well, but HOIPs do, making them optoelectronic and thus potentially useful in lasers, LEDs, other lighting applications, and also in photovoltaics.

The lack of molecular-level rigidity in HOIPs also plays into them being more flexibly produced and applied.

Silva co-led the study with physicist Ajay Ram Srimath Kandada. Their team published the results of their study on two-dimensional HOIPs on March 8, 2018, in the journal Physical Review Materials. Their research was funded by EU Horizon 2020, the Natural Sciences and Engineering Research Council of Canada, the Fond Québécois pour la Recherche, the Research Council of Canada, and the National Research Foundation of Singapore.

The ‘solution solution’

Commonly, semiconducting properties arise from static crystalline lattices of neatly interconnected atoms. In silicon, for example, which is used in most commercial solar cells, they are interconnected silicon atoms. The same principle applies to graphene-like semiconductors.

“These lattices are structurally not very complex,” Silva said. “They’re only one atom thin, and they have strict two-dimensional properties, so they’re much more rigid.”

“You forcefully limit these systems to two dimensions,” said Srimath Kandada, who is a Marie Curie International Fellow at Georgia Tech and the Italian Institute of Technology. “The atoms are arranged in infinitely expansive, flat sheets, and then these very interesting and desirable optoelectronic properties emerge.”

These proven materials impress. So, why pursue HOIPs, except to explore their baffling physics? Because they may be more practical in important ways.

“One of the compelling advantages is that they’re all made using low-temperature processing from solutions,” Silva said. “It takes much less energy to make them.”

By contrast, graphene-based materials are produced at high temperatures in small amounts that can be tedious to work with. “With this stuff (HOIPs), you can make big batches in solution and coat a whole window with it if you want to,” Silva said.

Funhouse in an earthquake

For all an HOIP’s wobbling, it’s also a very ordered lattice with its own kind of rigidity, though less limiting than in the customary two-dimensional materials.

“It’s not just a single layer,” Srimath Kandada said. “There is a very specific perovskite-like geometry.” Perovskite refers to the shape of an HOIPs crystal lattice, which is a layered scaffolding.

“The lattice self-assembles,” Srimath Kandada said, “and it does so in a three-dimensional stack made of layers of two-dimensional sheets. But HOIPs still preserve those desirable 2D quantum properties.”

Those sheets are held together by interspersed layers of another molecular structure that is a bit like a sheet of rubber bands. That makes the scaffolding wiggle like a funhouse floor.

“At room temperature, the molecules wiggle all over the place. That disrupts the lattice, which is where the electrons live. It’s really intense,” Silva said. “But surprisingly, the quantum properties are still really stable.”

Having quantum properties work at room temperature without requiring ultra-cooling is important for practical use as a semiconductor.

Going back to what HOIP stands for — hybrid organic-inorganic perovskites – this is how the experimental material fit into the HOIP chemical class: It was a hybrid of inorganic layers of a lead iodide (the rigid part) separated by organic layers (the rubber band-like parts) of phenylethylammonium (chemical formula (PEA)2PbI4).

The lead in this prototypical material could be swapped out for a metal safer for humans to handle before the development of an applicable material.

Electron choreography

HOIPs are great semiconductors because their electrons do an acrobatic square dance.

Usually, electrons live in an orbit around the nucleus of an atom or are shared by atoms in a chemical bond. But HOIP chemical lattices, like all semiconductors, are configured to share electrons more broadly.

Energy levels in a system can free the electrons to run around and participate in things like the flow of electricity and heat. The orbits, which are then empty, are called electron holes, and they want the electrons back.

“The hole is thought of as a positive charge, and of course, the electron has a negative charge,” Silva said. “So, hole and electron attract each other.”

The electrons and holes race around each other like dance partners pairing up to what physicists call an “exciton.” Excitons act and look a lot like particles themselves, though they’re not really particles.

Hopping biexciton light

In semiconductors, millions of excitons are correlated, or choreographed, with each other, which makes for desirable properties, when an energy source like electricity or laser light is applied. Additionally, excitons can pair up to form biexcitons, boosting the semiconductor’s energetic properties.

“In this material, we found that the biexciton binding energies were high,” Silva said. “That’s why we want to put this into lasers because the energy you input ends up to 80 or 90 percent as biexcitons.”

Biexcitons bump up energetically to absorb input energy. Then they contract energetically and pump out light. That would work not only in lasers but also in LEDs or other surfaces using the optoelectronic material.

“You can adjust the chemistry (of HOIPs) to control the width between biexciton states, and that controls the wavelength of the light given off,” Silva said. “And the adjustment can be very fine to give you any wavelength of light.”

That translates into any color of light the heart desires.

The ConFab — an executive invitation-only conference now in its 14th year — brings together influential decision-makers from all parts of the semiconductor supply chain for three days of thought-provoking talks and panel discussions, networking events and select, pre-arranged breakout business meetings.

In the 2018 program, we will take a close look at the new applications driving the semiconductor industry, the technology that will be required at the device and process level to meet new demands, and the kind of strategic collaboration that will be required. It is this combination of business, technology and social interactions that make the conference so unique and so valuable. Browse this slideshow for a look at this year’s speakers, keynotes, panel discussions, and special guests.

Visit The ConFab’s website for a look at the full, three-day agenda for this year’s event.

KEYNOTE: How AI is Driving the New Semiconductor Era

Rama Divakaruni_June_2014presented by Rama Divakaruni, Advanced Process Technology Research Lead, IBM

The exciting results of AI have been fueled by the exponential growth in data, the widespread availability of increased compute power, and advances in algorithms. Continued progress in AI – now in its infancy – will require major innovation across the computing stack, dramatically affecting logic, memory, storage, and communication. Already the influence of AI is apparent at the system-level by trends such as heterogeneous processing with GPUs and accelerators, and memories with very high bandwidth connectivity to the processor. The next stages will involve elements which exploit characteristics that benefit AI workloads, such as reduced precision and in-memory computation. Further in time, analog devices that can combine memory and computation, and thus minimize the latency and energy expenditure of data movement, offer the promise of orders of magnitude power-performance improvements for AI workloads. Thus, the future of AI will depend instrumentally on advances in devices and packaging, which in turn will rely fundamentally on materials innovations.

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A research team from Tokyo Institute of Technology (Tokyo Tech) and Waseda University have successfully produced high-quality thin film monocrystalline silicon with a reduced crystal defect density down to the silicon wafer level at a growth rate that is more than 10 times higher than before. In principle, this method can improve the raw material yield to nearly 100%. Therefore, it can be expected that this technology will make it possible to drastically reduce manufacturing costs while maintaining the power generation efficiency of monocrystalline silicon solar cells, which are used in most high efficient solar cells.

This is the monocrystalline Si thin film peeled off using adhesive tape. Credit: CrystEngComm

This is the monocrystalline Si thin film peeled off using adhesive tape. Credit: CrystEngComm

Background

Solar power generation is a method of generating power where solar light energy is converted directly into electricity using a device called a “solar cell.” Efficiently converting the solar energy that is constantly striking the earth to generate electricity is an effective solution to the problem of global warming related to CO2emissions. By making the monocrystalline Si solar cells that are at the core of solar power generation systems thinner, it is possible to greatly reduce raw material costs, which account for about 40% of the current module, and by making them flexible and lighter, usage can be expected to expand and installation costs can be expected to decrease.

In addition, as a method of reducing manufacturing cost, thin-film monocrystalline Si solar cells that use porous silicon (Double Porous Silicon Layer: DPSL) via lift-off are attracting attention as having a competitive edge in the future.

Among the technical challenges related to monocrystalline Si solar cells using lift-off are 1) the formation of a high-quality thin film Si at the Si wafer level, 2) achieving a porous structure that can easily be lifted off (peeled off), 3) improving the growth rate and Si raw material yield (necessary equipment costs are determined by the growth rate), and 4) being able to use the substrate after lift-off without any waste.

In order to overcome challenge 1), it was necessary to clarify the main factors that determine the quality of thin film crystals grown on porous silicon, and to develop a technique for controlling these.

Overview of research achievement

A joint research team consisting of Professor Manabu Ihara and Assistant Professor Kei Hasegawa of the Tokyo Tech, and Professor Suguru Noda of Waseda University has developed a high-quality thin film monocrystalline silicon with a thickness of about 10 μm and a reduced crystal defect density down to the silicon wafer level at a growth rate that is more than 10 times higher than before. First, double-layer nano-order porous silicon is generated on the surface of a monocrystalline wafer using an electrochemical technique. Next, the surface was smoothed to a roughness of 0.2 to 0.3 nm via a unique zone heating recrystallization method (ZHR method), and this substrate was used for high-speed growth to obtain a moonocrystalline thin film with high crystal quality. The grown film can easily be peeled off using the double-layer porous Si layer, and the substrate can be reused or used as an evaporation source for thin film growth, which greatly reduces material loss. When the surface roughness of the underlying substrate is reduced by changing the ZHR method conditions, the defect density of the thin film crystal that was grown decreased, and the team eventually succeeded in reducing it to the Si wafer level of about 1/10th. This quantitatively shows that a surface roughness in the range of only 0.1-0.2 nm (level of atoms to several tens of layers) has an important impact on the formation of crystal defects, which is also of interest as a crystal growth mechanism.

The film formation rate and the conversion rate of the Si source to the thin film Si are bottlenecks in the production of thin-film monocrystalline Si. With chemical vapor deposition (CVD), which is mainly used for epitaxy, the maximum film forming rate is a few μm/h and the yield is about 10%. At the Noda Laboratory of Waseda University, instead of the regular physical vapor deposition (PVD) where raw Si is vaporized at around its melting point of 1414 ?C, by vaporizing the raw Si at much higher temperature of >2000 ?C, a rapid evaporation method (RVD) was developed with a high Si vapor pressure capable of depositing Si at 10 μm/min.

It was found that the ZHR technology developed this time can resolves technical problems and drastically reduce the manufacturing cost of the lift-off process.

Future development

Based on the results of this study, not only did the team discover the main factors for improving the quality of crystals during rapid growth on porous silicon used for the lift-off process, they succeeded in controlling these. In the future, measurement of the carrier lifetime of the thin film, which is directly connected to the performances of solar cells, and fabrication of solar cells will be carried out with the goal of putting the technology into practical use. The use of this Si thin films as low cost bottom cells in tandem type solar cells with an efficiency of over 30% will also be considered.

The results are published in the Royal Society of Chemistry (RSC) journal CrystEngComm and will be featured on the inside front cover of the issue.

Scientists of Karlsruhe Institute of Technology (KIT) have succeeded in monitoring the growth of minute gallium arsenide wires. Their findings do not only provide for a better understanding of growth, they also enable approaches to customizing nanowires with special properties for certain applications in the future. Gallium arsenide is a semiconductor material widely used in infrared remote controls, high-frequency technology for mobile phones, conversion of electric signals into light in glass-fiber cables, and solar cells for space technology. The results were presented in the journal Nano Letters by the team of Philipp Schroth of KIT and the University of Siegen.

For wire production, the scientists used the self-catalyzed vapor-liquid-solid process (VLS process). Minute liquid gallium droplets are deposited on a hot silicon crystal of around 600°C in temperature. Then, this wafer is subjected to directed beams of gallium atoms and arsenic molecules that dissolve in the gallium droplets. After some time, nanowires start to grow below the droplets that act as catalysts for the longitudinal growth of the wires. “This process is quite well established, but it has been impossible so far to specifically control it. To achieve this, the details of growth have to be understood first,” co-author Ludwig Feigl of KIT says.

For the studies, the team used a portable chamber specifically designed by KIT’s Institute for Photon Science and Synchrotron Radiation (IPS) with funds of the Federal Ministry of Education and Research (BMBF). The researchers installed the chamber in the research light source PETRA III of the German Electron Synchrotron (DESY) and took X-ray pictures every minute to determine the structure and diameter of the growing nanowires. Finally, they measured the fully grown nanowires with an electron microscope. “We found that growth of nanowires is not only caused by the VLS process, but also by a second component that was observed and quantified directly for the first time in this experiment. This so-called side-wall growth makes the wires gain width,” says Philipp Schroth. In the course of the growth process, the gallium droplets become larger due to constant gallium vapor deposition. This has a far-reaching impact. “As the droplet size changes, the contact angle between the droplet and the surface of the wires changes as well. In certain cases, this causes the wire to suddenly continue growing with another crystal structure,” Feigl says. This change is of relevance to applications, as the structure and shape of the nanowires considerably affect the properties of the resulting material.

One of the problems for Javier Vela and the chemists in his Iowa State University research group was that a toxic material worked so well in solar cells.

And so any substitute for the lead-containing perovskites used in some solar cells would have to really perform. But what could they find to replace the perovskite semiconductors that have been so promising and so efficient at converting sunlight into electricity?

What materials could produce semiconductors that worked just as well, but were safe and abundant and inexpensive to manufacture?

“Semiconductors are everywhere, right?” Vela said. “They’re in our computers and our cell phones. They’re usually in high-end, high-value products. While semiconductors may not contain rare materials, many are toxic or very expensive.”

Vela, an Iowa State associate professor of chemistry and an associate of the U.S. Department of Energy’s Ames Laboratory, directs a lab that specializes in developing new, nanostructured materials. While thinking about the problem of lead in solar cells, he found a conference presentation by Massachusetts Institute of Technology researchers that suggested possible substitutes for perovskites in semiconductors.

Vela and Iowa State graduate students Bryan Rosales and Miles White decided to focus on sodium-based alternatives and started an 18-month search for a new kind of semiconductor. The work was supported by Vela’s five-year, $786,017 CAREER grant from the National Science Foundation. CAREER grants are the foundation’s most prestigious awards for early career faculty.

They came up with a compound that features sodium, which is cheap and abundant; bismuth, which is relatively scarce but is overproduced during the mining of other metals and is cheap; and sulfur, the fifth most common element on Earth. The researchers report their discovery in a paper recently published online by the Journal of the American Chemical Society.

The paper’s subtitle is a good summary of their work: “Toward Earth-Abundant, Biocompatible Semiconductors.”

“Our synthesis unlocks a new class of low-cost and environmentally friendly ternary (three-part) semiconductors that show properties of interest for applications in energy conversion,” the chemists wrote in their paper.

In fact, Rosales is working to create solar cells that use the new semiconducting material.

Vela said variations in synthesis – changing reaction temperature and time, choice of metal ion precursors, adding certain ligands – allows the chemists to control the material’s structure and the size of its nanocrystals. And that allows researchers to change and fine tune the material’s properties.

Several of the material’s properties are already ideal for solar cells: The material’s band gap – the amount of energy required for a light particle to knock an electron loose – is ideal for solar cells. The material, unlike other materials used in solar cells, is also stable when exposed to air and water.

So, the chemists think they have a material that will work well in solar cells, but without the toxicity, scarcity or costs.

“We believe the experimental and computational results reported here,” they wrote in their paper, “will help advance the fundamental study and exploration of these and similar materials for energy conversion devices.”

The Silicon Integration Initiative’s (Si2) Compact Model Coalition (CMC) has approved two integrated circuit design simulation standards that target the fast-growing global market for gallium nitride semiconductors.

The approved standards are the 12th and 13th models currently funded and supported by the CMC, a collaborative group that develops and maintains cost-saving SPICE (Simulation Program with Integrated Circuit Emphasis) models for IC design.

John Ellis, president and CEO, said gallium nitride devices are used in many high-power and high-frequency applications, including satellite communications, radar, cellular, broadband wireless systems, and automotive. “Although it’s currently a small market, gallium nitride devices are expected to show remarkable growth over the coming years.”

To reduce research and developments costs and increase simulation accuracy, the semiconductor industry relies on the CMC to share resources for funding standard SPICE models. Si2 is a research and development joint venture focused on IC design and tool operability standards. “Once the standard models are proven and accepted by CMC, they are incorporated into design tools widely used by the semiconductor industry. The equations at work in the standard model-setting process are developed, refined and maintained by leading universities and national laboratories. The CMC directs and funds the universities to standardize and improve the models,” Ellis explained.

Dr. Ana Villamor, technology and market analyst at Yole Développement (Yole), Lyon, France, said that “2015 and 2016 were exciting years for the gallium nitride power business. We project an explosion of this market with 79% CAGR between 2017 and 2022. Market value will reach US $460 million at the end of the period1. It’s still a small market compared to the impressive US $30 billion silicon power semiconductor market,” Villamor said. “However, its expected growth in the short term is showing the enormous potential of the power gallium nitride technology based on its suitability for high performance and high frequency solutions.”

Yole_GaN_power_device_market_size_split_by_application_M_

Peter Lee, manager at Micron Memory Japan and CMC chair, said that “Gallium nitride devices are playing an increasingly important part in the field of RF and power electronics. With these two advanced models established as the first, worldwide gallium nitride model standards, efficiencies in design will greatly increase by making it possible to take into account accurate device physical behavior in design, and enabling the use of the various simulation tools in the industry with consistent results.”

Click here to download standard models.

 

GLOBALFOUNDRIES today revealed new details of its silicon photonics roadmap to enable the next generation of optical interconnects for datacenter and cloud applications. The company has now qualified the industry’s first 90nm manufacturing process using 300mm wafers, while also unveiling its upcoming 45nm technology to deliver even greater bandwidth and energy efficiency.

GF’s silicon photonics technologies are designed to support the massive growth in data transmitted across today’s global communication infrastructure. Instead of traditional interconnects that transmit data using electrical signals over copper wires, silicon photonics technology uses pulses of light through optical fibers to move more data at higher speeds and over longer distances, while also minimizing energy loss.

“The explosive need for bandwidth is fueling demand for a new generation of optical interconnects,” said Mike Cadigan, senior vice president of sales and ASIC business unit at GF. “Our silicon photonics technologies enable customers to deliver unprecedented levels of connectivity for transferring massive amounts of data, whether it’s between chips inside a datacenter or across cloud servers separated by hundreds and even thousands of miles. When combined with our advanced ASIC and packaging capabilities, these technologies allow us to deliver highly differentiated solutions to this marketplace.”

GF’s silicon photonics technologies enable the integration of tiny optical components side-by-side with electrical circuits on a single silicon chip. This “monolithic” approach leverages standard silicon manufacturing techniques to improve production efficiency and reduce cost for customers deploying optical interconnect systems.

Available today on 300mm

GF’s current-generation silicon photonics offering is built on its 90nm RF SOI process, which leverages the company’s world-class experience in manufacturing high-performance radio frequency (RF) chips. The platform can enable solutions that provide 30GHz of bandwidth to support client side data rates of up to 800Gbps, as well as long-reach capabilities of up to 120km.

The technology, which had previously been manufactured using 200mm wafer processing, has now been qualified on larger-diameter 300mm wafers at GF’s Fab 10 facility in East Fishkill, N.Y. The migration to 300mm enables more customer capacity, greater manufacturing productivity, and up to a 2X reduction in photonic losses to improve reach and enable more efficient optical systems.

The 90nm technology is supported by a full PDK for E/O/E co-design, polarization, temperature and wavelength parametrics from Cadence Design Systems, as well as differentiated photonic test capabilities including five test sectors from technology verification and modeling to MCM product test.

A roadmap for tomorrow

GF’s next-generation monolithic silicon photonics offering will be manufactured on its 45nm RF SOI process, with production slated for 2019. By leveraging the more advanced 45nm node, the technology will enable reduced power, smaller form factor, and significantly higher bandwidth optical transceiver products to address next generation terabit applications.