Category Archives: Process Materials

By Jamie Liao, SEMI Taiwan

Market demand is driving development of 5G network standards, and commercial applications are expected to be introduced by 2020. As applications for next-generation communications are evolving, mobile devices need to promise better performance and higher resistance to heat, high power, voltage and radiation. For existing technologies, compound semiconductors like SiC and GaN are no doubt the best solutions because they perform better in terms of energy band gaps, saturation velocities, heat conductivity and breakdown field strength. In order to facilitate development of the industry, SEMI Taiwan worked with the National Chung-Shan Institute of Science and Technology (NCSIST) and the Taiwan Institute of Economic Research (TIER) to organize the Compound Semiconductor Seminar ─ Enabling Next Generation of Communications. ASE Group, Airoha Technology Corp., eLaser and WIN Semiconductors Corp. joined with SEMI Taiwan to explore the materials and technology trends of compound semiconductors.

Compound Semiconductor Technologies Continue to Advance

Speaking on upcoming 5G network with the theme “Highly Efficient 5G PA Design,” Dr. Jerry Lin, CTO of Airoha Technology Corp., said that while 5G networks perform better than existing standards in data speed and capacity, power consumption may not increase simultaneously. In order to achieve that, interior design of communications devices also need to evolve. As power amplifier (PA) is normally the most power-consuming component in traditional cellular networks, developers should start with PA if they want to address the challenge.

Dr. Lin added that in addition to optimizing circuit design, developers should also consider connectivity, modem chips, PA structure and PA devices. So which process will prevail in the area of 5G PA? Is it CMOS? Or GaAs/GaN? Dr. Lin presented a table and pointed out that GaAs/GaN has more advantage in “breakdown voltage,” “power handling,” “through wafer via” and “substrate loss,” while CMOS is doing better in self-testing, complex bias circuit design, signal processing, integration, configuration flexibility and low power voltage. Therefore, Dr. Lin believed that GaAa/GaN will continue to exist as performance is the main concern for the design of base stations used in 5G, 6G or even millimeter-wave networks. Meanwhile, CMOS will have a bigger chance with price-sensitive IoT equipments because it is energy efficient and cheap. As for hand-held devices, sub-6GHz equipments may still adopt hybrid structures like GaAs/GaN or CMOS+GaAs. CMOS is likely to dominate in the millimeter-wave market.

Dr. Kun Chuan Lin, General Manager of eLaser’s branch in the Hsinchu Science and Industrial Park, shared insight on the development of GaN epitaxial wafer process with a speech entitled “GaN on Si Epitaxy Technology Innovation.” He said that when electronics product design requires better heat resistance, breakdown voltage, electron saturation velocity and current density, semiconductor devices made with the GaN process can deliver high-power output in high-frequency environment. Therefore, the technology will have great potential in next-generation applications like automotive electronics, power management systems, industrial lighting, portable electronics devices, communications equipment, and consumer electronics products.

Dr. Lin said when GaN epi-wafer was adopted in LED devices, one 150mm wafer would contain tens of thousands, or even hundreds of thousands LED units so the yield loss caused by thousands of particles would be minor. But in the case of large-sized GaN power devices made of epi-wafers, each 150mm wafer has only 1,000 to thousands of chips and the number of particles pretty much decides the yield of power devices on epi-wafers. In comparison, the epitaxy technology of GaN-on-Si is more important because of its low particle counts, and innovative technologies will be needed in this area of epi-wafer manufacturing.

Next-generation Communications Frameworks Emerge: From Modules to Packaging and Testing

Dr. W.K. Wang, Technical Director of WIN Semiconductors Corp., discussed GaAs solutions for millimeter-wave front-end modules with a speech entitled “Advanced GaAs Solution for mmw FEM.” According to Dr. Wang, the GaAs pHEMT process has been long adopted in the area of wireless communications, such as peer-to-peer RF transmission and very small aperture terminal (VSAT.) Now, Win Semiconductors’ pHEMT and PIN diode technology platforms are already capable of providing solutions to performance and circuit requirements. He said GaAs technologies have been rapidly evolving in recent years so wafer package and multi-function devices can now be integrated into GaAs wafer fabrication. In addition, the technology to integrate pHEMT and PIN diode into PINHEMT will also enjoy great potential in the area of millimeter-wave front-end modules.

Dr. Wang also pointed out that 0.1um pHEMT can now be used to run E-band and D-band amplifiers, while Ka-Band Doherty amplifiers and low-noise amplifiers have been made possible through 0.15um pHEMT. As KA-band switches can be demonstrated in a GaAs PIN diode process, it proves that GaAs pHEMT/PIN is a suitable verification solution in millimeter-wave communications.

In a speech entitled “Next Wave RF & Photonics Packaging Solution,” Dr. Vincent Lin, Technical Director of ASE Group shared his insight on the challenge that Moore’s Law has slowed down. He said while volumes of data from existing mobile devices and cloud computing services are increasing, all chip technologies in the semiconductor industry have advanced in a slower manner. Therefore, cross-system integration will be the solution to bandwidth issues.

Dr. Lin said that mobile devices’ RF modules and silicon photonics in data centers are the key devices in cloud computing platforms now. Both of them need various materials, including compound semiconductors, silicon, passive devices, special crystals or multi-material high-speed connecting chips — with impedance matching and low insertion loss being the two key indicators to performance. Dr. Lin also demonstrated a new packaging platform of RF modules and silicon photonics modules that can serve as the best solution for the local industry.

In addition to these keynote speeches on latest trends and technologies in the market, the seminar also offered an opportunity for participants to interact and expand connections. Terry Tsao, president of SEMI Taiwan, said to promote development of Taiwan’s compound semiconductor industry, SEMI will continue to organize events where people in the industry can exchange opinions. SEMICON Taiwan 2017 will establish a Compound Semiconductor Pavilion for the first time, where international forums and get together to be held for industry insiders to share insight on future trends and technologies to help promote exchanges, collaboration and opportunities in the market.

Umicore’s business unit Precious Metals Chemistry today inaugurated its production unit for advanced metal organic precursor technologies used in the semiconductor and LED markets, respectively TMGa (Trimethylgallium) and TEGa (Triethylgallium). The event was attended by European and overseas customers as well as local and regional politicians. The guest of honor was Dr. Barbara Hendricks, Germany’s Federal Minister for the Environment, Nature Conservation, Building and Nuclear Safety.

Umicore’s TMGa manufacturing process is innovative and unique. It offers a more sustainable and ecological production method by minimizing hazardous side streams and material losses and optimizing yield to nearly 100%.

Dr. Lothar Mussmann, Vice-President of Umicore Precious Metals Chemistry said, “I am proud that this patented innovation has now become a world-class and industrial scale manufacturing plant. It will provide benefits for our customers and the environment and underlines Umicore’s position as a pioneer in sustainable technologies.”

Umicore Precious Metals Chemistry is the only European manufacturer of TMGa and TEGa and supplies customers across the world from its Hanau manufacturing base. Umicore Precious Metals Chemistry helps to reduce cost of ownership through its innovative approach to process chemistry and its collaborative approach with customers and end users.

About Trimethylgallium and Umicore’s manufacturing process

Trimethylgallium (TMGa) is a colorless liquid with very high vapor pressure, which boils at low temperatures. Umicore’s new production process increases the yield of TMGa in comparison with current production technologies. In this way, organic solvents can be completely dispensed with. The TMGa is prepared by chemically reacting gallium trichloride with a more efficient methylating agent in molten salt. This reduces the amount of waste per kilogram of TMGa by more than 50%, with the resulting intermediates being recycled in the process. The finished product is then used in the semiconductor industry, where it evaporates in closed systems onto a substrate. This creates, for example, environmentally friendly LED lamps.

New research into the largely unstudied area of heterostructural alloys could lead to greater materials control and in turn better semiconductors, advances in nanotechnology for pharmaceuticals and improved metallic glasses for industrial applications.

Heterostructural alloys are blends of compounds made from materials that don’t share the same atom arrangement. Conventional alloys are isostructural, meaning the compounds they consist of, known as the end members, have the same crystal structure.

“Alloys are all around us,” said study co-author Janet Tate, a physicist at Oregon State University. “An example of an istostructural alloy is an LED; you have a semiconductor like aluminum gallium arsenide, dope it with a particular material and make it emit light, and change the color of the light by changing the relative concentration of aluminum and gallium.”

Structure and composition are the two means of controlling the behavior of materials, Tate said. Combining materials gives the alloy properties between those that the end members have on their own.

“If two materials have different structures, as you mix them together it’s not so clear which structure will win,” said Tate, the Dr. Russ and Dolores Gorman Faculty Scholar in the College of Science. “The two together want to take different structures, and so this is an extra way of tuning an alloy’s properties, a structural way. The transition between different crystal structures provides an additional degree of control.”

Tate and collaborators from around the world, including the National Renewable Energy Laboratory, published their findings in Science Advances.

“This is a very interesting piece of materials science that represents a somewhat uncharted area and it may be the beginning something quite important,” Tate said. “The heterostructural alloy concept had been known before, but it’s different enough that it hadn’t really been explored in a detailed phase diagram – the mapping of exactly how, at what temperature and what concentration, it goes from one structure to another.

“This paper is primarily the NERL’s theoretical work being supported by other collaborators’ experimental work,” Tate said. “Our involvement at OSU was in making one of the kinds of heterostructural alloys used in the research, the combination of tin sulfide and calcium sulfide.”

Tate and graduate student Bethany Matthews have been focusing on the semiconductor application.

“Tin sulfide is a solar cell absorber, and the addition of calcium sulfide changes the structure and therefore the electrical properties necessary for an absorber,” Tate said “Combining tin sulfide with calcium sulfide makes it more isotropic – properties being the same regardless of orientation – and that’s usually a useful thing in devices.”

In this study, thin-film synthesis confirmed the metastable phases of the alloys that had been predicted theoretically.

“Many alloys are metastable, not stable – if you gave them enough time and temperature, they’d eventually separate,” Tate said. “The way we make them, with pulsed laser deposition, we allow the unstable structure to form, then suppress the decomposition pathways that would allow them to separate; we don’t give them enough time to equilibrate.”

Metastable materials – those that are thermodynamically stable provided they are not subjected to large disturbances – are in general understudied, Tate said.

“When theorists predict properties, they tend to work with materials that are stable,” she said. “In general the stable compounds are easier to attack. The idea here with heterostructural alloys is that they give us a new handle, a new knob to turn to change and control materials’ properties.”

Today SEMI announced that the two-day Strategic Materials Conference (SMC) − devoted to materials technology and business drivers in the electronics supply chain − is slated for September 19-20 at San Jose’s Doubletree by Hilton Hotel. For over a decade, SMC has been the leading conference dedicated to electronic materials. The 2017 conference theme, Materials Accelerating Innovation, will delve into the demand drivers for new materials. A full conference agenda and registration details can be found here.

Electronic materials and processes will continue to enable the extension of semiconductor device development for the foreseeable future. SMC provides a comprehensive review of the economic and environmental influences, strategic and technical challenges, and regional trends. The conference also highlights opportunities in adjacent markets and basic research activities feeding the supply chain. Presentations by industry thought leaders, academics, and analysts will analyze technologies and trends enabling extension of innovative solutions in wafer processing. SMC 2017 sessions include:

  • Keynotes:
    • Mark Papermaster, CTO and senior VP, AMD
    • Dave Hemker, CTO and senior VP, Lam Research
    • Sunny Hui, senior VP, Semiconductor Manufacturing International Corp (SMIC)
  • Economic/Market Trends: The Consolidation Game (M&A), China, 200mm & More: Experts weigh in on trends in materials and semiconductor equipment growth, demand, and applications, as well as the impact of the global economy on the semiconductor market.
  • Process Challenges at 5nm & Beyond: Leading-edge transistor development is focused on scaling and connecting vertical structures for advanced designs bringing new process and material challenges, requiring collaboration across the semiconductor supply chain.
  • Universities − Innovation Drivers: University research has been key to enabling the industry’s exponential growth. As the industry faces daunting challenges, the role of university research in materials is more critical than ever.
  • The Future of Materials Market in China: Speakers from government, suppliers, and multi-nationals will discuss China’s semiconductor materials industry, government policies, growth opportunities, and best practices for operating in this expanding environment.
  • Materials Supply Chain Challenges in Adjacent Industries: Electronic devices take many forms beyond silicon. Flexible electronics, embedded memory, medical devices, automotive electronics, Flat Panel Displays, and OLEDs have unique challenges.
  • Heterogeneous Integration – Implications on Materials & Packaging: With 10nm fab budgets estimated at up to $10 billion, “sticker shock” has set in. Enter Heterogeneous Integration — integrating separately manufactured components into higher-level assemblies to enable expanded functionality at a lower cost than traditional scaling.
  • Panel Discussion – Business Strategy and Collaboration Model:  Panelists will address current and emerging material challenges through focused R&D Investment, collaboration throughout the vertical supply chain, and application of innovative business strategy to ensure win-win for all participating companies.

The Strategic Materials Conference attracts the key players from every segment of the semiconductor manufacturing industry. The conference provides comprehensive, in-depth content and exceptional networking opportunities for professionals who share strategic objectives for the electronics manufacturing ecosystem. To learn more and to register, visit www.semi.org/SMC.

A multi-institutional team led by the U.S. Department of Energy’s National Renewable Energy Laboratory (NREL) discovered a way to create new alloys that could form the basis of next-generation semiconductors.

Semiconductor alloys already exist-often made from a combination of materials with similar atomic arrangements-but until now researchers believed it was unrealistic to make alloys of certain constituents.

“Maybe in the past scientists looked at two materials and said I can’t mix those two. What we’re saying is think again,” said Aaron Holder, a former NREL post-doctoral researcher and now research faculty at the University of Colorado Boulder. Holder is corresponding author of a new paper in Science Advances titled Novel phase diagram behavior and materials design in heterostructural semiconductor alloys. “There is a way to do it.”

Scientists connected to the Center for Next Generation of Materials by Design (CNGMD) made the breakthrough and took the idea from theory to reality. An Energy Frontier Research Center, which is supported by the Energy Department’s Office of Science and researchers from NREL, the Colorado School of Mines, Harvard University, Lawrence Berkeley National Laboratory, Massachusetts Institute of Technology, Oregon State University, and SLAC National Accelerator Laboratory.

“It’s a really nice example of what happens when you bring different institutions with different capabilities together,” said Holder. His co-authors from NREL are Stephan Lany, Sebastian Siol, Paul Ndione, Haowei Peng, William Tumas, John Perkins, David Ginley, and Andriy Zakutayev.

A mismatch between atomic arrangements previously thwarted the creation of certain alloys. Researchers with CNGMD were able to create an alloy of manganese oxide (MnO) and zinc oxide (ZnO), even though their atomic structures are very different. The new alloy will absorb a significant fraction of natural sunlight, although separately neither MnO nor ZnO can. “It’s a very rewarding kind of research when you work as a team, predict a material computationally, and make it happen in the lab,” Lany said.

Using heat, blending a small percent of MnO with ZnO already is possible, but reaching a 1:1 mix would require temperatures far greater than 1,000 degrees Celsius (1,832 degrees Fahrenheit), and the materials would separate again as they cool.

The scientists, who also created an alloy of tin sulfide and calcium sulfide, deposited these alloys as thin films using pulsed laser deposition and magnetron sputtering. Neither method required such high temperatures. “We show that commercial thin film deposition methods can be used to fabricate heterostructural alloys, opening a path to their use in real-world semiconductor applications,” co-author Zakutayev said.

The research yielded a first look at the phase diagram for heterostructural alloys, revealing a predictive route for properties of other alloys along with a large area of metastability that keeps the elements combined. “The alloy persists across this entire space even though thermodynamically it should phase separate and decompose,” Holder said.

Zhe Fei pointed to the bright and dark vertical lines running across his computer screen. This nano-image, he explained, shows the waves associated with a half-light, half-matter quasiparticle moving inside a semiconductor.

“These are waves just like water waves,” said Fei, an Iowa State University assistant professor of physics and astronomy and an associate of the U.S. Department of Energy’s Ames Laboratory. “It’s like dropping a rock on the surface of water and seeing waves. But these waves are exciton-polaritons.”

This image shows how researchers launched and studied half-light, half-matter quasiparticles called exciton-polaritons. A laser from the top left shines on the sharp tip of a nano-imaging system aimed at a flat semiconductor. The red circles inside the semiconductor are the waves associated with the quasiparticles. Image courtesy of Zhe Fei/Iowa State University

This image shows how researchers launched and studied half-light, half-matter quasiparticles called exciton-polaritons. A laser from the top left shines on the sharp tip of a nano-imaging system aimed at a flat semiconductor. The red circles inside the semiconductor are the waves associated with the quasiparticles. Image courtesy of Zhe Fei/Iowa State University

Exciton-polaritons are a combination of light and matter. Like all quasiparticles, they’re created within a solid and have physical properties such as energy and momentum. In this study, they were launched by shining a laser on the sharp tip of a nano-imaging system aimed at a thin flake of molybdenum diselenide (MoSe2), a layered semiconductor that supports excitons.

Excitons can form when light is absorbed by a semiconductor. When excitons couple strongly with photons, they create exciton-polaritons.

It’s the first time researchers have made real-space images of exciton-polaritons. Fei said past research projects have used spectroscopic studies to record exciton-polaritons as resonance peaks or dips in optical spectra. Until recent years, most studies have only observed the quasiparticles at extremely cold temperatures – down to about -450 degrees Fahrenheit.

But Fei and his research group worked at room temperature with the scanning near-field optical microscope in his campus lab to take nano-optical images of the quasiparticles.

“We are the first to show a picture of these quasiparticles and how they propagate, interfere and emit,” Fei said.

The researchers, for example, measured a propagation length of more than 12 microns – 12 millionths of a meter – for the exciton-polaritons at room temperature.

Fei said the creation of exciton-polaritons at room temperature and their propagation characteristics are significant for developing future applications for the quasiparticles. One day they could even be used to build nanophotonic circuits to replace electronic circuits for nanoscale energy or information transfer.

Fei said nanophotonic circuits with their large bandwidth could be up to 1 million times faster than current electrical circuits.

A research team led by Fei recently reported its findings in the scientific journal Nature Photonics. The paper’s first author is Fengrui Hu, an Iowa State postdoctoral research associate in physics and astronomy. Additional co-authors are Yilong Luan, an Iowa State doctoral student in physics and astronomy; Marie Scott, a recently graduated undergraduate at the University of Washington; Jiaqiang Yan and David Mandrus of Oak Ridge National Laboratory and the University of Tennessee; and Xiaodong Xu of the University of Washington.

The researchers’ work was supported by funds from Iowa State and the Ames Laboratory to launch Fei’s research program. The W.M. Keck Foundation of Los Angeles also partially supported the nano-optical imaging for the project.

The researchers also learned that by changing the thickness of the MoSe2 semiconductor, they could manipulate the properties of the exciton-polaritons.

Fei, who has been studying quasiparticles in graphene and other 2-D materials since his graduate school days at University of California San Diego, said his earlier work opened the doors for studies of exciton-polaritons.

“We need to explore further the physics of exciton-polaritons and how these quasiparticles can be manipulated,” he said.

That could lead to new devices such as polariton transistors, Fei said. And that could one day lead to breakthroughs in photonic and quantum technologies.

At this week’s 2017 Symposia on VLSI Technology and Circuits, imec, a research and innovation hub in nano-electronics and digital technology, reported record breaking values below 10^-9 Ohm.cm² for PMOS source/drain contact resistivity. These results were obtained through shallow Gallium implantation on p-SiliconGermanium (p-SiGe) source/drain contacts with subsequent pulsed nanosecond laser anneal.

In future N7/N5 nodes, the source/drain contact area of the transistors becomes so small that the contact resistance threatens to become the dominating parasitic factor, resulting in suboptimal transistor functioning. Researchers have therefore been working on techniques to reduce the contact resistance on highly doped n-Si and p-SiGe source/drain contacts, aiming for values below 10^-9 Ohm.cm². Together with colleagues from the KU Leuven (Belgium), Fudan University (Shanghai, China), and Applied Materials (Sunnyvale, USA), imec’s specialists concentrated on p-SiGe contacts, comparing the effects of high-dose Boron and Gallium doping.

For the comparison, the researchers implanted SiGe separate wafers with a high dose of Gallium or Boron and applied various anneal processes. They then fabricated multi-ring circular transmission line model structures, which are highly sensitive to contact resistance. Subsequent measurements revealed the lowest contact resistance for the Gallium-implanted structures annealed with Applied Material’s nanosecond laser anneal. This process uniquely causes a Ge/Ga surface segregation, which is responsible for the ultralow sub-10^-9 Ohm.cm² contact resistivity. This result show a possible way to process next-generation technology nodes.

Naoto Horiguchi, distinguished member of the technical staff at imec indicated: “This breakthrough achievement in our search to develop solutions for next generation deeply-scaled CMOS provides a possible path for further performance improvement using the current source/drain schemes in N7/N5 nodes.”

Imec’s research into advanced logic scaling is performed in cooperation with imec’s key partners in its core CMOS programs including GlobalFoundries, Huawei, Intel, Micron, Qualcomm, Samsung, SK Hynix, Sony Semiconductor Solutions and TSMC.

imec tin

By Paula Doe, SEMI

The future of contamination control in the next-generation supply chain for beyond 14nm-node semiconductor processes faces stringent challenges. While Moore’s Law is driving scale reduction, the industry is also facing ever-increasing process sensitivity, integration challenges of new materials and the need for unprecedented purity at process maturity.

“The supply chain needs a paradigm shift in thinking about defect control. What was just process variation for previous technology nodes can now be an excursion!” says Dr. Archita Sengupta, Intel senior GSM Technologist, leading the filtration and related supply chain contamination control program, who will discuss these challenges and possible solutions in the session on key materials issues at SEMICON West 2017 on July 11 in San Francisco at Moscone Center.

There are new materials being used for the first time, and even familiar materials need to be treated with new and different specifications. Even if the needed parameters are correctly specified, there may not be an accurate way to measure those parameters under HVM conditions, at least that most material suppliers can afford.  Chemicals, advanced filtration and purification, chemical delivery systems and equipment manufacturing can all be sources of wafer contamination. “The interaction between the tool and the chemicals is also increasingly important,” she notes. “All this is going to add more cost for the industry supply chain for quality control, but it will cost more in the end if we don’t proactively work together throughout the supply chain to figure out what matters to control and how!”

Stability is key

The most important thing material suppliers can do to meet customer quality demands is to maintain absolute stability of everything about their material and manufacturing process, suggests Jim Mulready, VP Global Quality Assurance, JSR Micro, who will also present at SEMICON West. “Traditional quality control, where the QC data at the end of my line only has to meet the customer’s specifications, doesn’t work,” he says, noting that the material supplier doesn’t have the same process tool, the same substrate, or the same process conditions as the customer, so the testing can’t duplicate the customer’s result. Moreover, the process sensitivity is getting tighter at every generation, with the tolerance of defects often being beyond the supplier’s ability to detect them. So, no specification can ever be precise enough to capture everything the customer really needs.  “Often tightening the specs doesn’t solve the problem,” he notes. “There are plenty of examples of material that was well within spec but didn’t function properly. The problem is not inadequate specs, it’s inadequate attention to other quality tools. The spec is necessary, but not sufficient.”

“The systematic (as opposed to technical) root cause of the material problems I faced as fab materials quality manager at Intel almost always came down to a problem in stability,” says Mulready, where there was a change to the material the supplier didn’t think was important, a change in the processing that they didn’t catch, or a change in the incoming raw material that they didn’t detect. “Material suppliers have to accept that the customers’ definition of quality becomes their definition of quality, and the main rule is to make sure that a material that’s working does not change at all. Consistency is the key for the end user, so it must be for us as well.  A spec alone will not measure or ensure that.  It takes robust change control, process control, and incoming raw material control.”

Semiconductor makers meanwhile, need to start paying attention not just to their immediate suppliers, but also to their suppliers’ supply chain; for example, not just the resist but also the resin and even the monomers used to make it. While the material suppliers need to qualify the incoming material, and serve as a kind of safety valve between the chemical industry and the IC makers, it can be difficult for them to control the supply quality when they are a very minor customer for the commodity chemical suppliers.  Those suppliers in turn may have no interest in investing in the tools needed to measure the particular properties of concern, and there may be a need for the IC customer to help inflict some pressure.

For more details on the SEMICON West 2017 Materials program, “Material Supply Challenges for Current and Future Leading-edge Devices,” organized by SEMI’s Chemical & Gas Manufacturers Group (CGMG), see www.semiconwest.org/programs-catalog/material-supply-leading-edge-devices. To see the full SEMICON West agenda, visit www.semiconwest.org/agenda-glance.

A team of researchers at the Israel Institute of Technology has developed a new capacitor with a metal-insulator-semiconductor (MIS) diode structure that is tunable by illumination. The capacitor, which features embedded metal nanoparticles, is similar to a metal-insulator-metal (MIM) diode, except that the capacitance of the new device depends on illumination and exhibits a strong frequency dispersion, allowing for a high degree of tunability.

This new capacitor has the potential to enhance wireless capability for information processing, sensing and telecommunications. The researchers report their findings this week in the Journal of Applied Physics, from AIP Publishing.

“We have developed a capacitor with the unique ability to tune the capacitance by large amounts using light. Such changes are not possible in any other device,” said Gadi Eisenstein, professor and director of the Russell Berrie Nanotechnology Institute at the Technion Israel Institute of Technology in Haifa and a co-author of the paper. “The observed photo sensitivity of this MIS diode structure expands its potential in optoelectronic circuits that can be used as a light-sensitive variable capacitor in remote sensing circuits.”

MIM diodes are common elements in electronic devices, especially those utilizing radio frequency circuits. They comprise thin-film metal plate electrodes that are separated by an insulator. Like the MIM structure, the researchers’ new MIS capacitor is bias independent, meaning the constant capacitance is independent of its supply voltage. Bias-independent capacitors are important for high linearity, and therefore straightforward predictability, of circuit performance.

“We have demonstrated that our MIS structure is superior to a standard MIM diode,” said Vissarion (Beso) Mikhelashvili, senior research fellow at the Israel Institute of Technology and also a co-author of the paper. “On one hand, it has all the features of an MIM device, but the voltage independent capacitance is tunable by light, which means that the tuning functionality can be incorporated in photonic circuits.”

“The illumination causes a twofold effect,” Eisenstein said. “First, the excitation of trap states enhances the internal polarization. Second, it increases the minority carrier density (due to photo generation) and reduces the depletion region width. This change modifies the capacitance.”

The researchers created three MIS structures, fabricated on a bulk silicon substrate, based on a multilayer dielectric stack, which consisted of a thin thermal silicon dioxide film and a hafnium oxide layer. The two layers were separated by strontium fluoride (SrF2) sublayers in which ferrum (Fe, iron) or cobalt (Co) nanoparticles were embedded.

The researchers found that the fluoridation-oxidation process of the iron atoms causes the formation of a gradient in the valence state of iron ions across the active layer, which results in the generation of an electronic polarization. The polarization causes a bias-independent depletion region and hence an MIM-type characteristic.

Four additional structures were prepared for comparison: Two lacked the SrF2 sublayers and one of them was prepared without the iron film. The other two structures contained SrF2: One did not have cobalt and the second included a one-nanometer Co layer.

The comparison with other MIS capacitors that contained the metal nanoparticles with or without the SrF2 sublayers led to the unequivocal conclusion that only devices consisting of the combination of Fe and SrF2 turn the MIS structure into a photo-sensitive MIM-like structure.

An engineer with the Erik Jonsson School of Engineering and Computer Science at The University of Texas at Dallas has designed a novel computing system made solely from carbon that might one day replace the silicon transistors that power today’s electronic devices.

“The concept brings together an assortment of existing nanoscale technologies and combines them in a new way,” said Dr. Joseph S. Friedman, assistant professor of electrical and computer engineering at UT Dallas who conducted much of the research while he was a doctoral student at Northwestern University.

The resulting all-carbon spin logic proposal, published by lead author Friedman and several collaborators in the June 5 issue of the online journal Nature Communications, is a computing system that Friedman believes could be made smaller than silicon transistors, with increased performance.

Today’s electronic devices are powered by transistors, which are tiny silicon structures that rely on negatively charged electrons moving through the silicon, forming an electric current. Transistors behave like switches, turning current on and off.

In addition to carrying a charge, electrons have another property called spin, which relates to their magnetic properties. In recent years, engineers have been investigating ways to exploit the spin characteristics of electrons to create a new class of transistors and devices called “spintronics.”

Friedman’s all-carbon, spintronic switch functions as a logic gate that relies on a basic tenet of electromagnetics: As an electric current moves through a wire, it creates a magnetic field that wraps around the wire. In addition, a magnetic field near a two-dimensional ribbon of carbon — called a graphene nanoribbon — affects the current flowing through the ribbon. In traditional, silicon-based computers, transistors cannot exploit this phenomenon. Instead, they are connected to one another by wires. The output from one transistor is connected by a wire to the input for the next transistor, and so on in a cascading fashion.

In Friedman’s spintronic circuit design, electrons moving through carbon nanotubes — essentially tiny wires composed of carbon — create a magnetic field that affects the flow of current in a nearby graphene nanoribbon, providing cascaded logic gates that are not physically connected.

Because the communication between each of the graphene nanoribbons takes place via an electromagnetic wave, instead of the physical movement of electrons, Friedman expects that communication will be much faster, with the potential for terahertz clock speeds. In addition, these carbon materials can be made smaller than silicon-based transistors, which are nearing their size limit due to silicon’s limited material properties.

“This was a great interdisciplinary collaborative team effort,” Friedman said, “combining my circuit proposal with physics analysis by Jean-Pierre Leburton and Anuj Girdhar at the University of Illinois at Urbana-Champaign; technology guidance from Ryan Gelfand at the University of Central Florida; and systems insight from Alan Sahakian, Allen Taflove, Bruce Wessels, Hooman Mohseni and Gokhan Memik at Northwestern.”

While the concept is still on the drawing board, Friedman said work toward a prototype of the all-carbon, cascaded spintronic computing system will continue in the interdisciplinary NanoSpinCompute research laboratory, which he directs at UT Dallas.