Category Archives: Process Materials

At this week’s IEEE IEDM conference, imec, the research and innovation hub in nano-electronics and digital technologies showed for the first time a silicon (Si)-passivated germanium (Ge) nMOS gate stack with dramatically reduced interface defect density (DIT) reaching the same level as a Si gate stack and with high mobility and reduced positive bias temperature instability (PBTI). These promising results pave the way to Ge-based finFETs and gate all-around devices, as promising options for 5nm and beyond logic devices.

Today’s results were achieved by band engineering using an interface dipole at high-k/SiO2 interface, and a H2 high-pressure anneal (HPA) finalizing the process flow. The interface dipole was formed on SiO2 layer by depositing a Lanthanum (La)SiO layer by atomic layer deposition (ALD), which is a 3D-compatible process. While a high DIT has been the leading concern for Si-passivated Ge nFET, it was dramatically reduced, for the first time, from 2×1012 cm-2eV-1 down to 5×1010 cm-2eV-1 around midgap using a combination of the LaSiO insertion and a H2 HPA. Consequently, electron mobility was increased (approximately 50 percent at peak) while PBTI reliability was improved thanks to the interface dipole-induced band engineering.

At IEEE IEDM, imec also presents a model for heterostructure interface resistivity (Rhi) analysis for highly doped semiconductors. Using this novel model, imec predicted that high-doping Si:P in a TiSix/Si:P/n-Ge contact stack helps to overcome the high contact resistance problem in Ge nMOS. With development of an advanced low-temperature Si:P epitaxy technique, imec demonstrated a TiSix/Si:P/n-Ge contact stack with record-low contact resistivity for n-Ge.

“Dedicated to push the boundaries of Moore’s Law, Ge-based devices are a key focus area or our research,” stated An Steegen, Executive Vice President Semiconductor Technology and Systems. “These breakthrough achievements underscore our dedication to understanding the fundamental roadblocks that need to be overcome in order for Ge-based devices to become a viable solution for 5nm and beyond.”

This work was performed in collaboration with ASM, Poongsan and Nanyang Technological University. Imec’s research into advanced logic scaling is performed in cooperation with imec’s key partners in its core CMOS programs including GlobalFoundries, Huawei, Intel, Micron, Qualcomm, Samsung, SK Hynix, Sony and TSMC.

Scientists often discover interesting things without completely understanding how they work. That has been the case with an experimental memory technology in which temperature and voltage work together to create the conditions for data storage. But precisely how was unknown.

But when a Stanford team found a way to untangle the chip’s energy and heat requirements, their tentative findings revealed a pleasant surprise: The process may be more energy efficient than was previously supposed. That’s good news for next-generation mobile devices whose batteries would last longer if they were powering lower energy chips.

The group that made this discovery, led by Stanford electrical engineer H.-S. Philip Wong, is presenting the paper when the IEEE International Electron Devices Meeting (IEDM) brings leading researchers to San Francisco Dec. 5.

The new technology the team investigated is called resistive random-access memory, or RRAM for short. RRAM is based on a new type of semiconductor material that forms digital zeros and ones by resisting or permitting the flow of electrons. RRAM has the potential to do things that aren’t possible with silicon: for instance, being layered on top of computer transistors in new three-dimensional, high-rise chips that would be faster and more energy efficient than current electronics, which is ideal for smartphones and other mobile devices where energy efficiency is a vital feature.

But while engineers can observe that RRAM does store data, they don’t know exactly how these new materials work. “We need much more precise information about the fundamental behavior of RRAM before we can hope to produce reliable devices,” Wong said.

Jolting memory

So to help engineers understand some of the unknowns, Wong’s team built a tool to measure the basic forces that make RRAM chips work.

Graduate student Zizhen Jiang of the Stanford team explained the basics: RRAM materials are insulators, which normally do not allow electricity to flow, she said. But under certain circumstances, insulators can be induced to let electrons flow. Past research had shown how: Jolting RRAM materials with an electric field causes a pathway to form that permitted electron flows. This pathway is called a filament. To break the filament, researchers apply another jolt and the material becomes an insulator again. So each jolt switched the RRAM from zero to one or back, which is what makes the material useful for data storage.

But electricity is not the only force at play in RRAM switching. Pumping electrons into any material raises its temperature. That’s the principle behind electric stoves. In the case of RRAM, it was the elevated temperature caused by introducing voltage that induced filaments to form or break. The question was what voltage-induced temperature was needed to cause the switching. No one knew.

Before the new Stanford study researchers thought short bursts of voltage, sufficient to generate temperatures of about 1,160 degrees Fahrenheit – hot enough to melt aluminum – was the switching point. But those were estimates because there was no way to measure the heat generated by an electric jolt.

“In order to begin to answer our questions, we had to decouple the effects of voltage and temperature on filament formation,” said Ziwen Wang, another graduate student on the team.

Dissecting the heat needs

Essentially, the Stanford researchers had to heat the RRAM material without using an electric field. So they put an RRAM chip on a micro thermal stage (MTS) device – a sophisticated hot plate capable of generating a wide range of temperatures inside the material. Of course the objective was not merely to heat the material, but also to measure how filaments formed. Here they took advantage of the fact that RRAM materials are insulators in their natural state. That makes them digital zeros. As soon as a filament formed electrons would flow. The digital zero would become a digital one, which the researchers could detect.

Using this experimental model, the team put RRAM chips on the burner and cranked up the heat, starting at about 80 F – roughly the temperature of a warm room – all the way up to 1,520 F, hot enough to melt a silver coin. Heating the RRAM to various temperatures in between these extremes, the researchers measured precisely if and how RRAM switched from its native zero to a digital one.

To their pleasant surprise, the researchers observed that filaments could form more efficiently at ambient temperatures between 80 F and 260 F, which is hotter than boiling water – contrary to prior expectation that hotter was better.

If confirmed by subsequent research, this would be good news because in a working chip the switching temperature would be created by the voltage and duration of the electric jolt. Efficient switching at lower temperatures would require less electricity and make RRAM more energy efficient and extend battery life when used as the memory in mobile devices.

Much work remains to be done to make RRAM memory practical but this research provides the test bed to vary conditions systematically instead of relying on hit-and-miss hunches.

“Now we can use voltage and temperature as design inputs in a predictive manner and that is going to enable us to design a better memory device,” Wang said.

Henry Chen, a Stanford alumnus who earned his PhD in Wang’s lab, gave this research a big assist and was a co-author on the paper. Chen, now with the Chinese memory chip-manufacturing firm GigaDevices Semiconductor Inc., helped develop the concepts and instruments that enabled the researchers to make the measurements being reported at IEDM.

In electronics, lower power consumption leads to operation cost savings, environmental benefits and the convenience advantages from longer running devices. While progress in energy efficiencies has been reported with alternative materials such as SiC and GaN, energy-savings in the standard inexpensive and widely used silicon devices are still keenly sought. K Tsutsui at Tokyo Institute of Technology and colleagues in Japan have now shown that by scaling down size parameters in all three dimensions their device they can achieve significant energy savings.

Tsutsui and colleagues studied silicon insulated gate bipolar transistors (IGBTs), a fast-operating switch that features in a number of every day appliances. While the efficiency of IGBTs is good, reducing the ON resistance, or the voltage from collector to emitter required for saturation (Vce(sat)), could help increase the energy efficiency of these devices further.

Previous investigations have highlighted that increases in the “injection enhancement (IE) effect”, which give rise to more charge carriers, leads to a reduction in Vce(sat). Although this has been achieved by reducing the mesa width in the device structure, the mesa resistance was thereby increased as well. Reducing the mesa height could help counter the increased resistance but is prone to impeding the (IE) effect. Instead the researchers reduced the mesa width, gate length, and the oxide thickness in the MOSFET to increase the IE effect and so reduce Vce(sat) from 1.70 to 1.26 V. With these alterations the researchers also used a reduced gate voltage, which has advantages for CMOS integration.

They conclude, “It was experimentally confirmed for the first time that significant Vce(sat) reduction can be achieved by scaling the IGBT both in the lateral and vertical dimensions with a decrease in the gate voltage.”

A simple solution-based electrical doping technique could help reduce the cost of polymer solar cells and organic electronic devices, potentially expanding the applications for these technologies. By enabling production of efficient single-layer solar cells, the new process could help move organic photovoltaics into a new generation of wearable devices and enable small-scale distributed power generation.

polymer-solar_2021

Developed by researchers at the Georgia Institute of Technology and colleagues from three other institutions, the technique provides a new way of inducing p-type electrical doping in organic semiconductor films. The process involves briefly immersing the films in a solution at room temperature, and would replace a more complex technique that requires vacuum processing.

“Our hope is that this will be a game-changer for organic photovoltaics by further simplifying the process for fabricating polymer-based solar cells,” said Bernard Kippelen, director of Georgia Tech’s Center for Organic Photonics and Electronics and a professor in the School of Electrical and Computer Engineering. “We believe this technique is likely to impact many other device platforms in areas such as organic printed electronics, sensors, photodetectors and light-emitting diodes.”

Sponsored by the Office of Naval Research, the work was reported December 5 in the journal Nature Materials. The research also involved scientists from the University of California at Santa Barbara, Kyushu University in Japan, and the Eindhoven University of Technology in The Netherlands.

The technique consists of immersing thin films of organic semiconductors and their blends in polyoxometalate (PMA and PTA) solutions in nitromethane for a brief time – on the order of minutes. The diffusion of the dopant molecules into the films during immersion leads to efficient p-type electrical doping over a limited depth of 10 to 20 nanometers from the surface of the film. The p-doped regions show increased electrical conductivity and high work function, reduced solubility in the processing solvent, and improved photo-oxidation stability in air.

This new method provides a simpler alternative to air-sensitive molybdenum oxide layers used in the most efficient polymer solar cells that are generally processed using expensive vacuum equipment. When applied to polymer solar cells, the new doping method provided efficient hole collection. For the first time, single-layer polymer solar cells were demonstrated by combining this new method with spontaneous vertical phase separation of amine-containing polymers that leads to efficient electron collection at the opposing electrode. The geometry of these new devices is unique as the functions of hole and electron collection are built into the light-absorbing active layer, resulting in the simplest single-layer geometry with few interfaces.

“The realization of single-layer photovoltaics with our approach enables both electrodes in the device to be made out of low-cost conductive materials,” said Canek Fuentes-Hernandez, a senior research scientist in Kippelen’s research group. “This offers a dramatic simplification of a device geometry, and it improves the photo-oxidation stability of the donor polymer. Although lifetime and cost analysis studies are needed to assess the full impact of these innovations, they are certainly very exciting developments on the road to transform organic photovoltaics into a commercial technology.”

By simplifying the production of organic solar cells, the new processing technique could allow fabrication of solar cells in areas of Africa and Latin America that lack capital-intensive manufacturing capabilities, said Felipe Larrain, a Ph.D. student in Kippelen’s lab.

“Our goal is to further simplify the fabrication of organic solar cells to the point at which every material required to fabricate them may be included in a single kit that is offered to the public,” Larrain said. “The solar cell product may be different if you are able to provide people with a solution that would allow them to make their own solar cells. It could one day enable people to power themselves and be independent of the grid.”

Organic solar cells have been studied in many academic and industrial laboratories for several decades, and have experienced a continuous and steady improvement in their power conversion efficiency with laboratory values reaching 13 percent – compared to around 20 percent for commercial silicon-based cells. Though polymer-based cells are currently less efficient, they require less energy to produce than silicon cells and can be more easily recycled at the end of their lifetime.

“Being able to process solar cells entirely at room temperature using this simple solution-based technique could pave the way for a scalable and vacuum-free method of device fabrication, while significantly reducing the time and cost associated with it,” said Vladimir Kolesov, a Ph.D. researcher and the paper’s lead author.

Beyond solar cells, the doping technique could be more broadly used in other areas of organic electronics, noted Ph.D. researcher Wen-Fang Chou. “With its simplicity, this is truly a promising technology offering adjustable conductivity of semiconductors that could be applied to various organic electronics, and could have huge impact on the industry for mass production.”

Also at Georgia Tech, the research involved professors Samuel Graham and Seth Marder, both from the Center for Organic Photonics and Electronics. Beyond Georgia Tech, the project also involved Naoya Aizawa from Kyushu University; Ming Wang, Guillermo Bazan and Thuc-Quyen Nguyen from the University of California Santa Barbara, and Alberto Perrotta from Eindhoven University of Technology.

All our smart phones have shiny flat AMOLED displays. Behind each single pixel of these displays hide at least two silicon transistors which were mass-manufactured using laser annealing technologies. While the traditional methods to make them uses temperatures above 1,000°C, the laser technique reaches the same results at low temperatures even on plastic substrates (melting temperature below 300°C). Interestingly, a similar procedure can be used to generate crystals of graphene. Graphene is a strong and thin nano-material made of carbon, its electric and heat-conductive properties have attracted the attention of scientists worldwide.

High-resolution transmission electron microscopy shows that after just one laser pulse of 30 nanoseconds, the silicon carbide (SiC) substrate is melted and separates into a carbon and a silicon layer. More pulses cause the carbon layer to organize into graphene and the silicon to leave as gas. Credit: IBS

High-resolution transmission electron microscopy shows that after just one laser pulse of 30 nanoseconds, the silicon carbide (SiC) substrate is melted and separates into a carbon and a silicon layer. More pulses cause the carbon layer to organize into graphene and the silicon to leave as gas. Credit: IBS

Prof. KEON Jae Lee’s research group at the Center for Multidimensional Carbon Materials within the Institute for Basic Science (IBS) and Prof. CHOI Sung-Yool’s team at KAIST discovered graphene synthesis mechanism using laser-induced solid-state phase separation of single-crystal silicon carbide (SiC). This study, available on Nature Communications, clarifies how this laser technology can separate a complex compound (SiC) into its ultrathin elements of carbon and silicon.

Although several fundamental studies understood the effect of excimer lasers in transforming elemental materials like silicon, the laser interaction with more complex compounds like SiC has rarely been studied due to the complexity of compound phase transition and ultra-short processing time.

With high resolution microscope images and molecular dynamic simulations, scientists found that a single-pulse irradiation of xenon chloride excimer laser of 30 nanoseconds melts SiC, leading to the separation of a liquid SiC layer, a disordered carbon layer with graphitic domains (about 2.5 nm thick) on top surface and a polycrystalline silicon layer (about 5 nm) below carbon layer. Giving additional pulses causes the sublimation of the separated silicon, while the disordered carbon layer is transformed into a multilayer graphene.

“This research shows that the laser material interaction technology can be a powerful tool for next generation of two dimensional nanomaterials,” said Prof. Keon. Prof. Choi added: “Using laser-induced phase separation of complex compounds, new types of two dimensional materials can be synthesized in the future.” IBS Prof. Keon is affiliated with the School of Materials Science and Engineering, KAIST and Prof. Choi with the School of Electrical Engineering and Graphene Research Center, KAIST.

University of Texas at Dallas physicists have published new findings examining the electrical properties of materials that could be harnessed for next-generation transistors and electronics.

Dr. Fan Zhang, assistant professor of physics, and senior physics student Armin Khamoshi recently published their research on transition metal dichalcogenides, or TMDs, in the journal Nature Communications. Zhang is a co-corresponding author, and Khamoshi is a co-lead author of the paper, which also includes collaborating scientists at Hong Kong University of Science and Technology.

In recent years, scientists and engineers have become interested in TMDs in part because they are superior in many ways to graphene, a one-atom thick, two-dimensional sheet of carbon atoms arranged in a lattice. Since it was first isolated in 2004, graphene has been investigated for its potential to replace conventional semiconductors in transistors, shrinking them even further in size. Graphene is an exceptional conductor, a material in which electrons move easily, with high mobility.

“It was thought that graphene could be used in transistors, but in transistors, you need to be able to switch the electric current on and off,” Zhang said. “With graphene, however, the current cannot be easily switched off.”

Beyond Graphene

In their search for alternatives, scientists and engineers have turned to TMDs, which also can be made into thin, two-dimensional sheets, or monolayers, just a few molecules thick.

“TMDs have something graphene does not have — an energy gap that allows the flow of electrons to be controlled, for the current to be switched on and off,” Khamoshi said. “This gap makes TMDs ideal for use in transistors. TMDs are also very good absorbers of circularly polarized light, so they could be used in detectors. For these reasons, these materials have become a very popular topic of research.”

One of the challenges is to optimize and increase electron mobility in TMD materials, a key factor if they are to be developed for use in transistors, Khamoshi said.

In their most recent project, Zhang and Khamoshi provided the theoretical work to guide the Hong Kong group on the layer-by-layer construction of a TMD device and on the use of magnetic fields to study how electrons travel through the device. Each monolayer of TMD is three molecules thick, and the layers were sandwiched between two sheets of boron nitride molecules.

The behavior of electrons controls the behavior of these materials,” Zhang said. “We want to make use of highly mobile electrons, but it is very challenging. Our collaborators in Hong Kong made significant progress in that direction by devising a way to significantly increase electron mobility.”

The team discovered that how electrons behave in the TMDs depends on whether an even or odd number of TMD layers were used.

“This layer-dependent behavior is a very surprising finding,” Zhang said. “It doesn’t matter how many layers you have, but rather, whether there are an odd or even number of layers.”

Electron Physics

Because the TMD materials operate on the scale of individual atoms and electrons, the researchers incorporated quantum physics into their theories and observations. Unlike classical physics, which describes the behavior of large-scale objects that we can see and touch, quantum physics governs the realm of very small particles, including electrons.

On the size scale of everyday electrical devices, electrons flowing through wires behave like a stream of particles. In the quantum world, however, electrons behave like waves, and the electrical transverse conductance of the two-dimensional material in the presence of a magnetic field is no longer like a stream — it changes in discrete steps, Zhang said. The phenomenon is called quantum Hall conductance.

“Quantum Hall conductance might change one step by one step, or two steps by two steps, and so on,” he said. “We found that if we used an even number of TMD layers in our device, there was a 12-step quantum conductance. If we applied a strong enough magnetic field to it, it would change by six steps at a time.”

Using an odd number of layers combined with a low magnetic field also resulted in a 6-step quantum Hall conductance in the TMDs, but under stronger magnetic fields, it became a 3-step by 3-step phenomenon.

“The type of quantum Hall conductance we predicted and observed in our TMD devices has never been found in any other material,” Zhang said. “These results not only decipher the intrinsic properties of TMD materials, but also demonstrate that we achieved high electron mobility in the devices. This gives us hope that we can one day use TMDs for transistors.”

They’re flexible, cheap to produce and simple to make – which is why perovskites are the hottest new material in solar cell design. And now, engineers at Australia’s University of New South Wales in Sydney have smashed the trendy new compound’s world efficiency record.

Dr. Anita Ho-Baillie, a Senior Research Fellow at the Australian Centre for Advanced Photovoltaics at UNSW, with the new perovskite cell. Credit: Rob Largent/UNSW

Dr. Anita Ho-Baillie, a Senior Research Fellow at the Australian Centre for Advanced Photovoltaics at UNSW, with the new perovskite cell. Credit: Rob Largent/UNSW

Speaking at the Asia-Pacific Solar Research Conference in Canberra on Friday 2 December, Anita Ho-Baillie, a Senior Research Fellow at the Australian Centre for Advanced Photovoltaics (ACAP), announced that her team at UNSW has achieved the highest efficiency rating with the largest perovskite solar cells to date.

The 12.1% efficiency rating was for a 16 cm2 perovskite solar cell, the largest single perovskite photovoltaic cell certified with the highest energy conversion efficiency, and was independently confirmed by the international testing centre Newport Corp, in Bozeman, Montana. The new cell is at least 10 times bigger than the current certified high-efficiency perovskite solar cells on record.

Her team has also achieved an 18% efficiency rating on a 1.2 cm2 single perovskite cell, and an 11.5% for a 16 cm2 four-cell perovskite mini-module, both independently certified by Newport.

“This is a very hot area of research, with many teams competing to advance photovoltaic design,” said Ho-Baillie. “Perovskites came out of nowhere in 2009, with an efficiency rating of 3.8%, and have since grown in leaps and bounds. These results place UNSW amongst the best groups in the world producing state-of-the-art high-performance perovskite solar cells. And I think we can get to 24% within a year or so.”

Perovskite is a structured compound, where a hybrid organic-inorganic lead or tin halide-based material acts as the light-harvesting active layer. They are the fastest-advancing solar technology to date, and are attractive because the compound is cheap to produce and simple to manufacture, and can even be sprayed onto surfaces.

“The versatility of solution deposition of perovskite makes it possible to spray-coat, print or paint on solar cells,” said Ho-Baillie. “The diversity of chemical compositions also allows cells be transparent, or made of different colours. Imagine being able to cover every surface of buildings, devices and cars with solar cells.”

Most of the world’s commercial solar cells are made from a refined, highly purified silicon crystal and, like the most efficient commercial silicon cells (known as PERC cells and invented at UNSW), need to be baked above 800°C in multiple high-temperature steps. Perovskites, on the other hand, are made at low temperatures and 200 times thinner than silicon cells.

But although perovskites hold much promise for cost-effective solar energy, they are currently prone to fluctuating temperatures and moisture, making them last only a few months without protection. Along with every other team in the world, Ho-Baillie’s is trying to extend its durability. Thanks to what engineers learned from more than 40 years of work with layered silicon, they’re are confident they can extend this.

Nevertheless, there are many existing applications where even disposable low-cost, high-efficiency solar cells could be attractive, such as use in disaster response, device charging and lighting in electricity-poor regions of the world. Perovskite solar cells also have the highest power to weight ratio amongst viable photovoltaic technologies.

“We will capitalise on the advantages of perovskites and continue to tackle issues important for commercialisation, like scaling to larger areas and improving cell durability,” said Martin Green, Director of the ACAP and Ho-Baillie’s mentor. The project’s goal is to lift perovskite solar cell efficiency to 26%.

The research is part of a collaboration backed by $3.6 million in funding through the Australian Renewable Energy Agency’s (ARENA) ‘solar excellence’ initiative. ARENA’s CEO Ivor Frischknecht said the achievement demonstrated the importance of supporting early stage renewable energy technologies: “In the future, this world-leading R&D could deliver efficiency wins for households and businesses through rooftop solar as well as for big solar projects like those being advanced through ARENA’s investment in large-scale solar.”

To make a perovskite solar cells, engineers grow crystals into a structure known as ‘perovskite’, named after Lev Perovski, the Russian mineralogist who discovered it. They first dissolve a selection of compounds in a liquid to make the ‘ink’, then deposit this on a specialised glass which can conduct electricity. When the ink dries, it leaves behind a thin film that crystallises on top of the glass when mild heat is applied, resulting in a thin layer of perovskite crystals.

The tricky part is growing a thin film of perovskite crystals so the resulting solar cell absorbs a maximum amount of light. Worldwide, engineers are working to create smooth and regular layers of perovskite with large crystal grain sizes in order to increase photovoltaic yields.

Ho-Baillie, who obtained her PhD at UNSW in 2004, is a former chief engineer for Solar Sailor, an Australian company which integrates solar cells into purpose-designed commercial marine ferries which currently ply waterways in Sydney, Shanghai and Hong Kong.

A collaborative effort between research groups at the Technical University of Freiberg and the University of Siegen in Germany demonstrates that the physical properties of SrTiO3, or strontium titanate, in its single crystal form can be changed by a relatively simple electrical treatment. SrTi03 is a mineral often studied for its superconducting properties.

The treatment, described this week in Applied Physics Letters, from AIP Publishing, creates the effect known as piezoelectricity, where electricity results from mechanical stress, in the material which did not originally see piezoelectric effects. This could be extremely important as our technologically-oriented society makes ever-growing demands for new materials and unusual properties.

Crystalline materials are made of atoms and electrons, which arrange themselves in periodic patterns. The atomic structure of a crystal is similar to a piece of a cross-stitching pattern, but the scale is about ten million times smaller. While a cross-stitching technique might be tricky at first, once you learn the pattern, you just repeat the same stitches to fill the available space. Nature works much the same way in building crystals: it “learns” how to connect atoms with each other in a so-called unit cell and then repeats this building block to fill the space making a crystal lattice.

Looking at a crystal structure is somewhat like looking at fabric through a magnifying glass. Using a technique called X-ray diffraction, researchers apply external stimuli (e.g. stretch or an electric voltage) to a crystal and see how different connections (atomic “stitches”) respond.

“The idea for this work was born when I was giving a colloquium talk in TU Freiberg, presenting our new technique for time-resolved X-ray diffraction and investigating piezoelectric material. Our colleagues in Freiberg had been investigating artificially created near-surface volumes of SrTiO3 crystals, with properties different from the normal bulk SrTiO3,” said Semën Gorfman, a University of Siegen physicist.

The Siegen research team had developed unique experimental equipment to investigate crystal structures under a periodically varying field using X-ray diffraction that is mobile and can connect to any available instrument, such as a home-lab X-ray diffractometer or a synchrotron beamline.

“Since the measurements are non-routine, this experimental equipment makes our research truly unique and original,” Gorfman said. “It turned out that the technique developed at Siegen, was ideally matched to the research direction that the Freiberg team was working on, so we came up with the hypothesis to be tested (piezoelectricity in field-modified near surface phase of SrTiO3 crystal), and a suggested experimental method (stroboscopic time-resolved X-ray diffraction), performed the experiment and got results.”

This work shows that new physical properties can be created artificially, reporting the piezoelectric effect in the artificially designed new phase of SrTiO3, a material that is not piezoelectric under normal conditions.

“We believe that physical properties of migration field induced polar phase in SrTiO3 opens a new and interesting chapter for research, Gorfman said. “The challenge now is to make the effect practical so that it can be used for devices.”

The global market for nanotubes was valued at $1,250.00 million in 2015 and is expected to grow at a CAGR of 17.9% during the forecast period 2016-2025. According to a recent report by Research and Markets, “Global Carbon Nanotubes Market – Segmented by Type, Application and Geography – Trends and Forecasts (2016 – 2025)”, the single-walled carbon nanotubes (SWTs) are expected to reach 689.35 million by 2018 with a CAGR of 22.5%.

Carbon nanotubes have high thermal conductivity, elasticity, tensile strength, absorbency, etc. as a result of which they have been widely used in the fields of nanotechnology, semiconductors, optics, etc. At present the carbon nanotubes account for about 28% market share of the total nanomaterial market. The production capacity of the carbon nanotubes is highest in the Asia-pacific region, followed by the North America and Europe. This domination of the Asia-pacific region is expected to continue as the demand for the carbon nanotubes is growing in the Asia-pacific region.

The global Carbon Nanotubes market is dominated by a few large suppliers/producers operating in multiple industry segments. The number of companies producing carbon nanotubes is expected to double in the next five years. Moreover, there is a lot of research being done regarding these nanotubes to enhance its properties. The number of publications being published about them has increased a lot over the last decade.

Asia-Pacific has the largest installed capacity of carbon nanotubes, mainly due to the significant presence of the electrical & electronics market in Japan, South Korea, Taiwan, China, and Singapore. Moreover, due to the industrialization and urbanization in the developing countries, the demand for the electronic products is increasing resulting in increasing usage of the carbon nanotubes. Hence a number of developing nations notably China and India, which due to their higher population levels, will potentially be large and profitable markets for the carbon nanotubes.

The growth of this market is mainly influenced by the development of the synthesis methods, advancement in the carbon nanotubes to enhance its properties and growing applications. The increasing demand for electronic & storage devices and in the energy sector, where carbon nanotubes find extensive applications, will drive the demand for the carbon nanotubes. The key challenge in this market is the high cost of production and purity of the carbon nanotubes. There is a baseline for the production of carbon nanotubes based on safety regulations, hence the productivity is less. Another challenge is with the difficulty in the acquirement of patents in nanotechnology.

Some of the key vendors of carbon nanotubes are CNano technology, Nanocyl, Covestro, Showa Denko, Arkema, carbon solutions, carbon NT&F, catalyx nanotech and CNT.

 

Controlling the flow of heat through semiconductor materials is an important challenge in developing smaller and faster computer chips, high-performance solar panels, and better lasers and biomedical devices.

For the first time, an international team of scientists led by a researcher at the University of California, Riverside has modified the energy spectrum of acoustic phonons– elemental excitations, also referred to as quasi-particles, that spread heat through crystalline materials like a wave–by confining them to nanometer-scale semiconductor structures. The results have important implications in the thermal management of electronic devices.

Led by Alexander Balandin, Distinguished Professor of Electrical and Computing Engineering and UC Presidential Chair Professor in UCR’s Bourns College of Engineering, the research is described in a paper published Thursday, Nov. 10, in the journal Nature Communications. The paper is titled “Direct observation of confined acoustic phonon polarization branches in free-standing nanowires.”

The team used semiconductor nanowires from Gallium Arsenide (GaAs), synthesized by researchers in Finland, and an imaging technique called Brillouin-Mandelstam light scattering spectroscopy (BMS) to study the movement of phonons through the crystalline nanostructures. By changing the size and the shape of the GaAs nanostructures, the researchers were able to alter the energy spectrum, or dispersion, of acoustic phonons. The BMS instrument used for this study was built at UCR’s Phonon Optimized Engineered Materials (POEM) Center, which is directed by Balandin.

Controlling phonon dispersion is crucial for improving heat removal from nanoscale electronic devices, which has become the major roadblock in allowing engineers to continue to reduce their size. It can also be used to improve the efficiency of thermoelectric energy generation, Balandin said. In that case, decreasing thermal conductivity by phonons is beneficial for thermoelectric devices that generate energy by applying a temperature gradient to semiconductors.

“For years, the only envisioned method of changing the thermal conductivity of nanostructures was via acoustic phonon scattering with nanostructure boundaries and interfaces. We demonstrated experimentally that by spatially confining acoustic phonons in nanowires one can change their velocity, and the way they interact with electrons, magnons, and how they carry heat. Our work creates new opportunities for tuning thermal and electronic properties of semiconductor materials,” Balandin said.