Category Archives: Process Materials

Researchers at the NYU Tandon School of Engineering have pioneered a method for growing an atomic scale electronic material at the highest quality ever reported. In a paper published in Applied Physics Letters, Assistant Professor of Electrical and Computer Engineering Davood Shahrjerdi and doctoral student Abdullah Alharbi detail a technique for synthesizing large sheets of high-performing monolayer tungsten disulfide, a synthetic material with a wide range of electronic and optoelectronic applications.

“We developed a custom reactor for growing this material using a routine technique called chemical vapor deposition. We made some subtle and yet critical changes to improve the design of the reactor and the growth process itself, and we were thrilled to discover that we could produce the highest quality monolayer tungsten disulfide reported in the literature,” said Shahrjerdi. “It’s a critical step toward enabling the kind of research necessary for developing next-generation transistors, wearable electronics, and even flexible biomedical devices.”

The promise of two-dimensional electronic materials has tantalized researchers for more than a decade, since the first such material — graphene — was experimentally discovered. Also called “monolayer” materials, graphene and similar two-dimensional materials are a mere one atom in thickness, several hundred thousand times thinner than a sheet of paper. These materials boast major advantages over silicon — namely unmatched flexibility, strength, and conductivity — but developing practical applications for their use has been challenging.

Graphene (a single layer of carbon) has been explored for electronic switches (transistors), but its lack of an energy band gap poses difficulties for semiconductor applications. “You can’t turn off the graphene transistors,” explained Shahrjerdi. Unlike graphene, tungsten disulfide has a sizeable energy band gap. It also displays exciting new properties: When the number of atomic layers increases, the band gap becomes tunable, and at monolayer thickness it can strongly absorb and emit light, making it ideal for applications in optoelectronics, sensing, and flexible electronics.

Efforts to develop applications for monolayer materials are often plagued by imperfections in the material itself — impurities and structural disorders that can compromise the movement of charge carriers in the semiconductor (carrier mobility). Shahrjerdi and his student succeeded in reducing the structural disorders by omitting the growth promoters and using nitrogen as a carrier gas rather than a more common choice, argon.

Shahrjerdi noted that comprehensive testing of their material revealed the highest values recorded thus far for carrier mobility in monolayer tungsten disulfide. “It’s a very exciting development for those of us doing research in this field,” he said.

As Francis Crick, one of Britain’s great scientists, once said: “If you want to understand function, study structure.” Within the realm of chemical physics, a clear example of this is the two forms of carbon — diamond and graphite. While they differ only in the atomic arrangement of atoms of a single element, their properties are quite different.

Differences between the properties of seemingly similar elements of a “family” can be intriguing. Carbon, silicon, germanium, tin and lead are all part of a family that share the same structure of their outermost electrons, yet range from acting as insulators (carbon) to semiconductors (silicon and germanium) to metals (tin and lead).

Is it possible to understand these and other trends within element families? In an article this week in The Journal of Chemical Physics, from AIP Publishing, a group of researchers from Peter Grünberg Institute (PGI) in Germany, and Tampere University of Technology and Aalto University in Finland, describe their work probing the relationship between the structure (arrangement of atoms) and function (physical properties) of a liquid metal form of the element bismuth.

“There are relatively few — less than 100 — stable elements, which means that their trends are often easier to discern than for those of alloys and compounds of several elements,” said Robert O. Jones, a scientist at PGI.

The group’s present work was motivated largely by the availability of high-quality experimental data — inelastic x-ray scattering (IXS) and neutron diffraction — and the opportunity to compare it with results for other liquids of the Group 15 nitrogen family (phosphorus, arsenic, antimony and bismuth). Phosphorus seems to have two liquid phases, and the amorphous form of antimony obtained by cooling the liquid crystallizes spontaneously and explosively.

Their structural studies use extensive numerical simulations run on one of the world’s most powerful supercomputers, JUQUEEN, in Jülich, Germany.

“We’re studying the motion of more than 500 atoms at specified temperatures to determine the forces on each atom and the total energy using density functional calculations,” Jones explained. “This scheme, for which Walter Kohn was awarded the 1998 Nobel Prize in chemistry, doesn’t involve adjustable parameters and has given valuable predictions in many contexts.” While density functional theory is in principle exact, it is necessary to utilize an approximate functional.

The positions and velocities of each atom, for example, are “stored at each step of a ‘molecular dynamics’ simulation, and we use this information to determine quantities that can be compared with experiment,” he continued. “It’s important to note that some quantities that are given directly by the simulation, such as the positions of the atoms, can only be inferred indirectly from the experiment, so that the two aspects are truly complementary.”

One of their most surprising and pleasing results was “the excellent agreement with recent IXS results,” Jones said. “One of the experimentalists involved noted that the agreement of our results with the IXS ‘is really quite beautiful,’ so that even small differences could provide additional information. In our experience, it’s unusual to find such detailed agreement.”

In terms of applications, the group’s work “provides further confirmation that simulations and experiments complement each other and that the level of agreement can be remarkably good — even for ‘real’ materials,” Jones pointed out. “However, it also shows that extensive, expensive, and time-consuming simulations are essential if detailed agreement is to be achieved.”

Jones and his colleagues have extended their approach to even longer simulations in liquid antimony at eight different temperatures, with the goal of understanding the “explosive” nature of crystallization in amorphous antimony (Sb).

“We’ve also run simulations of the crystallization of amorphous phase change materials over the timescale — up to 8 nanoseconds — that is physically relevant for DWD-RW and other optical storage materials,” he added, emphasizing that these types of simulations on computers today typically require many months. “They show, however, just how valuable they can be, and the prospects with coming generations of computers — with even better optimized algorithms — are very bright.”

The prospects of applications within other areas of materials science are extremely good, but the group is now turning its attention to memory materials of a different type — for which the formation and disappearance of a conducting bridge (a metallic filament) in a solid electrolyte between two electrodes could be the basis of future storage materials.

“Details of the mechanism of bridge formation are the subject of speculation, and we hope to provide insight into what really happens,” Jones said.

Engineers at the University of California San Diego have fabricated the first semiconductor-free, optically-controlled microelectronic device. Using metamaterials, engineers were able to build a microscale device that shows a 1,000 percent increase in conductivity when activated by low voltage and a low power laser.

The discovery paves the way for microelectronic devices that are faster and capable of handling more power, and could also lead to more efficient solar panels. The work was published Nov. 4 in Nature Communications.

The capabilities of existing microelectronic devices, such as transistors, are ultimately limited by the properties of their constituent materials, such as their semiconductors, researchers said.

For example, semiconductors can impose limits on a device’s conductivity, or electron flow. Semiconductors have what’s called a band gap, meaning they require a boost of external energy to get electrons to flow through them. And electron velocity is limited, since electrons are constantly colliding with atoms as they flow through the semiconductor.

A team of researchers in the Applied Electromagnetics Group led by electrical engineering professor Dan Sievenpiper at UC San Diego sought to remove these roadblocks to conductivity by replacing semiconductors with free electrons in space. “And we wanted to do this at the microscale,” said Ebrahim Forati, a former postdoctoral researcher in Sievenpiper’s lab and first author of the study.

However, liberating electrons from materials is challenging. It either requires applying high voltages (at least 100 Volts), high power lasers or extremely high temperatures (more than 1,000 degrees Fahrenheit), which aren’t practical in micro- and nanoscale electronic devices.

To address this challenge, Sievenpiper’s team fabricated a microscale device that can release electrons from a material without such extreme requirements. The device consists of an engineered surface, called a metasurface, on top of a silicon wafer, with a layer of silicon dioxide in between. The metasurface consists of an array of gold mushroom-like nanostructures on an array of parallel gold strips.

The gold metasurface is designed such that when a low DC voltage (under 10 Volts) and a low power infrared laser are both applied, the metasurface generates “hot spots”–spots with a high intensity electric field–that provide enough energy to pull electrons out from the metal and liberate them into space.

Tests on the device showed a 1,000 percent change in conductivity. “That means more available electrons for manipulation,” Ebrahim said.

“This certainly won’t replace all semiconductor devices, but it may be the best approach for certain specialty applications, such as very high frequencies or high power devices,” Sievenpiper said.

According to researchers, this particular metasurface was designed as a proof-of-concept. Different metasurfaces will need to be designed and optimized for different types of microelectronic devices.

“Next we need to understand how far these devices can be scaled and the limits of their performance,” Sievenpiper said. The team is also exploring other applications for this technology besides electronics, such as photochemistry, photocatalysis, enabling new kinds of photovoltaic devices or environmental applications.

Worldwide silicon wafer area shipments increased during the third quarter 2016 when compared to second quarter 2016 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its quarterly analysis of the silicon wafer industry.

Total silicon wafer area shipments were 2,730 million square inches during the most recent quarter, a 0.9 percent increase from the 2,706 million square inches shipped during the previous quarter. New quarterly total area shipments are 5.4 percent higher than third quarter 2015 shipments and are at their highest recorded quarterly level.

“Global silicon wafer demand continued to grow during this quarter,” said Dr. Volker Braetsch, chairman SEMI SMG and senior vice president of Siltronic AG. “Year-to-date shipments are trending slightly above the same period as last year.”

Silicon* Area Shipment Trends

Millions of Square Inches

3Q 

2015

2Q 

2016

3Q 

2016

Q1 + Q2 + Q3 

2016

Q1 + Q2 + Q3 

2015
Total

 

2,591

2,706

2,730

7,973

7,930

 

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

The Silicon Manufacturers Group acts as an independent special interest group within the SEMI structure and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi, etc.). The purpose of the group is to facilitate collective efforts on issues related to the silicon industry including the development of market information and statistics about the silicon industry and the semiconductor market.

Researchers at the Fraunhofer Institute for Solar Energy Systems ISE together with the Austrian company EV Group (EVG) have successfully manufactured a silicon-based multi-junction solar cell with two contacts and an efficiency exceeding the theoretical limit of silicon solar cells. For this achievement, the researchers used a “direct wafer bonding” process to transfer a few micrometers of III-V semiconductor material to silicon, a well-known process in the microelectronics industry. After plasma activation, the subcell surfaces are bonded together in vacuum by applying pressure. The atoms on the surface of the III-V subcell form bonds with the silicon atoms, creating a monolithic device. The efficiency achieved by the researchers presents a first-time result for this type of fully integrated silicon-based multi-junction solar cell. The complexity of its inner structure is not evident from its outer appearance: the cell has a simple front and rear contact just as a conventional silicon solar cell and therefore can be integrated into photovoltaic modules in the same manner.

Wafer-bonded III-V / Si multi-junction solar cell with 30.2 percent efficiency ©Fraunhofer ISE/A. Wekkeli

Wafer-bonded III-V / Si multi-junction solar cell with 30.2 percent efficiency ©Fraunhofer ISE/A. Wekkeli

“We are working on methods to surpass the theoretical limits of silicon solar cells,” says Dr. Frank Dimroth, department head at Fraunhofer ISE. “It is our long-standing experience with silicon and III-V technologies that has enabled us to reach this milestone today.” A conversion efficiency of 30.2 percent for the III-V / Si multi-junction solar cell of 4 cm² was measured at Fraunhofer ISE’s calibration laboratory. In comparison, the highest efficiency measured to date for a pure silicon solar cell is 26.3 percent, and the theoretical efficiency limit is 29.4 percent.

The III-V / Si multi-junction solar cell consists of a sequence of subcells stacked on top of each other. So-called “tunnel diodes” internally connect the three subcells made of gallium-indium-phosphide (GaInP), gallium-arsenide (GaAs) and silicon (Si), which span the absorption range of the sun’s spectrum. The GaInP top cell absorbs radiation between 300 and 670 nm. The middle GaAs subcell absorbs radiation between 500 and 890 nm and the bottom Si subcell between 650 and 1180 nm, respectively. The III-V layers are first epitaxially deposited on a GaAs substrate and then bonded to a silicon solar cell structure. Subsequently the GaAs substrate is removed, and a front and rear contact as well as an antireflection coating are applied.

“Key to the success was to find a manufacturing process for silicon solar cells that produces a smooth and highly doped surface which is suitable for wafer bonding as well as accounts for the different needs of silicon and the applied III-V semiconductors,” explains Dr. Jan Benick, team leader at Fraunhofer ISE.

“In developing the process, we relied on our decades of research experience in the development of highest efficiency silicon solar cells.” Institute Director Prof. Eicke Weber expresses his delight: “I am pleased that Fraunhofer ISE has so convincingly succeeded in breaking through the glass ceiling of 30 percent efficiency with its fully integrated silicon-based solar cell with two contacts. With this achievement, we have opened the door for further efficiency improvements for cells based on the long-proven silicon material.”

“The III-V / Si multi-junction solar cell is an impressive demonstration of the possibilities of our ComBond® cluster for resistance-free bonding of different semiconductors without the use of adhesives,” says Markus Wimplinger, Corporate Technology Development and IP Director at EV Group. “Since 2012, we have been working closely with Fraunhofer ISE on this development and today are proud of our team’s excellent achievements.” The direct wafer-bonding process is already used in the microelectronics industry to manufacture computer chips.

On the way to the industrial manufacturing of III-V / Si multi-junction solar cells, the costs of the III-V epitaxy and the connecting technology with silicon must be reduced. There are still great challenges to overcome in this area, which the Fraunhofer ISE researchers intend to solve through future investigations. Fraunhofer ISE’s new Center for High Efficiency Solar Cells, presently being constructed in Freiburg, will provide them with the perfect setting for developing next-generation III-V and silicon solar cell technologies. The ultimate objective is to make high efficiency solar PV modules with efficiencies of over 30 percent possible in the future.

The young researcher Dr. Romain Cariou carried out research on this project at Fraunhofer ISE with the support of a Marie Curie Postdoctoral Fellowship. Funding was provided by the EU project HISTORIC. The work at EVG was supported by the Austrian Ministry for Technology.

SunEdison Semiconductor Limited (NASDAQ:SEMI) (“SunEdison Semiconductor”) announced today that it has received notice that the Investment Committee of the Ministry of the Economic Affairs of the Republic of China has approved the proposed acquisition of SunEdison Semiconductor by GlobalWafers Co., Ltd. (“GlobalWafers”), and that the Austrian antitrust authority has concluded its review.  As a result, all pre-closing antitrust requirements have been completed.

As previously announced on August 17, 2016, GlobalWafers and SunEdison Semiconductor entered into a definitive agreement for the acquisition by GlobalWafers, through a wholly owned subsidiary, of all of the outstanding ordinary shares of SunEdison Semiconductor in an all-cash transaction valued at US$683 million, including SunEdison Semiconductor outstanding net indebtedness, pursuant to a scheme of arrangement under Singapore law.  Under the terms of the agreement, SunEdison Semiconductor shareholders will receive, upon consummation of the scheme of arrangement, US$12.00 per share in cash for each ordinary share.

Researchers from the Moscow Institute of Physics and Technology (MIPT), Technological Institute for Superhard and Novel Carbon Materials (TISNCM), Lomonosov Moscow State University (MSU), and the National University of Science and Technology MISiS have shown that an ultrastrong material can be produced by “fusing” multiwall carbon nanotubes together. The research findings have been published in Applied Physics Letters.

According to the scientists, a material of that kind is strong enough to endure very harsh conditions, making it useful for applications in the aerospace industry, among others.

The authors of the paper performed a series of experiments to study the effect of high pressure on multiwall carbon nanotubes (MWCNTs). In addition, they simulated nanotube behavior in high pressure cells, finding that the shear stress strain in the outer walls of the MWCNTs causes them to connect to each other as a result of the structural rearrangements on their outer surfaces. The inner concentric nanotubes, however, retain their structure completely: they simply shrink under pressure and restore their shape once the pressure is released.

The main feature of this study is that it demonstrates the possibility of covalent intertube bonding giving rise to interconnected (polymerized) multiwall nanotubes; these nanotubes being cheaper to produce than their single-wall counterparts.

“These connections between the nanotubes only affect the structure of the outer walls, whereas the inner layers remain intact. This allows us to retain the remarkable durability of the original nanotubes,” comments Prof. Mikhail Y. Popov of the Department of Molecular and Chemical Physics at MIPT, who heads the Laboratory of Functional Nanomaterials at TISNCM.

A shear diamond anvil cell (SDAC) was used for the pressure treatment of the nanotubes. The experiments were performed at pressures of up to 55 GPa, which is 500 times the water pressure at the bottom of the Mariana Trench. The cell consists of two diamonds, between which samples of a material can be compressed. The SDAC is different from other cell types in that it can apply a controlled shear deformation to the material by rotating one of the anvils. The sample in an SDAC is thus subjected to pressure that has both a hydrostatic and a shear component, i.e., the stress is applied both at a normal and parallel to its surface. Using computer simulations, the scientists found that these two types of stress affect the structure of the tubes in different ways. The hydrostatic pressure component alters the geometry of the nanotube walls in a complex manner, whereas the shear stress component induces the formation of sp³-hybridized amorphized regions on the outer walls, connecting them to the neighboring carbon tubes by means of covalent bonding. When the stress is removed, the shape of the inner layers of the connected multiwall tubes is restored.

Carbon nanotubes have a wide range of commercial applications by virtue of their unique mechanical, thermal and conduction properties. They are used in batteries and accumulators, tablet and smartphone touch screens, solar cells, antistatic coatings, and composite frames in electronics.

Adding hydrogen to graphene


November 3, 2016

Adding hydrogen to graphene could improve its future applicability in the semiconductor industry, when silicon leaves off. Researchers at the Center for Multidimensional Carbon Materials (CMCM), within the Institute for Basic Science (IBS) have recently gained further insight into this chemical reaction. Published in Journal of the American Chemical Society, these findings extend the knowledge of the fundamental chemistry of graphene and bring scientists perhaps closer to realizing new graphene-based materials.

The images show a graphene flake before (a), two minutes (b), and eight minutes (c), after exposure to a solution of lithium and liquid ammonia (Birch-type reaction). Graphene gets gradually hydrogenated starting from the edges. (Reprinted with permission from Zhang X. et al., JACS, Copyright 2016 American Chemical Society) Credit: IBS

The images show a graphene flake before (a), two minutes (b), and eight minutes (c), after exposure to a solution of lithium and liquid ammonia (Birch-type reaction). Graphene gets gradually hydrogenated starting from the edges. (Reprinted with permission from Zhang X. et al., JACS, Copyright 2016 American Chemical Society) Credit: IBS

Understanding how graphene can chemically react with a variety of chemicals will increase its utility. Indeed, graphene has superior conductivity properties, but it cannot be directly used as an alternative to silicon in semiconductor electronics because it does not have a bandgap, that is, its electrons can move without climbing any energy barrier. Hydrogenation of graphene opens a bandgap in graphene, so that it might serve as a semiconductor component in new devices.

While other reports describe the hydrogenation of bulk materials, this study focuses on hydrogenation of single and few-layers thick graphene. IBS scientists used a reaction based on lithium dissolved in ammonia, called the “Birch-type reaction”, to introduce hydrogen onto graphene through the formation of C-H bonds.

The research team discovered that hydrogenation proceeds rapidly over the entire surface of single-layer graphene, while it proceeds slowly and from the edges in few-layer graphene. They also showed that defects or edges are actually necessary for the reaction to occur under the conditions used, because pristine graphene with the edges covered in gold does not undergo hydrogenation.

Using bilayer and trilayer graphene, IBS scientists also discovered that the reagents can pass between the layers, and hydrogenate each layer equally well. Finally, the scientists found that the hydrogenation significantly changed the optical and electric properties of the graphene.

“A primary goal of our Center is to undertake fundamental studies about reactions involving carbon materials. By building a deep understanding of the chemistry of single-layer graphene and a few layer graphene, I am confident that many new applications of chemically functionalized graphenes could be possible, in electronics, photonics, optoelectronics, sensors, composites, and other areas,” notes Rodney Ruoff, corresponding author of this paper, CMCM director, and UNIST Distinguished Professor at the Ulsan National Institute of Science and Technology (UNIST).

Edwards, one of the world’s largest manufacturers of integrated vacuum and abatement solutions, and GlobalFoundries Singapore, a full-service semiconductor design, development, fabrication and innovation company, were recognized by Singapore’s National Environment Agency in the Best Practices category at the 2016 Energy Efficiency National Partnership (EENP) Awards. The agency uses the awards to foster a culture of sustained energy efficiency improvement in industry and encourage companies to adopt a proactive approach towards energy management by identifying and sharing best practices for other companies to emulate.

The joint project between GlobalFoundries and Edwards involved a redesign of 35 abatement units to reduce liquefied petroleum gas (LPG) consumption. Thermal abatement units are used to break down process gases for safe disposal into the atmosphere. The two companies worked together to reduce gas consumption while maintaining destruction efficiency and total abatement capacity by designing and retrofitting smaller, more efficient chambers and nozzles along with a longer weir. The changes reduced annual LPG consumption by 31%, carbon emissions by 640 tons, and annual energy costs by $200,000 USD.

“Reducing energy use is an important priority for GlobalFoundries. We carefully studied our energy cost allocation and identified LPG as a major cost contributor. We also noted that different size combustion chambers on our abatement systems consume different amounts of LPG. We then worked with our strategic partner, Edwards, to reduce the LPG consumption,” states Gu Zhi Min, GM and VP of Fab Management for GlobalFoundries Singapore.

According to Kirel Tang, Applications Knowledge Management Director at Edwards Singapore, “This award is recognition of Edwards’ initiatives in the area of controlling emissions and promoting energy efficiency. It validates the focus and efforts that we have put in so far, and confirms that we are making real progress.”

van der Pauw measurements with a parameter analyzer are examined followed by a look at Hall effects measurements.

BY MARY ANNE TUPTA, Keithley Instruments Product Line at Tektronix, Cleveland, OH

Semiconductor material research and device testing often involves determining the resistivity and Hall mobility of a sample. The resistivity of a particular semiconductor material primarily depends on the bulk doping used. In a device, the resistivity can affect the capacitance, the series resistance, and the threshold voltage, so it’s important to perform this measurement carefully and accurately.

The resistivity of the semiconductor material is often determined using a four-point probe or Kelvin technique where two of the probes are used to source current and the other two probes are used to measure voltage. Using four probes eliminates measurement errors due to probe resistance, spreading resistance under each probe, and contact resis- tance between each metal probe and the semiconductor material. Because a high impedance voltmeter draws little current, the voltage drops are very small.

One useful Kelvin technique for determining the resistivity of a semiconductor material is the van der Pauw (vdp) method using a parameter analyzer with high input impedance and accurate low current sourcing. This article first looks at van der Pauw measurements with a parameter analyzer followed by a look at Hall effects measurements.

van der Pauw resistivity measurements

The van der Pauw method involves applying a current and measuring voltage using four small contacts on the circumference of a flat, arbitrarily shaped sample of uniform thickness. This method is particularly useful for measuring very small samples because geometric spacing of the contacts is unimportant, meaning that effects due to a sample’s size are irrelevant.

Using this method, the resistivity is derived from a total of eight measurements that are made around the periphery of the sample using the configurations shown in FIGURE 1.

FIGURE 1. van der Pauw resistivity conventions.

FIGURE 1. van der Pauw resistivity conventions.

Once all the voltage measurements are taken, two values of resistivity, ρA and ρB, are derived as follows:

Equation 1

 

where: ρA and ρB are volume resistivities in ohm-cm

ts is the sample thickness in cm

V1–V8 represents the voltages measured by the voltmeter

I is the current through the sample in amperes

fA and fB are geometrical factors based on sample symmetry. They are related to the two resistance ratios QA and QB as shown in the following equations (fA = fB = 1 for perfect symmetry).

QA and QB are calculated using the measured voltages as follows:

Equation 2

Also, Q and f are related as follows:

Equation 3

A plot of this function is shown in FIGURE 2. The value of f can be found from this plot once Q has been calculated.

FIGURE 2. Plot of f vs. Q.

FIGURE 2. Plot of f vs. Q.

Once ρA and ρB are known, the average resistivity (ρAVG) can be determined as follows:

Equation 4

The electrical measurements for determining van der Pauw resistivity require a current source and a voltmeter. To automate measurements, it’s possible to use a programmable switch to switch the current source and the voltmeter to all sides of the sample. However, a parameter analyzer offers greater efficiency.

A parameter analyzer with four source measure units (SMU) and four preamps (for high resistance measurements) is well-suited for performing van der Pauw resis- tivity measurements, and enables measurements of resistances greater than 1012Ω. A key advantage is that each SMU instrument can be configured as a current source or as a voltmeter with no external switching required. This eliminates leakage and offsets errors caused by mechanical switches as well as the need for additional instruments and programming.

For high resistance materials, a current source that can output very small current with a high output impedance is necessary. A differential electrometer with high input impedance is required to minimize loading effects on the sample.

Each terminal of the sample is connected to one SMU instrument, so a parameter analyzer with four SMU instruments is required. A diagram of how the four SMUs are configured for each of the tests is shown in FIGURE 3. For each test, three of the SMU instruments are configured as a current bias and a voltmeter. One of the SMUs applies the test current and the other two SMUs are used as high impedance voltmeters with a test current of zero amps on a low current range (typically 1nA range). The fourth SMU instrument is set to common. The voltage difference is calculated between the two SMU instruments set up as high impedance voltmeters. This measurement setup is duplicated around the sample, with each of the four SMU instruments changing functions in each of the four tests. The test current and voltage differences between the terminals from the four tests are used to calculate resistivity.

FIGURE 3. SMU Instrument Configurations for van der Pauw Measurements.

FIGURE 3. SMU Instrument Configurations for van der Pauw Measurements.

For high resistance samples, it’s necessary to determine the settling time of the measurement. This is done by sourcing current into two terminals of the sample and measuring the voltage difference between the other two terminals. The settling time can be determined by graphing the voltage difference versus the time of the measurement. A timing graph of a very high resistance material is shown in FIGURE 4. Note that settling time needs to be determined every time for different materials; however, it’s not necessary for low resistance materials since they have a short settling time.

FIGURE 4. Voltage vs. time graph of a very high resistance sample.

FIGURE 4. Voltage vs. time graph of a very high resistance sample.

Hall voltage measurements

Hall effect measurements are important to semiconductor material characterization because from the Hall voltage, the conductivity type, carrier density, and mobility can be derived. With an applied magnetic field, the Hall voltage can be measured using the configurations shown in FIGURE 5.

FIGURE 5. Hall voltage measurement configurations.

FIGURE 5. Hall voltage measurement configurations.

With a positive magnetic field, B, current is applied between terminals 1 and 3, and the voltage drop (V2–4+) is measured between terminals 2 and 4. When the current is reversed, the voltage drop (V4–2+) is measured. Next, current is applied between terminals 2 and 4, and the voltage drop (V1–3+) between terminals 1 and 3 is measured. Then the current is reversed and the voltage (V3–1+) is measured again.

Then the magnetic field, B, is reversed and the procedure is repeated again, measuring the four voltages: (V2–4–), (V4–2–), (V1–3–), and (V3–1–).

From the eight Hall voltage measurements, the average Hall coefficient can be calculated as follows:

Equation 5

where: RHC and RHD are Hall coefficients in cm3/C

ts is the sample thickness in cm

V represents the voltages measured by the voltmeter

I is the current through the sample in amperes

B is the magnetic flux in Vs/cm2 (1 Vs/cm2 = 108 gauss)

Once RHC and RHD have been calculated, the average Hall coefficient (RHAVG) can be determined as follows:

Equation 6

From the resistivity (ρAVG) and the Hall coefficient (RHAVG), the mobility (μH) can be calculated:

Equation 7

For successful resistivity measurements, potential sources of errors need to be considered. Here are the errors sources you are most likely to encounter.

Electrostatic Interference — Electrostatic interference occurs when an electrically charged object is brought near an uncharged object. Usually, the effects of the interference are not noticeable because the charge dissi- pates rapidly at low resistance levels. However, high resis- tance materials do not allow the charge to decay quickly and unstable measurements may result. The erroneous readings may be due to either DC or AC electrostatic fields.

To minimize the effects of these fields, an electrostatic shield can be built to enclose the sensitive circuitry. The shield should be made from a conductive material and connected to the low impedance (FORCE LO) terminal of the test instrument. The cabling in the circuit must also be shielded.

Leakage Current — For high resistance samples, leakage current may degrade measurements. The leakage current is due to the insulation resistance of the cables, probes, and test fixturing.

Leakage current may be minimized by using good quality insulators, by reducing humidity, and by using guarding.

A guard is a conductor connected to a low impedance point in the circuit that is nearly at the same potential as the high impedance lead being guarded. Using triax cabling and fixturing will ensure that the high impedance terminal of the sample is guarded. The guard connection will also reduce measurement time since the cable capacitance will no longer affect the time constant of the measurement.

Light — Currents generated by photoconductive effects can degrade measurements, especially on high resistance samples. To prevent this, the sample should be placed in a dark chamber.

Temperature — Thermoelectric voltages may also affect measurement accuracy. Temperature gradients may result if the sample temperature is not uniform. Thermoelectric voltages may also be generated from sample heating caused by the source current. Heating from the source current will more likely affect low resistance samples, because a higher test current is needed to make the voltage measure- ments easier. Temperature fluctuations in the laboratory environment may also affect measurements. Because semiconductors have a relatively large temperature coeffi- cient, temperature variations in the laboratory may need to be compensated for by using correction factors.

Carrier Injection — To prevent minority/majority carrier injection from influencing resistivity measurements, the voltage difference between the two voltage sensing terminals should be kept at less than 100mV, ideally 25mV, since the thermal voltage, kt/q, is approximately 26mV. The test current should be kept as low as possible without affecting the measurement precision.

Conclusion

The van der Pauw technique in conjunction with a parameter analyzer is a proven method for determining the resistivity of very small samples because geometric spacing of the contacts is unimportant. Hall effect measurements are important to semiconductor material characterization for determining conductivity type, carrier density, and mobility. Some parameter analyzers may include built-in configurable tests that include the necessary calculations.

For successful measurements, it’s important to consider potential sources of error including electronics interference, leakage current and environmental factor such as light and temperature. Resistivity can impact the characteristics of a device, serving as reminder of the importance of making accurate and repeatable measurements.