Category Archives: Process Materials

Hokkaido University scientists are testing the development of solar cells made of solid materials to improve their ability to function under harsh environmental conditions.

Gold nanoparticles harvest light and provide a visible light response to the cell. Credit: Tomoya OSHIKIRI

Gold nanoparticles harvest light and provide a visible light response to the cell. Credit: Tomoya OSHIKIRI

Scientists at Hokkaido University in Japan are making leeway in the fabrication of all-solid-state solar cells that are highly durable and can efficiently convert sunlight into energy. The team employed a method called “atomic layer deposition”, which allows scientists to control the deposit of very thin, uniform layers of materials on top of each other. Using this method, they deposited a thin film of nickel oxide onto a single crystal of titanium dioxide. Gold nanoparticles were introduced between the two layers to act like an antenna that harvests visible light.

The team tested the properties of these fabricated devices with and without an intermediary step following the deposition of nickel oxide that involves heating it to very high temperatures and then allowing it to slowly cool – a process called “annealing”.

Photocurrent generation was successfully observed on the all-solid-state photoelectric conversion device. The device was found to be highly durable and stable because, unlike some solar cells, it does not contain organic components, which have a tendency to degrade over time and under harsh conditions.

The researchers also found that annealing affected the properties of the device by changing the interfacial structure of the layers. For example, it increased the voltage available from the device but also increased the resistance within it. It also decreased the device’s efficiency in converting light to electricity. The results suggest that the structural changes caused by annealing prevent the layer of gold nanoparticles from injecting electrons into the titanium dioxide layer.

The team’s fabrication process is inexpensive and can be scaled up easily but the resultant device’s properties are still insufficient for practical use and its efficiency in converting light to energy needs to be improved. Further research is needed to understand the roles of each layer in conducting energy to improve the device’s efficiency.

New fundamental research by UT Dallas physicists may accelerate the drive toward more advanced electronics and more powerful computers.

The scientists are investigating materials called topological insulators, whose surface electrical properties are essentially the opposite of the properties inside.

“These materials are made of the same thing throughout, from the interior to the exterior,” said Dr. Fan Zhang, assistant professor of physics at UT Dallas. “But, the interior does not conduct electrons — it’s an insulator — while the electrons on the surface are free to move around. The surface is therefore a conductor, like a metal, but it is in fact more robust than a metal.”

There are two types of topological insulators: strong and weak. The difference between them is subtle and involves complex physics, but is critically important.

“If you had a cube of material that is a strong topological insulator, all six faces can conduct electrons,” Zhang said. “For the weak one, only the four sides are conducting, while the top and bottom surfaces remain insulating.”

Strong topological insulators were made experimentally shortly after they were theoretically proposed. Zhang said they are common in nature, and several dozen variations have been identified and experimentally confirmed.

On the other hand, weak topological insulators have been more elusive. Scientists have proposed various ways to construct a weak topological insulator, but because of its distinctive properties, researchers have not been able to say definitively that they have experimentally produced one.

Zhang, a theoretical physicist, has devised a new way to make a weak topological insulator, one that involves a relatively simple mix of two chemical elements: a crystal composed of bismuth combined with either iodine or bromine. He and his colleagues published the research recently in the journal Physical Review Letters and presented their work at the March meeting of the American Physical Society.

In the 1970s, German scientists grew bismuth iodides and bismuth bromides, but they didn’t understand their potential as weak topological insulators, Zhang said.

“This class of materials we are proposing is a unique platform for exploring exotic physics with fairly simple chemistry,” he said. “With further research and experimentation, our findings could lead to significant advances in technology, especially in electronics and quantum computing.”

Electrically conductive materials are the fundamental building blocks of the traditional transistors that power electronic devices including cellphones and computers. Researchers are developing new theories and experiments with innovative physics and materials to create new transistor-like technologies that run devices and make computers more powerful.

With such exotic electrical properties, topological insulators offer a potential option, Zhang said.

“Our lives have been modified over time by our understanding of the conduction of electrons and the exploitation of this physics for use in electronic devices,” he said. “We now need to revolutionize transistors. One possible substitution is a so-called topological field effect transistor, which could be made of a thin film of a weak topological insulator.”

Computers also are heading for a fundamental redesign, and those efforts might be aided by Zhang’s research.

“The fundamental computing scale is now very limited,” he said. “For many applications, like weather forecasting and information encoding and decoding, today’s computers are way too slow. However, quantum computers have been proposed that would use the principles of quantum physics to compute exponentially faster than today’s computers.

“Weak topological insulators could make quantum computing feasible.”

As a theorist, Zhang used old-fashioned pencil and paper to construct the basis of his theory about the bismuth compounds. His postdoctoral researcher Dr. Cheng-Cheng Liu, the study’s lead author and now an assistant professor at Beijing Institute of Technology, then crunched specific numbers using high-speed supercomputers at the Texas Advanced Computing Center based at UT Austin.

Zhang’s UT Dallas colleague, Dr. Bing Lv, assistant professor of physics, has made samples of bismuth iodide.

“The next step will be to characterize the material to explore the unique properties that a weak topological insulator can offer to fundamental physics and to our everyday lives,” Zhang said.

A family of compounds known as perovskites, which can be made into thin films with many promising electronic and optical properties, has been a hot research topic in recent years. But although these materials could potentially be highly useful in applications such as solar cells, some limitations still hamper their efficiency and consistency.

Now, a team of researchers at MIT and elsewhere say they have made significant inroads toward understanding a process for improving perovskites’ performance, by modifying the material using intense light. The new findings are being reported in the journal Nature Communications, in a paper by Samuel Stranks, a researcher at MIT; Vladimir Bulovic, the Fariborz Maseeh (1990) Professor of Emerging Technology and associate dean for innovation; and eight colleagues at other institutions in the U.S. and the U.K. The work is part of a major research effort on perovskite materials being led by Stranks, within MIT’s Organic and Nanostructured Electronics Laboratory.

Tiny defects in perovskite’s crystalline structure can hamper the conversion of light into electricity in a solar cell, but “what we’re finding is that there are some defects that can be healed under light,” says Stranks, who is a Marie Curie Fellow jointly at MIT and Cambridge University in the U.K. The tiny defects, called traps, can cause electrons to recombine with atoms before the electrons can reach a place in the crystal where their motion can be harnessed.

Under intense illumination, the researchers found that iodide ions — atoms stripped of an electron so they carry an electric charge — migrated away from the illuminated region, and in the process apparently swept away most of the defects in that region along with them.

“This is the first time this has been shown,” Stranks says, “where just under illumination, where no [electric or magnetic] field has been applied, we see this ion migration that helps to clean the film. It reduces the defect density.” While the effect had been observed before, this work is the first to show that the improvement was caused by the ions moving as a result of the illumination.

This work is focused on particular types of the material, known as organic-inorganic metal halide perovskites, which are considered promising for applications including solar cells, light-emitting diodes (LEDs), lasers, and light detectors. They excel in a property called the photoluminescence quantum efficiency, which is key to maximizing the efficiency of solar cells. But in practice, the performance of different batches of these materials, or even different spots on the same film, has been highly variable and unpredictable. The new work was aimed at figuring out what caused these discrepancies and how to reduce or eliminate them.

Stranks explains that “the ultimate aim is to make defect-free films,” and the resulting improvements in efficiency could also be useful for applications in light emission as well as light capture.

Previous work reducing defects in thin-film perovskite materials has focused on electrical or chemical treatments, but “we find we can do the same with light,” Stranks says. One advantage of that is that the same technique used to improve the material’s properties can at the same time be used as a sensitive probe to observe and better understand the behavior of these promising materials.

Another advantage of this light-based processing is it doesn’t require anything to come in physical contact with the film being treated — for example, there is no need to attach electrical contacts or to bathe the material in a chemical solution. Instead, the treatment can simply be applied by turning on the source of illumination. The process, which they call photo-induced cleaning, could be “a way forward” for the development of useful perovskite-based devices, Stranks says.

The effects of the illumination tend to diminish over time, Stranks says, so “the challenge now is to maintain the effect” long enough to make it practical. Some forms of perovskites are already “looking to be commercialized by next year,” he says, and this research “raises questions that need to be addressed, but it also shows there are ways to address” the phenomena that have been limiting this material’s performance.

In 2010 the Nobel Prize in physics was awarded for the discovery of the exceptional material graphene, which consists of a single layer of carbon atoms arranged in a honeycomb lattice. But graphene research did not stop there. New interesting properties of this material are still being found. An international team of researchers has now explained the peculiar behaviour of electrons moving through narrow constrictions in a graphene layer. The results have been published in the journal Nature Communications.

Electron wave passing through a narrow constriction. Credit: TU Wien

Electron wave passing through a narrow constriction. Credit: TU Wien

The electron is a wave

“When electrical current flows through graphene, we should not imagine the electrons as little balls rolling through the material,” says Florian Libisch from TU Wien (Vienna), who led the theoretical part of the research project. The electrons swash through the graphene as a long wave front, the wavelength can be a hundred times larger than the space between two adjacent carbon atoms. “The electron is not confined to one particular carbon atom, in some sense it is located everywhere at the same time,” says Libisch.

The team studied the behaviour of electrons squeezing through a narrow constriction in a graphene sheet. “The wider the constriction, the larger the electron flux – but as it turns out, the relationship between the width of the constriction, the energy of the electrons and the electric current is quite complex,” says Florian Libisch. “When we make the constriction wider, the electric current does not increase gradually, it jumps at certain points. This is a clear indication of quantum effects.”

If the wavelength of the electron is so large that it does not fit through the constriction, the electron flux is very low. “When the energy of the electron is increased, its wavelength decreases,” explains Libisch. “At some point, one wavelength fits through the constriction, then two wavelengths, then three – this way the electron flux increases in characteristic steps.” The electric current is not a continuous quantity, it is quantized.

Theory and experiment

This effect can also be observed in other materials. Detecting it in graphene was much more difficult, because its complex electronic properties lead to a multitude of additional effects, interfering with each other. The experiments were performed at the group of Christoph Stampfer at the RWTH Aachen (Germany), theoretical calculations and computer simulations were performed in Vienna by Larisa Chizhova and Florian Libisch at the group of Joachim Burgdörfer.

For the experiments, the graphene sheets hat to be etched into shape with nanometre precision. “Protecting the graphene layer by sandwiching it between atomic layers of hexagonal boron nitride is critical for demonstrating the quantized nature of current in graphene,” explains Christoph Stampfer. Current through the devices is then measured at extremely low temperatures. “We use liquid helium to cool our samples, otherwise the fragile quantum effects are washed out by thermal fluctuations,” says Stampfer. Simulating the experiment poses just as much of a challenge. “A freely moving electron in the graphene sheet can occupy as many quantum states as there are carbon atoms,” says Florian Libisch, “more than ten million, in our case.” This makes the calculations extremely demanding. An electron in a hydrogen atom can be described using just a few quantum states. The team at TU Wien (Vienna) developed a large scale computer simulation and calculated the behaviour of the electrons in graphene on the Vienna Scientific Cluster VSC, using hundreds of processor cores in parallel.

Edge states

As it turns out, the edge of the graphene sheet plays a crucial role. “As the atoms are arranged in a hexagonal pattern, the edge can never be a completely straight line. On an atomic scale, the edge is always jagged,” says Florian Libisch. In these regions, the electrons can occupy special edge states, which have an important influence on the electronic properties of the material. “Only with large scale computer simulations using the most powerful scientific computer clusters available today, we can find out how these edge states affect the electrical current,” says Libisch. “The excellent agreement between the experimental results and our theoretical calculations shows that we have been very successful.”

The discovery of graphene opened the door to a new research area: ultrathin materials which only consist of very few atomic layers are attracting a lot of attention. Especially the combination of graphene and other materials – such as boron nitride, as in this case – is expected to yield interesting results. “One thing is for sure: whoever wants to understand tomorrow’s electronics has to know a lot about quantum physics,” says Florian Libisch.

Scientists have developed a new type of graphene-based transistor and using modelling they have demonstrated that it has ultralow power consumption compared with other similar transistor devices. The findings have been published in a paper in the journal Scientific Reports. The most important effect of reducing power consumption is that it enables the clock speed of processors to be increased. According to calculations, the increase could be as high as two orders of magnitude.

(A) Electron spectrum E(p) in bilayer graphene (left) and energy dependence of its density of states, DoS (right). At energy levels corresponding to the edge of the "Mexican hat" the DoS tends to infinity. (B) The red areas show the states of electrons that participate in tunneling in bilayer graphene (left) and in a conventional semiconductor with "ordinary" parabolic bands (right). Electrons that are capable of tunneling at low voltages are found in the ring in graphene, but in the semiconductor they are only found at the single point. The dotted lines indicate the tunneling transitions. The red lines indicate the trajectories of the tunneling electrons in the valence band.

(A) Electron spectrum E(p) in bilayer graphene (left) and energy dependence of its density of states, DoS (right). At energy levels corresponding to the edge of the “Mexican hat” the DoS tends to infinity. (B) The red areas show the states of electrons that participate in tunneling in bilayer graphene (left) and in a conventional semiconductor with “ordinary” parabolic bands (right). Electrons that are capable of tunneling at low voltages are found in the ring in graphene, but in the semiconductor they are only found at the single point. The dotted lines indicate the tunneling transitions. The red lines indicate the trajectories of the tunneling electrons in the valence band.

“The point is not so much about saving electricity – we have plenty of electrical energy. At a lower power, electronic components heat up less, and that means that they are able to operate at a higher clock speed – not one gigahertz, but ten for example, or even one hundred,” says the corresponding author of the study, the head of MIPT’s Laboratory of Optoelectronics and Two-Dimensional Materials, Dmitry Svintsov.

Building transistors that are capable of switching at low voltages (less than 0.5 volts) is one of the greatest challenges of modern electronics. Tunnel transistors are the most promising candidates to solve this problem. Unlike in conventional transistors, where electrons “jump” through the energy barrier, in tunnel transistors the electrons “filter” through the barrier due to the quantum tunneling effect. However, in most semiconductors the tunneling current is very small and this prevents transistors that are based on these materials from being used in real circuits.

The authors of the article, scientists from the Moscow Institute of Physics and Technology (MIPT), the Institute of Physics and Technology RAS, and Tohoku University (Japan), proposed a new design for a tunnel transistor based on bilayer graphene, and using modelling, they proved that this material is an ideal platform for low-voltage electronics.

Graphene, which was created by MIPT alumni Sir Andre Geim and Sir Konstantin Novoselov, is a sheet of carbon that is one atom thick. As it has only two dimensions, the properties of graphene, including its electronic properties, are radically different to three-dimensional carbon – graphite.

“Bilayer graphene is two sheets of graphene that are attached to one another with ordinary covalent bonds. It is as easy to make as monolayer graphene, but due to the unique structure of its electronic bands, it is a highly promising material for low-voltage tunneling switches,” says Svintsov.

Bands of bilayer graphene, i.e. the allowed energy levels of an electron at a given value of momentum, are in the shape of a “Mexican hat” (fig. 1A, compare this to the bands of most semiconductors which form a parabolic shape). It turns out that the density of electrons that can occupy spaces close to the edges of the “Mexican hat” tends to infinity – this is called a van Hove singularity. With the application of even a very small voltage to the gate of a transistor, a huge number of electrons at the edges of the “Mexican hat” begin to tunnel at the same time. This causes a sharp change in current from the application of a small voltage, and this low voltage is the reason for the record low power consumption.

In their paper, the researchers point out that until recently, van Hove singularity was barely noticeable in bilayer graphene – the edges of the “Mexican hat” were indistinct due to the low quality of the samples. Modern graphene samples on hexagonal boron nitride (hBN) substrates are of much better quality, and pronounced van Hove singularities have been experimentally confirmed in the samples using scanning probe microscopy and infrared absorption spectroscopy.

An important feature of the proposed transistor is the use of “electrical doping” (the field effect) to create a tunneling p-n junction. The complex process of chemical doping, which is required when building transistors on three-dimensional semiconductors, is not needed (and can even be damaging) for bilayer graphene. In electrical doping, additional electrons (or holes) occur in graphene due to the attraction towards closely positioned doping gates.

Under optimum conditions, a graphene transistor can change the current in a circuit ten thousand times with a gate voltage swing of only 150 millivolts.

“This means that the transistor requires less energy for switching, chips will require less energy, less heat will be generated, less powerful cooling systems will be needed, and clock speeds can be increased without the worry that the excess heat will destroy the chip,” says Svintsov.

Exagan, an innovator of gallium nitride (GaN) semiconductor technology that enables smaller and more efficient electrical converters, has begun a strategic partnership to develop and commercialize GaN-on-silicon products with HIREX Engineering, a company of Alter Technology Group (TÜV NORD GROUP’s Aerospace and Electronics Business Unit). TÜV NORD is a multi-national technical services provider to aerospace, industrial, mobile communications and IT markets. The partnership’s goal is to establish the reliability of GaN-on-silicon while also demonstrating to users the performance improvements to be gained and the low risk of integrating the energy-efficient technology in their own products.

Exagan will work closely with HIREX Engineering, a leader in reliability testing and qualification of ICs and discrete semiconductors for aerospace and industrial high-reliability applications. HIREX Engineering is located near Toulouse, France. Together, the companies will test and qualify Exagan’s G-FET products, which are fabricated with standard 200mm silicon processing and proprietary G-Stack technology. G-FETs are used in making smaller, more efficient power converters that have a broad range of applications in high-growth markets including plug-in hybrid and full-electric vehicles, solar energy and industrial applications as well as efficient charging of all mobile electronic devices.

“This dynamic partnership will help to propel GaN market development by pioneering test methodologies and measurement processes that make it easier for makers of electrical converters to implement GaN in improving their products,” said Frédéric Dupont, president and CEO of Exagan. “This timing is perfect to combine Exagan’s strengths with those of the top European specialist in high-reliability testing. GaN technology has matured to deliver the high performance of SiC (silicon carbide) devices at silicon ICs’ price and quality levels, and our key markets are ready for this next-generation solution.”

“Through its participation, HIREX Engineering will expand its expertise and business portfolio to include advanced power GaN technology and the end products it enables. We hope to establish robust and easy-to-reference product parameters for GaN that will allow fast integration in electrical converters,” said Luis Gomez, Alter Technology Group CEO.

“We are confident that GaN’s bulletproof reliability will present remarkable advantages in the fast-growing power electronics market,” said Dr. Guido Rettig, TÜV NORD GROUP CEO.

At the Quantum Europe conference, taking place in Amsterdam, Belgian’s nanoelectronincs research center imec announced today that it is ramping-up its R&D activities focused on quantum computing. Imec will implement qubits and supporting nanoelectronic functionality for quantum computing,leveraging its advanced silicon (Si) platform that was established within the framework of its industrial affiliation program with additional support from the EU through e.g. ECSEL projects SENATE and TAKE-5.

Widely seen as a possible solution to complex computing problems which are intractable on classical computers, quantum computing uses quantum physics to create and manipulate quantum states within electronic devices (qubits) to enhance the performance over that of existing, ‘classical’ approaches. Of the many device proposals for qubit implementation, the ones compatible with existing Si technology will provide the most viable solution for interfacing with the outside world.

The goal of imec’s initiative is to establish a bridge between the most advanced transistor technology and emerging quantum technology options, representing a natural extension of imec’s Si platform. This will ensure routes to demonstrate the quantum computing functionality compatible with industries’ platform technologies. Assuming a key position in the quantum technologies ecosystem, imec will support the transition of new quantum technologies, from the physics lab to technology feed into the supply chain. Imec’s platform will help translate laboratory demonstrators into commercial products. It will be open for universities, SMEs and industrial partners of imec’s quantum technologies programs.

“The coming decades will be characterized by a wave of quantum technology based applications, ranging from communication, simulation and sensing, to computation. However, to enable this, the industry will need technical support to adopt and to integrate these new technologies into products and services,” stated Jo De Boeck, CTO at imec. “Imec’s industry relevant Si platform for the advanced technology nodes, is currently used to screen technology options for the 5nm nodes and beyond. The same platform is hence the ideal basis to start implementing quantum devices as quantum effects are becoming the starting point of developing a quantum platform.”

Worldwide silicon wafer area shipments increased during the first quarter 2016 when compared to fourth quarter 2015 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its quarterly analysis of the silicon wafer industry.

Total silicon wafer area shipments were 2,538 million square inches during the most recent quarter, a 1.3 percent increase from the 2,504 million square inches shipped during the previous quarter. However, new quarterly total area shipments are 3.8 percent lower than first quarter 2015 shipments.

“After two quarters of negative silicon shipment volume growth, the increase in silicon volume shipments in the most recent quarter is encouraging,” said Dr. Volker Braetsch, chairman SEMI SMG and senior vice president of Siltronic AG. “It remains to be seen if silicon shipment volumes will exceed the record amount shipped last year.”

Quarterly Silicon* Area Shipment Trends

Millions of Square Inches

1Q-2015

4Q-2015

1Q-2016

Total

2,637

2,504

2,538

Shipments are for semiconductor applications only and do not include solar applications

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

By Debra Vogler, SEMI

The semiconductor industry is nothing if not persistent — it’s been working away at developing extreme ultraviolet lithography (EUVL) for many years. Though its production insertion target has slipped over the years, some say that the industry is getting closer to its introduction at the 5nm node. But it’s also true that some may be hedging their bets.

Whatever camp you fall into, the discussion is sure to be lively as a team of experts tackles the status of advanced lithography options that can get the industry from node 10 to node 5 (session “Lithography: Charting a Path, or Paths, between Nodes 10 and 5”, part of the Advanced Manufacturing Forum) at SEMICON West 2016 (July 12, 10:30am-12:30pm). Confirmed speakers for this event include Robert Aitken (ARM), Stephen Renwick (Nikon Research Corporation of America), Ben Rathsack (TEL), Mike Lercel (ASML), Mark Slezak (JSR Micro, Inc.), and Harry Levinson (GLOBALFOUNDRIES). The session will be moderated by Lithoguru’s Chris Mack. SEMI interviewed some of the session speakers to get a preview of the issues most likely to be addressed.

Equipment status

Mike Lercel, director of product marketing at ASML, told SEMI that his company is very confident that EUVL will be ready for next-generation nodes, having demonstrated progress on the NXE:3350B, which is intended for volume production: achieving 1,368 wafers per day at the ASML factory, and excellent imaging and overlay performance at >80W. He further noted that the company’s logic customers will take EUV into production in 2018-2019, so it needs to ship in volume a year before — likewise for DRAM. “We believe that EUV is cost-competitive around 1,500 good wafers per day, but the crossover point may be lower depending on the customer and the application.”

Having already achieved the productivity milestone of 1,368 wafers per day makes EUVL cost-competitive or break-even for many applications, said Lercel, primarily because multiple patterning is becoming too difficult and EUV is needed to reduce this complexity. “Additionally, we’ve exposed more than 300,000 wafers on multiple NXE:3300 scanners at customer sites and that has accelerated our rates of learning. A 125W EUV source setting has been qualified and is ready for field rollout, and we demonstrated 200W source power at ASML.” He also noted that the company has a robust EUVL product roadmap, including a high-NA EUV scanner, which will take it into the next decade and beyond. “As long as the industry continues to scale and we are not close to reaching devices’ physical limits, there will be a need for EUV.”

Lercel acknowledged that EUVL productivity must continue to be improved and throughput is closely connected to source power and tool reliability. “We’ve derived new understandings from plasma modeling and computational lithography that have enabled us to significantly increase our conversion efficiency,” said Lercel. “This was a key contributing factor in our latest 200W achievement and builds confidence in our ability to reach 250W by the end of the year, which is the source power required for 1,500 wafers per day.”

Materials and infrastructure for EUVL

There are still a number of challenges remaining for the infrastructure needed to support EUVL. Among them are actinic inspections for blanks and resists. “Deposition tools and post-pellicle mask inspection must catch up to support EUVL,” said Lercel, who told SEMI that notable progress has already been made on E-beam mask inspection high-volume manufacturing (HVM) tools and on an actinic blank inspection tool development program led by the EUVL Infrastructure Development Center (EIDEC).

In other developments reported by Lercel, Zeiss is working on an AIMS tool for defect disposition; and at imec’s EUV Resist Manufacturing & Qualification Center (EUV RMQC), the industry-wide manufacturing infrastructure and quality control capabilities needed to take EUVL into HVM are being finalized. Other R&D efforts are continuing to improve EUV blank quality process and yield — defects are now reaching single digits said Lercel. ASML is also in the process of commercializing a pellicle. Significant gaps still exist with respect to a blank multi-layer deposition tool that needs to have improved defect results. “Multiple deposition techniques are being evaluated to define the HVM tool approach,” said Lercel. “And post-pellicle mask inspection (APMI) is not on timeline for insertion,” so the industry needs other options.

Regarding EUVL resists, Mark Slezak, executive vice-president, at JSR Micro, Inc., told SEMI that short-term, the materials industry is continuing to evolve and improve chemically amplified systems that are allowing technical requirements to be met at 7nm (see Figure 1 for examples of recent performance data). “Longer term, the industry is focused on new alternative approaches to chemically amplified systems with a variety of techniques, including molecular resists, nano-particles, and advanced sensitizers,” said Slezak, who will also present at SEMICON West 2016. “Additionally, in the case of both 193i and EUV, the material industry is working on post-development solutions, such as chemical shrink, pattern collapse mitigation, and combinations with DSA (directed self-assembly) that enable further imaging extensions.”

Figure 1: Examples of recent progress in patterning materials.  Source: ASML, PSI, and imec

Figure 1: Examples of recent progress in patterning materials.
Source: ASML, PSI, and imec

As a company, JSR Micro is preparing to provide scaled-up EUV materials in a HVM setting, including advanced quality control, as early as the end of 2016, Slezak told SEMI. “However, we see that the most likely insertion point for significant volumes is in the 2018 time period.”

Overall outlook

Chris Mack summed up the industry’s current dilemma with respect to EUVL and getting from node 10 to node 5. “The whole idea of continuing on the Moore’s Law progression is to reduce the cost of a transistor by shrinking it,” Mack told SEMI. “We’ve seen a flattening of the cost/transistor trends over time lately, and I think there are some serious questions as to whether or not any specific new technology node from 10nm on will actually result in a lower cost/transistor — and if it doesn’t, there won’t be much motivation for designs to migrate to these nodes.”

Mack further observed that the cost of lithography already accounts for more than 50% of the cost of making a chip, and possibly even as high as 70% depending on the design. “As those costs escalate with each node, we worry that the cost savings won’t be enough to compensate for the higher design costs.” Citing conventional wisdom, Mack noted that the rule-of-thumb with respect to the break-even point for deciding to use EUVL is that it has to be able to cost-effectively replace three 193nm immersion steps (or masks). While there are a lot of assumptions that go into the cost-of-ownership models, Mack explained that if throughput levels can get to around 60-90wph, that would make one EUV layer cost-competitive with three 193nm immersion exposures. “I think most people agree that EUV would then be worthwhile to do. The hope is to be able to do that at the 5nm node.”

Aside from the actual technical challenges that remain to be solved before EUVL can be inserted into HVM, the major hurdle is time. “People are planning the 7nm logic node right now,” said Mack, “and no one is willing to commit to EUV for 7nm because it’s not ready.” He further explained that TSMC has said publicly it plans to exercise EUV in parallel with 193i manufacturing for the 7nm node and then implement EUV in manufacturing at the 5nm node. That would place it at around the 2020 time frame. “If EUV hits its schedule between now and 2018/2019, then we may see TSMC commit to using EUV at 5nm.” Conversely, if the EUV schedule slips and is still too risky to implement, then when 2019 comes around, it could very well be that EUVL will be pushed out even further. “Because foundries have to accept design rules about two years before manufacturing begins, and because the design rules for multiple-patterning 193 immersion are very different from single-patterning EUV, TSMC and other foundries will have to make their call about two years from now.”

For DRAM, Mack says there is still a desire for EUV to be successful, but the window is rapidly disappearing. “We might see more chip stacking as a solution going forward for DRAM,” said Mack, but “then we could see 193nm immersion SADP (single immersion double-patterning) for 20nm DRAM.” Below 20nm DRAM, If EUV isn’t ready, Mack says that chip stacking would be the solution, which leaves EUV for logic, primarily at 5nm.

“Here’s where an interesting phenomenon happens,” Mack told SEMI. “The classic view of Moore’s Law — a doubling of the number of components on a chip every two years — has been carrying on for over 50 years. Current trends are redefining the meaning of Moore’s Law (see Figure 2).”

The industry is seeing a slow-down in, i.e., 3-year cycles instead of 2-year cycles. “If that trend continues and EUV is late, that would give some breathing room for EUV to catch up. So it might be ready in time for the 5nm node.”

Figure 2: Moore’s Law trend. Courtesy: Chris Mack

Figure 2: Moore’s Law trend. Courtesy: Chris Mack

These speakers and more will present at SEMICON West 2016 (July 12-14) in San Francisco, Calif. The new SEMICON West offers eight forums: Extended Supply Chain, Advanced Manufacturing Chain Forum, Advanced Packaging Forum, Test Forum, Sustainable Manufacturing Forum, Silicon Innovation Forum, Flexible Hybrid Electronics Forum, and World of IoT Forum. Register before June 3 and save $50.

The future of movies and manufacturing may be in 3-D, but electronics and photonics are going 2-D; specifically, two-dimensional semiconducting materials.

One of the latest advancements in these fields centers on molybdenum disulfide (MoS2), a two-dimensional semiconductor that, while commonly used in lubricants and steel alloys, is still being explored in optoelectronics.

Recently, engineers placed a single layer of MoS2 molecules on top of a photonic structure called an optical nanocavity made of aluminum oxide and aluminum. (A nanocavity is an arrangement of mirrors that allows beams of light to circulate in closed paths. These cavities help us build things like lasers and optical fibers used for communications.)

The results, described in the paper “MoS2 monolayers on nanocavities: enhancement in light-matter interaction” published in April by the journal 2D Materials, are promising. The MoS2 nanocavity can increase the amount of light that ultrathin semiconducting materials absorb. In turn, this could help industry to continue manufacturing more powerful, efficient and flexible electronic devices.

“The nanocavity we have developed has many potential applications,” says Qiaoqiang Gan, PhD, assistant professor of electrical engineering in the University at Buffalo’s School of Engineering and Applied Sciences. “It could potentially be used to create more efficient and flexible solar panels, and faster photodetectors for video cameras and other devices. It may even be used to produce hydrogen fuel through water splitting more efficiently.”

A single layer of MoS2 is advantageous because unlike another promising two-dimensional material, graphene, its bandgap structure is similar to semiconductors used in LEDs, lasers and solar cells.

“In experiments, the nanocavity was able to absorb nearly 70 percent of the laser we projected on it. Its ability to absorb light and convert that light into available energy could ultimately help industry continue to more energy-efficient electronic devices,” said Haomin Song, a PhD candidate in Gan’s lab and a co-lead researcher on the paper.

Industry has kept pace with the demand for smaller, thinner and more powerful optoelectronic devices, in part, by shrinking the size of the semiconductors used in these devices.

A problem for energy-harvesting optoelectronic devices, however, is that these ultrathin semiconductors do not absorb light as well as conventional bulk semiconductors. Therefore, there is an intrinsic tradeoff between the ultrathin semiconductors’ optical absorption capacity and their thickness.

The nanocavity, described above, is a potential solution to this issue.