Category Archives: MEMS

SEMI today announced the “Call for Papers” for technical sessions and presentations for SEMICON Europa 2015 which takes place October 6-8 in Dresden, Germany. Technical presentation abstracts are due April 30.

SEMICON Europa 2015 will feature more than 100 hours of technical sessions and presentations focused on critical industry topics that are shaping the design and manufacturing of semiconductors, MEMS, printed and flexible electronics, and other related technologies.

Abstracts for presentations are now being accepted for:

  • 17th European Manufacturing Test Conference (EMTC): “Zero defect in shortest time to market and lowest cost –  is it possible?”
  • Advanced Packaging Conference:  “Interconnects in Miniaturized Systems”
  • Semiconductor Technology Conference: “Productivity Enhancements for future Technology Nodes”
  • Plastic Electronics Conference: Business Cases; Manufacturing; Technology/Materials

The SEMICON Europa abstract submission deadline is April 30.  Prospective presenters are invited to submit abstracts (1,000-2,000 characters). Material must be original, non-commercial and non-published. Abstracts must clearly detail the nature, scope, content, organization, key points and significance of the proposed presentation.  More information on how to submit your abstract is available on the “Call for Papers” homepage. Visit www.semiconeuropa.org or contact Christina Fritsch, SEMI Europe, at Tel. +49 30 3030 8077 18 or email [email protected].

Co-located with SEMICON Europa 2015, the Plastic Electronics Conference will also take place in Dresden from October 6-8.  From technology breakthrough to Innovative manufacturing in large area electronics and heterogeneous integrated smart systems to reports about the key manufacturing challenges and selected business cases across the sector, abstracts for presentations are now being accepted (until April 30) for: Technology and Materials; Manufacturing; and Business Cases. Visit www.plastic-electronics.org for more information.

China’s new industry investment and government promotion policies outlined in the recent “National Guidelines for Development and Promotion of the IC Industry” represents major opportunities for China and global semiconductor companies. The details of the policy and its implementation are being closely watched by the global industry for the resources China’s government has dedicated and potential impact to the global semiconductor manufacturing supply chain. During SEMICON China 2015, to be held March 17-19 in Shanghai, SEMI organized Market and Investment forums where key government decision makers, IC fund managers, and global industry analysts will share their insights on the policy and impact to the industry. SEMI expects record numbers of global industry executives to attend the world’s largest microelectronics manufacturing exposition to learn about these semiconductor and emerging/adjacent markets opportunities.

The China “National Guidelines for the Development and Promotion of the IC Industry” sets ambitious targets and sizable support for a China National IC industry investment fund. The combined investment in fabless, IDMs, foundries, and OSATs aims to spur industry at annualized growth rates above 20 percent through 2020. China’s ambitious targets cover: IC manufacturing, IC design, IC packaging and test, materials, and equipment. SEMI estimates the implemented investment plan could reach US$100 billion with the total government and associated local industry funding.

“The rapid development of the semiconductor industry in China has already formed an industry base of domestic enterprises. The unprecedented scale of new industry investment signaled by government plans is likely to further impact the global industry landscape,” said Allen Lu, president of SEMI China. “We are pleased to see significant interest in SEMICON China 2015 as an international gathering — with comprehensive attendance from our industry — to identity the latest business intelligence, global trade prospects, and collaboration opportunities.”

Global companies looking to understand the opportunities, challenges, and risks of China’s investment plans will be participating in events and key forums, including the Semiconductor Market and China Opportunity Forum, Tech Investment Forum-China 2015, Build China’s IC Ecosystem Forum, and China Equipment and Materials Forum. SEMICON China is co-located with FPD China and the LED China Conference, leveraging synergies with these emerging and adjacent markets. Featuring more than 900 exhibitors occupying more than 2,600 booths, SEMICON China is the largest exposition of its kind in China with over 50,000 people expected to attend.

The event will present a comprehensive set of topics through its exhibition, keynote addresses, executive panels, technical and business forums and full-day technology conferences. Grand Opening keynote presenters include: Lisa Su, president and CEO of AMD; Tzu-Yin Chiu, CEO and executive director of SMIC; Xinchao Wang, chairman and CEO of JCET; Simon Yang, president and CEO of XMC; and Michael Hurlston, EVP at Broadcom; and Lei Shi, president of Nantong Fujitsu Microelectronics.

“Semiconductor Market and China Opportunity” forum speakers include:

  • Zixue Zhou, chief economist, Ministry of Industry and Information Technology (MIIT); vice chairman and secretary-general, China Information Technology Industry Federation (Zhou is a vice minister-level MIIT official and the chief architect of the new China IC initiatives with setting up of the National IC Fund)
  • Professor Shaojun Wei, director, Institute of Microelectronics, Tsinghua University (Wei is also the leader of the expert group overseeing China’s National Project 01 responsible for growing China’s core competencies in computing and communication). Plus Handel Jones, founder and CEO of IBS; Jim Feldhan, president, Semico Research; and Dan Tracy, senior director, Industry Research and Statistics, SEMI

“Tech Investment Forum—China 2015” forum speakers include: Mr. Wenwu Ding, the CEO of the newly formed China National IC Fund (Ding has been a director-general of MIIT in charge of Semiconductor industry); Yongzhi Jiang, managing director of Goldman Sachs Securities in charge of M&A; Lip-Bu Tan, founder and chairman of Walden International and CEO of Cadence; and fund managers from CGP Investment, GM E-town Capital, Summitview Capital and Shenzhen Capital.

“Build China’s IC Ecosystem” forum is chaired by Professor Shaojun Wei, with speakers from the complete supply chain from IC design, device makers, to equipment manufacturers. Presenters include executives from Verisilicon, SMIC, XMC, ASMC, JCET, Northern Micro Electronics, and Applied Materials.

“China Equipment and Materials Forum” includes speakers from China and global companies: Sevenstar, TEL, ACM Research, and Shanghai Sinyang with a panel discussion moderated by Mr. Tianchun Ye, director of the Institute of Microelectronics, China Academy of Sciences (Mr. Ye is also the leader of expert group of National Project 02 overseeing developing China’s semiconductor manufacturing core-competencies).

This year’s event features six technical conferences: Mobile Technology Enabled by Semiconductors, China Equipment and Materials Forum, Building China’s IC Ecosystem, Advanced Packaging, LED China Conference, and Intelligent Wearable Industry Seminar.  Business programs include: Tech Investment Forum and Semiconductor Market and China Opportunity. Keynote speakers from Intel, IBM, ITRI, University of California, and SMIC will present. ­ FPD China 2015 features special programs on OLED displays, LCD displays, Oxide and LTPS Displays, and Printing Displays and Touch Screens.

China Semiconductor Technology International Conference (CSTIC) is also co-located at SEMICON China. Organized by SEMI and  IEEE-EDS , co-organized by China’s High-Tech Expert Committee (CHTEC), and co-sponsored by ECS, MRS and the China Electronics Materials Industry Association, CSTIC 2015 will cover all aspects of semiconductor technology and manufacturing (more than 300 papers), including devices, design, lithography, integration, materials, processes, and manufacturing, as well as emerging semiconductor technologies and silicon material applications. Hot topics, such as 3D integration, III-V semiconductors, carbon nano-electronics, LEDs, MEMS and Photovoltaic Technology will also be addressed in the conference. (CPTIC 2015 has joined CSTIC 2015 as Symposium XII).

Sponsors of SEMICON China 2015 include: Tokyo Electron, Laytec, SMIC, Huahong Group, JCET, Disco, Edwards, Advantest, Vastity, Shanghai Sinyang, Spirox, and many others.

MEMS Industry Group (MIG) is bringing its popular MEMS & Sensors Technology Showcase to MEMS Executive Congress Europe for the first time. Selected from a pool of applicants, finalist companies will demo their MEMS/sensors-based applications as they vie for attendees’ votes.

“MEMS & Sensors Technology Showcase is unique in the MEMS/sensors industry, and that’s why it’s always been a crowd pleaser at the US version of this event,” said Karen Lightman, executive director, MEMS Industry Group. “Finalists include a wide array of products that demonstrate the enabling power of MEMS and sensors: portable odor detectors, touch-free vital signs’ systems, and gas/alcohol-detection monitors that work with mobile phones as well as non-invasive oxygen readers and motion-based energy harvesters. I am excited to see which company our audience crowns as winner.”

This year’s finalists include:

1

NeOse by Aryballe Technologies — Based on the combination of nano, biotech, IT and cognitive sciences, Aryballe develops innovative technologies, databases, software and devices applied to the identification, measurement and representation of smells and tastes.

The company’s main product, NeOse, will be launched in 2016 and should be the first universal portable odor detector (e-nose) on the market. As a personal device that connects to smartphones and databases, NeOse is able to recognize a wide spectrum of different odors.

2

The Touch-Free Life Care (TLC) System by BAM Labs – The TLC System frees patients from the encumbrance of wired medical monitoring devices. This touch-free digital health solution uses Freescale’s MPXV2010 pressure sensor, MCU and applications processor to provide comprehensive hardware support for data collection, networking and communications for non-intrusive health monitoring.

The TLC System tracks bio-signals without keeping patients tethered to bedside monitors.

3

MOX Gas Sensors by Cambridge CMOS Sensors – Cambridge CMOS Sensors Metal Oxide (MOX) gas sensors use MEMS Micro-hotplate technology to provide a unique silicon platform for gas sensing, enabling sensor miniaturization, low power consumption and ultra-fast response times.

For the MEMS & Sensors Technology Showcase, Cambridge CMOS Sensors will present a MOX sensor module connected to a mobile device, demonstrating superior gas detection for indoor air quality (IAQ) and Volatile Organic Compounds (VOCs). The company will also show how its MOX sensor module supports alcohol detection via breath analysis.

4

The Demox Reader by CSEM (Swiss Centre for Electronics and Microtechnology) —

Originally developed to monitor oxygen in real time in cell and tissue cultures, the Demox reader is a versatile device that enables oxygen measurements for many different applications. CSEM will demo a new Demox reader that can be used to assess air and water quality as well as to support process control of food and beverages. This compact device can be mounted on commercial microscopes that are regularly used to investigate living biological materials.

The Demox optical reader allows the rapid, efficient and non-invasive measurements of oxygen concentration in a wide range of materials.

5

EnerBee Rv2 by EnerBee — EnerBee technology is based on research developed to produce MEMS electric generators that create electricity from all kinds of movement. This includes motion at very low speeds where traditional generators become unusable.

Enerbee Rv2 is a highly efficient motion-based energy harvester that produces electricity independently from motion speed, and powers low-power devices in Internet of Things applications such as building automation, access control and smart objects.

MEMS & Sensors Technology Showcase takes place 9 March, 2015, 16:00-17:30 at Crowne Plaza Copenhagen Towers, Copenhagen, Denmark.

MIG Executive Director Karen Lightman will announce the winner during her closing remarks, 10 March, 2015 at 17:15.

GLOBALFOUNDRIES, a provider of advanced semiconductor manufacturing technology, today announced a partnership with imec, a nanoelectronics research center, for joint research on future radio architectures and designs for highly integrated mobile devices and IoT applications.

A key challenge for next-generation mobile devices is controlling the cost and footprint of the radio and antenna interface circuitry, which contain all of the components that process a cellular signal across the various supported frequency bands. Today, a typical mobile device must support up to 28 bands for worldwide 2G, 3G, 4G, LTE network connectivity, and more complex carrier aggregation schemes and additional frequency bands are expected for future generations. These challenges are driving the need for an agile radio that integrates many of the separate components into one piece of silicon, including power amplifiers, antenna switches, and tuners and provides a solution which is both flexible and low cost.

GLOBALFOUNDRIES will closely collaborate with technical experts from imec to investigate low-power and compact high-performance agile radio solutions that will enable a broad range of radio architecture design–targeting improvements in area, performance and power consumption. GLOBALFOUNDRIES will also partner with imec to develop innovative ultra-low power IC design solutions leveraging GLOBALFOUNDRIES’ CMOS technology to address the demanding requirements of tomorrow’s IoT devices. Ultimately, the partnership aims to build a technology and design infrastructure that will enable future RF architectures while minimizing critical interface requirements for radio power consumption and performance.

“This collaboration expands our relationship with imec, and we’re eager to leverage their R&D expertise in RF technology to accelerate time-to-volume of designs and deliver leading-edge RF technology to our customers,” said Peter Rabbeni, director RF Segment Marketing at GLOBALFOUNDRIES. “This relationship further reflects our commitment to find RF design implementations that will efficiently extend the range of wireless communication applications without increasing the form factor or cost.”

“There are advanced chip technology challenges the industry needs to address to enable a higher level of integration and lower power consumption for future wireless communication,” said Harmke de Groot, senior director Perceptive Systems for the Internet of Things. “Imec is pleased to welcome GLOBALFOUNDRIES as a partner in ultra-low power wireless design. Leveraging imec’s advanced IC technology knowhow and system design experience, and GLOBALFOUNDRIES’ CMOS technology, we will accelerate the investigation and develop new approaches.”

Researchers at the University of Illinois at Urbana-Champaign have developed a unique single-step process to achieve three-dimensional (3D) texturing of graphene and graphite. Using a commercially available thermally activated shape-memory polymer substrate, this 3D texturing, or “crumpling,” allows for increased surface area and opens the doors to expanded capabilities for electronics and biomaterials.

“Fundamentally, intrinsic strains on crumpled graphene could allow modulation of electrical and optical properties of graphene,” explained SungWoo Nam, an assistant professor of mechanical science and engineering at Illinois. “We believe that the crumpled graphene surfaces can be used as higher surface area electrodes for battery and supercapacitor applications. As a coating layer, 3D textured/crumpled nano-topographies could allow omniphobic/anti-bacterial surfaces for advanced coating applications.”

Graphene–a single atomic layer of sp2-bonded carbon atoms–has been a material of intensive research and interest over recent years. A combination of exceptional mechanical properties, high carrier mobility, thermal conductivity, and chemical inertness, make graphene a prime candidate material for next generation optoelectronic, electromechanical, and biomedical applications.

“In this study, we developed a novel method for controlled crumpling of graphene and graphite via heat-induced contractile deformation of the underlying substrate,” explained Michael Cai Wang, a graduate student and first author of the paper, “Heterogeneous, Three-Dimensional Texturing of Graphene,” which appeared in the journal Nano Letters. “While graphene intrinsically exhibits tiny ripples in ambient conditions, we created large and tunable crumpled textures in a tailored and scalable fashion.”

“As a simpler, more scalable, and spatially selective method, this texturing of graphene and graphite exploits the thermally induced transformation of shape-memory thermoplastics, which has been previously applied to microfluidic device fabrication, metallic film patterning, nanowire assembly, and robotic self-assembly applications,” added Nam, whose group has filed a patent for their novel strategy. “The thermoplastic nature of the polymeric substrate also allows for the crumpled graphene morphology to be arbitrarily re-flattened at the same elevated temperature for the crumpling process.”

“Due to the extremely low cost and ease of processing of our approach, we believe that this will be a new way to manufacture nanoscale topographies for graphene and many other 2D and thin-film materials.”

The researchers are also investigating the textured graphene surfaces for 3D sensor applications.

“Enhanced surface area will allow even more sensitive and intimate interactions with biological systems, leading to high sensitivity devices,” Nam said.

Samsung Electronics Co., Ltd. announced that it has begun mass production of industry’s first mobile application processor using the advanced 14-nanometer (nm) FinFET process technology.

“Samsung’s advanced 14nm FinFET process technology is undoubtedly the most advanced logic process technology in the industry,” said Gabsoo Han, Executive Vice President of Sales & Marketing, System LSI Business, Samsung Electronics. “We expect the production of our 14nm mobile application processor to positively impact the growth of the mobile industry by enabling further performance improvements for cutting-edge smartphones.”

As the most advanced technology available today, 14nm FinFET process is able to achieve the highest levels of efficiency, performance and productivity. When compared to Samsung’s 20nm process technology, this newest process enables up to 20 percent faster speed, 35 percent less power consumption and 30 percent productivity gain.

By successfully incorporating three-dimensional (3D) FinFET structure on transistors, Samsung has overcome performance and scaling limitations of the planar structure used in previous 20nm and older processes and gained a significant competitive edge in advanced semiconductors for the mobile industry.

This ground-breaking accomplishment is a result of Samsung’s unparalleled R&D efforts in FinFET technology since the early 2000s. Starting with a research article presented at IEDM (International Electron Devices Meeting) in 2003, Samsung has continuously made progress and announced its technological achievements in FinFET research and has also filed a pool of key patents in the field.

As for memory, Samsung has been successfully mass producing its proprietary 3D V-NAND products since 2013. Together with its 3D transistor based FinFET process technology, Samsung has strengthened its leadership in 3D semiconductors in both memory and logic semiconductors that addresses the current scaling limitations with planar designs.

Samsung’s leading-edge 14nm FinFET process will be adopted by its Exynos 7 Octa, then expanded to other products throughout the year.

A new spin on spintronics


February 17, 2015

A team of researchers from the University of Michigan and Western Michigan University is exploring new materials that could yield higher computational speeds and lower power consumption, even in harsh environments.

Most modern electronic circuitry relies on controlling electronic charge within a circuit, but this control can easily be disrupted in the presence of radiation, interrupting information processing. Electronics that use spin-based logic, or spintronics, may offer an alternative that is robust even in radiation-filled environments.

Making a radiation-resistant spintronic device requires a material relevant for spintronic applications that can maintain its spin-dependence after it has been irradiated. In a paper published in the journal Applied Physics Letters, from AIP Publishing, the Michigan research team presents their results using bulk Si-doped n-GaAs exposed to proton radiation.

How Does Spintronics Work?

Modern electronic devices use charges to transmit and store information, primarily based upon how many electrons are in one place or another. When a lot of them are at a given terminal, you can call that ‘on.’ If you have very few of them at the same terminal, you can call that ‘off,’ just like a light switch. This allows for binary logic depending on whether the terminal is ‘on’ or ‘off.’ Spintronics, at its simplest, uses the ‘on/off’ idea, but instead of counting the electrons, their spin is measured.

“You can think of the spin of an electron as a tiny bar magnet with an arrow painted on it. If the arrow points up, we call that ‘spin-up.’ If it points down, we call that ‘spin-down.’ By using light, electric, or magnetic fields, we can manipulate, and measure, the spin direction,” said researcher Brennan Pursley, who is the first author of the new study.

While spintronics holds promise for faster and more efficient computation, researchers also want to know whether it would be useful in harsh environments. Currently, radioactivity is a major problem for electronic circuitry because it can scramble information and in the long term degrade electronic properties. For the short term effects, spintronics should be superior: radioactivity can change the quantity of charge in a circuit, but should not affect spin-polarized carriers.

Studying spintronic materials required that the research team combine two well established fields: the study of spin dynamics and the study of radiation damage. Both tool sets are quite robust and have been around for decades but combining the two required sifting through the wealth of radiation damage research. “That was the most difficult aspect,” explains Pursley. “It was an entirely new field for us with a variety of established techniques and terminology to learn. The key was to tackle it like any new project: ask a lot of questions, find a few good books or papers, and follow the citations.”

Technically, what the Michigan team did was to measure the spin properties of n-GaAs as a function of radiation fluence using time-resolved Kerr rotation and photoluminescence spectroscopy. Results show that the spin lifetime and g-factor of bulk n-GaAs is largely unaffected by proton irradiation making it a candidate for further study for radiation-resistant spintronic devices. The team plans to study other spintronic materials and prototype devices after irradiation since the hybrid field of irradiated spintronics is wide open with plenty of questions to tackle.

Long term, knowledge of radiation effects on spintronic devices will aid in their engineering. A practical implementation would be processing on a communications satellite where without the protection of Earth’s atmosphere, electronics can be damaged by harsh solar radiation. The theoretically achievable computation speeds and low power consumption could be combined with compact designs and relatively light shielding. This could make communications systems faster, longer-lived and cheaper to implement.

By CHOWDARY YANAMADALA, Senior Vice President of Business Development, ChaoLogix, Gainesville, FL 

Data is ubiquitous today. It is generated, exchanged and consumed at unprecedented rates.

According to Gartner, Internet of Things connected devices (excluding PCs, tablets and smart phones) will grow to 26 billion devices worldwide by 2020—a 30-fold increase from 2009. Sales of these devices will add $1.9 trillion in economic value globally.

Indeed, one of the major benefits of the Internet of Things movement is the connectivity and accessibility of data; however, this also raises concerns about securely managing that data.

Managing data security in hardware

Data security involves essential steps of authentication and encryption. We need to authenticate data generation and data collection sources, and we need to preserve the privacy of the data.

The Internet of Things comprises a variety of components: hardware, embedded software and services associated with the “things.” Data security is needed at each level.

Hardware security is generally implemented in the chips that make up the “things.” The mathematical security of authentication and encryption algorithms is less of a concern because this is not new. The industry has addressed these concerns for several years.

Nonetheless, hackers can exploit implementation flaws in these chips. Side channel attacks (SCAs) are a major threat to data security within integrated circuits (ICs) that are used to hold sensitive data, such as identifying information and secret keys needed for authentication or encryption algorithms. Specific SCAs include differential power analysis (DPA) and differential electro magnetic analysis (DEMA).

There are many published and unpublished attacks on the security of chips deployed in the market, and SCA threats are rapidly evolving, increasing in potency and the ease of mounting the attacks.

These emerging threats render defensive techniques adopted by the IC manufacturers less potent over time, igniting a race between defensive and offensive (threat) techniques. For example, chips that deploy defensive techniques deemed sufficient in 2012 may be less effective in 2014 due to emerging threats. Once these devices are deployed, they become vulnerable to new threats.

Another challenge IC manufacturers face is the complexity of defensive techniques. Often times, defensive techniques that are algorithm or protocol specific are layered to address multiple targeted threats.

This “Band-Aid” approach is tedious and becomes unwieldy to manage. The industry must remember that leaving hardware vulnerable to SCA threats can significantly weaken data security. This vulnerability may manifest itself in the form of revenue loss (counterfeits of consumables), loss of privacy (compromised identification information), breach of authentication (rogue devices in the closed network) and more.

How to increase the permanence of security

A simplified way to look at the SCA problem is as a signal to noise issue. In this case, signal means sensitive data leaked through power signature. Noise is the ambient or manufactured noise added to the system to obfuscate the signal from being extracted from power signature.

Many defensive measures today concentrate on increasing noise in the system to obfuscate the signal. The challenge with this approach is that emerging statis- tical techniques are becoming adept at separating the signal from the noise, thereby decreasing the potency of the deployed defensive techniques.

One way to effectively deal with this problem is to ”weave security into the fabric of design.” SCA threats can be addressed at the source rather than addressing the symptoms. What if we can make the power signature agnostic of the data processed? What if we can build security into the building blocks of design? That would make the security more permanent and simplify its implementation.

A simplified approach of weaving security into the fabric of design involves leveraging a secure standard cell library that is hardened against SCA. Such a library would use analog design techniques to tackle the problem of SCA at the source, diminishing the SCA signal to make it difficult to extract from the power signature.

Leveraging standard cells should be simple since they are the basic building blocks of digital design. As an industry, we cannot afford to bypass these critical steps to defend our data.

Scientists from Ghent University and imec announce today that they demonstrated interaction between light and sound in a nanoscale area. Their findings elucidate the physics of light-matter coupling at these scales – and pave the way for enhanced signal processing on mass-producible silicon photonic chips.

In the last decade, the field of silicon photonics has gained increasing attention as a key driver of lab-on-a-chip biosensors and of faster-than-electronics communication between computer chips. The technology builds on tiny structures known as silicon photonic wires, which are roughly a hundred times narrower than a typical human hair. These nanowires carry optical signals from one point to another at the speed of light. They are fabricated with the same technological toolset as electronic circuitry.

Fundamentally, the wires work only because light moves slower in the silicon core than in the surrounding air and glass. Thus, the light is trapped inside the wire by the phenomenon of total internal reflection. Simply confining light is one thing, but manipulating it is another. The issue is that one light beam cannot easily change the properties of another. This is where light-matter interaction comes into the picture: it allows some photons to control other photons.

Publishing in Nature Photonics, researchers from the Photonics Research Group of Ghent University and imec report on a peculiar type of light-matter interaction. They managed to confine not only light but also sound to the silicon nanowires. The sound oscillates ten billion times per second: far more rapid than human ears can hear. They realized that the sound cannot be trapped in the wire by total internal reflection. Unlike light, sound moves faster in the silicon core than in the surrounding air and glass. Thus, the scientists sculpted the environment of the core to make sure any vibrational wave trying to escape it would actually bounce back. Doing so, they confined both light and sound to the same nanoscale waveguide core – a world’s first observation.

Researchers from North Carolina State University are using a technique they developed to observe minute distortions in the atomic structure of complex materials, shedding light on what causes these distortions and opening the door to studies on how such atomic-scale variations can influence a material’s properties.

Researchers have known for years that the properties of complex materials, such as alloys, are influenced by how the material’s component atoms are organized – i.e., where the atoms fit into the material’s crystal structure. But the devil was in the details.

“We knew where the atoms were on average, but we also knew that there were variations in a material – there can be significant displacements, where atoms don’t fit into that average pattern,” says Dr. Doug Irving, an associate professor of materials science and engineering at NC State and co-author of a paper describing the new work.

“However, detecting these distortions required indirect methods that could be difficult to interpret, so we couldn’t fully explore how a material’s atomic structure affects its properties,” says Dr. James LeBeau, an assistant professor of materials science and engineering at NC State and corresponding author of a paper describing the new work.

“Now we’ve come up with a way to see the distortions directly, at the atomic scale,” LeBeau says. “We can create a precise map of atomic organization, including the distortions, within a material. Not only which atoms fit into the structure, but how far apart they are, and how distortions in the structure are related to the chemistry of the material.”

The work builds on a technique LeBeau developed called revolving scanning transmission electron microscopy (revolving STEM).

To test the technique and learn more about the links between structural distortions and chemical bonds, the researchers looked at a complex material called lanthanum strontium aluminum tantalum oxide (LSAT). They picked LSAT because there is significant variability in the nature of the chemical bonds within the material.

“It’s a mess,” LeBeau says. “We didn’t know how the complexity of those bonds influenced structural distortions, and we wanted to see if revolving STEM would give us any insights.”

It did.

The researchers found that the weaker chemical bonds that hold lanthanum and strontium in place in LSAT’s atomic structure made them more susceptible to being pushed or pulled by small variations in their chemical environment.

“We never would have been able to directly see the extent of that variation before,” LeBeau says.

“Now that we can see these subtle distortions, and know what causes them, the next step is to begin work to understand how these structural differences affect specific properties. Ultimately, we hope to use this knowledge to tailor a material’s properties by manipulating these atomic distortions.”