Category Archives: MEMS

A new manufacturing technique uses a process similar to newspaper printing to form smoother and more flexible metals for making ultrafast electronic devices.

The low-cost process, developed by Purdue University researchers, combines tools already used in industry for manufacturing metals on a large scale, but uses the speed and precision of roll-to-roll newspaper printing to remove a couple of fabrication barriers in making electronics faster than they are today.

Roll-to-roll laser-induced superplasticity, a new fabrication method, prints metals at the nanoscale needed for making electronic devices ultrafast. Credit: Purdue University image/Ramses Martinez

Cellphones, laptops, tablets, and many other electronics rely on their internal metallic circuits to process information at high speed. Current metal fabrication techniques tend to make these circuits by getting a thin rain of liquid metal drops to pass through a stencil mask in the shape of a circuit, kind of like spraying graffiti on walls.

“Unfortunately, this fabrication technique generates metallic circuits with rough surfaces, causing our electronic devices to heat up and drain their batteries faster,” said Ramses Martinez, assistant professor of industrial engineering and biomedical engineering.

Future ultrafast devices also will require much smaller metal components, which calls for a higher resolution to make them at these nanoscale sizes.

“Forming metals with increasingly smaller shapes requires molds with higher and higher definition, until you reach the nanoscale size,” Martinez said. “Adding the latest advances in nanotechnology requires us to pattern metals in sizes that are even smaller than the grains they are made of. It’s like making a sand castle smaller than a grain of sand.”

This so-called “formability limit” hampers the ability to manufacture materials with nanoscale resolution at high speed.

Purdue researchers have addressed both of these issues – roughness and low resolution – with a new large-scale fabrication method that enables the forming of smooth metallic circuits at the nanoscale using conventional carbon dioxide lasers, which are already common for industrial cutting and engraving.

“Printing tiny metal components like newspapers makes them much smoother. This allows an electric current to travel better with less risk of overheating,” Martinez said.

The fabrication method, called roll-to-roll laser-induced superplasticity, uses a rolling stamp like the ones used to print newspapers at high speed. The technique can induce, for a brief period of time, “superelastic” behavior to different metals by applying high-energy laser shots, which enables the metal to flow into the nanoscale features of the rolling stamp – circumventing the formability limit.

“In the future, the roll-to-roll fabrication of devices using our technique could enable the creation of touch screens covered with nanostructures capable of interacting with light and generating 3D images, as well as the cost-effective fabrication of more sensitive biosensors,” Martinez said.

Researchers have shown that it is possible to train artificial neural networks directly on an optical chip. The significant breakthrough demonstrates that an optical circuit can perform a critical function of an electronics-based artificial neural network and could lead to less expensive, faster and more energy efficient ways to perform complex tasks such as speech or image recognition.

Researchers have shown a neural network can be trained using an optical circuit (blue rectangle in the illustration). In the full network there would be several of these linked together. The laser inputs (green) encode information that is carried through the chip by optical waveguides (black). The chip performs operations crucial to the artificial neural network using tunable beam splitters, which are represented by the curved sections in the waveguides. These sections couple two adjacent waveguides together and are tuned by adjusting the settings of optical phase shifters (red and blue glowing objects), which act like ‘knobs’ that can be adjusted during training to perform a given task. Credit: Tyler W. Hughes, Stanford University

“Using an optical chip to perform neural network computations more efficiently than is possible with digital computers could allow more complex problems to be solved,” said research team leader Shanhui Fan of Stanford University. “This would enhance the capability of artificial neural networks to perform tasks required for self-driving cars or to formulate an appropriate response to a spoken question, for example. It could also improve our lives in ways we can’t imagine now.”

An artificial neural network is a type of artificial intelligence that uses connected units to process information in a manner similar to the way the brain processes information. Using these networks to perform a complex task, for instance voice recognition, requires the critical step of training the algorithms to categorize inputs, such as different words.

Although optical artificial neural networks were recently demonstrated experimentally, the training step was performed using a model on a traditional digital computer and the final settings were then imported into the optical circuit. In Optica, The Optical Society’s journal for high impact research, Stanford University researchers report a method for training these networks directly in the device by implementing an optical analogue of the ‘backpropagation’ algorithm, which is the standard way to train conventional neural networks.

“Using a physical device rather than a computer model for training makes the process more accurate,” said Tyler W. Hughes, first author of the paper. “Also, because the training step is a very computationally expensive part of the implementation of the neural network, performing this step optically is key to improving the computational efficiency, speed and power consumption of artificial networks.”

A light-based network

Although neural network processing is typically performed using a traditional computer, there are significant efforts to design hardware optimized specifically for neural network computing. Optics-based devices are of great interest because they can perform computations in parallel while using less energy than electronic devices.

In the new work, the researchers overcame a significant challenge to implementing an all-optical neural network by designing an optical chip that replicates the way that conventional computers train neural networks.

An artificial neural network can be thought of as a black box with a number of knobs. During the training step, these knobs are each turned a little and then the system is tested to see if the performance of the algorithms improved.

“Our method not only helps predict which direction to turn the knobs but also how much you should turn each knob to get you closer to the desired performance,” said Hughes. “Our approach speeds up training significantly, especially for large networks, because we get information about each knob in parallel.”

On-chip training

The new training protocol operates on optical circuits with tunable beam splitters that are adjusted by changing the settings of optical phase shifters. Laser beams encoding information to be processed are fired into the optical circuit and carried by optical waveguides through the beam splitters, which are adjusted like knobs to train the neural network algorithms.

In the new training protocol, the laser is first fed through the optical circuit. Upon exiting the device, the difference from the expected outcome is calculated. This information is then used to generate a new light signal, which is sent back through the optical network in the opposite direction. By measuring the optical intensity around each beam splitter during this process, the researchers showed how to detect, in parallel, how the neural network performance will change with respect to each beam splitter’s setting. The phase shifter settings can be changed based on this information, and the process may be repeated until the neural network produces the desired outcome.

The researchers tested their training technique with optical simulations by teaching an algorithm to perform complicated functions, such as picking out complex features within a set of points. They found that the optical implementation performed similarly to a conventional computer.

“Our work demonstrates that you can use the laws of physics to implement computer science algorithms,” said Fan. “By training these networks in the optical domain, it shows that optical neural network systems could be built to carry out certain functionalities using optics alone.”

The researchers plan to further optimize the system and want to use it to implement a practical application of a neural network task. The general approach they designed could be used with various neural network architectures and for other applications such as reconfigurable optics.

By Yoichiro Ando

The Japan semiconductor manufacturing supply chain is a global semiconductor industry workhorse, producing about one third of world’s chip equipment and more than half of its semiconductor materials. In contributing the vast majority of these products, SEMI Japan member companies hold the high distinction of enabling continuous development of the worldwide semiconductor industry. Aptly, then, technology powerhouses IBM, Nissan Motors and Toshiba offered insights into the latest trends and innovations in computing and smart cars at the late-May SEMI Japan Members Days in Tokyo with 133 technologists from member companies in attendance.

As the audience discovered, chip innovation never sleeps and, as futuristic as it can be, invariably gives rise to possibilities beyond the human imagination. That was the message of kickoff presentation “Computing Reimagined – AI/Quantum/IoT” – by Dr. Shintaro Yamamichi, Senior Manager, Science & Technology at IBM Research-Tokyo. Dr. Yamamichi cited three examples of how semiconductors uncover new technology frontiers.

  • Computational materials discovery, a novel methodology, is the application of theory and computation to unearthing new materials and the key to enabling an ongoing stream of semiconductor innovation. In particular, using cognitive technology to mine huge volumes of literature reveal new insights into materials that uncover even more functionality such as greater conductivity and heat resistance. With new materials the oxygen of ever more advanced semiconductor chip manufacturing, the semiconductor industry will surely benefit from this methodology.
  • The opportunity to accelerate quantum computing innovation is now. Launched in May 2016, the IBM Quantum Experience gives students, researchers and general science enthusiasts hands-on access to IBM’s experimental cloud-enabled quantum computing platform. The online platform features a forum for discussing quantum computing topics, tutorials on how to program IBM Q devices, and other educational material about quantum computing. Dr. Yamamichi encouraged the audience to join the program.
  • The world’s tiniest computer, unveiled by IBM at the company’s Think 2018 conference in Las Vegas, packs several hundred thousand transistors and, IBM claims, the equivalent power of a 1990s x86 chip into a package smaller than a grain of salt. The computer’s small form factor (less than 1mm x 1mm) and low manufacturing cost means it can be embedded in product price tags and packages as an anti-fraud device using blockchain technology.

Vehicles need to be both electric and intelligent as countries become more populous and traffic density increases. More drivers extend average drive time, boost greenhouse emissions, devour precious energy resources and lead to more traffic congestion and accidents. Dr. Haruyoshi Kumura, fellow at Nissan Motor, highlighted these issues in stressing the importance of a new era of intelligent mobility. To mitigate these problems, Nissan is focusing on the electrification and intelligence of its vehicles:

  • Nissan’s electric vehicle, Leaf, reduces accidents with electric intelligence systems such as e-Pedal, which uses an accelerator pedal only for both acceleration and deceleration, and ProPILOT Park, a feature that automatically parks the car by using multiple cameras and ultrasonic sonars to detect pedestrians and other objects around the vehicle.

  • With more than 90 percent of traffic accidents caused by driver error, Nissan plans to introduce autonomous driving on multi-lane highways by the end of 2018 and on city streets by 2020. By 2022, the company plans to roll out full autonomous driving to reduce traffic accidents caused by inattentive drivers.
  • For full autonomous driving to materialize, sensor fusion technology must incorporate a combination of technologies – radar systems, light detection and ranging (LiDAR) systems and cameras – to identify the shapes and locations of nearby moving objects and measure their speed. Sensed information is then processed by a 3D graphic analyzer to make electric throttle, braking and steering decisions.

The outlook for automotive industry includes car sharing and more electrification – both insights from Yoshiki Hayakashi, general manager, automotive solution strategic planning division at Toshiba Electronic Devices & Storage, who offered his perspectives on trends in Japan’s automotive industry and beyond.

  • To meet the requirements of the COP21 Paris agreement, the global automotive industry is shifting to electrification. Toshiba estimates 60 percent of new cars will be electric vehicles by 2040 to meet the International Energy Agency’s global EV outlook.
  • In Japan, autonomous driving or advanced driver assistance systems (ADAS) will be offered in certain areas by 2020, the year of the Tokyo Olympic games. Growth of these advanced driving systems hinges on infrastructure development. Supporting data centers, intelligent transport systems, vehicle-to-everything connections, and smart city are all necessary components.
  • Car ownership will begin to cede ground to car sharing with technology elites such as Tesla, Apple and Google leading the way. To expand the car-sharing industry, new alliances will take shape between new and old-guard automotive companies and electronics manufacturing services (EMS) providers.
  • Autonomous driving requires precise 3D renderings of actual roadways using sensors for route mapping. While sensor fusion must be deployed for these capabilities, LiDAR offers better sensing range and space resolution precision than ultrasonic sonars, radars, and cameras.

The next SEMI Japan members day is scheduled for October 30 in Tokyo. SEMI holds similar events in most regions where SEMI and its members operate. For the members events in your region, contact the SEMI office nearest you.

Yoichiro Ando is a marketing director in SEMI Japan.

Originally published on the SEMI blog.

Billions of objects ranging from smartphones and watches to buildings, machine parts and medical devices have become wireless sensors of their environments, expanding a network called the “internet of things.”

As society moves toward connecting all objects to the internet – even furniture and office supplies – the technology that enables these objects to communicate and sense each other will need to scale up.

Researchers at Purdue University and the University of Virginia have developed a new fabrication method that makes tiny, thin-film electronic circuits peelable from a surface. The technique not only eliminates several manufacturing steps and the associated costs, but also allows any object to sense its environment or be controlled through the application of a high-tech sticker.

Eventually, these stickers could also facilitate wireless communication. The researchers demonstrate capabilities on various objects in a paper recently published in the Proceedings of the National Academy of Sciences. A YouTube video is available at https://youtu.be/8tNrPVi4OGg.

“We could customize a sensor, stick it onto a drone, and send the drone to dangerous areas to detect gas leaks, for example,” said Chi Hwan Lee, Purdue assistant professor of biomedical engineering and mechanical engineering.

Most of today’s electronic circuits are individually built on their own silicon “wafer,” a flat and rigid substrate. The silicon wafer can then withstand the high temperatures and chemical etching that are used to remove the circuits from the wafer.

But high temperatures and etching damage the silicon wafer, forcing the manufacturing process to accommodate an entirely new wafer each time.

Lee’s new fabrication technique, called “transfer printing,” cuts down manufacturing costs by using a single wafer to build a nearly infinite number of thin films holding electronic circuits. Instead of high temperatures and chemicals, the film can peel off at room temperature with the energy-saving help of simply water.

“It’s like the red paint on San Francisco’s Golden Gate Bridge – paint peels because the environment is very wet,” Lee said. “So in our case, submerging the wafer and completed circuit in water significantly reduces the mechanical peeling stress and is environmentally-friendly.”

A ductile metal layer, such as nickel, inserted between the electronic film and the silicon wafer, makes the peeling possible in water. These thin-film electronics can then be trimmed and pasted onto any surface, granting that object electronic features.

Putting one of the stickers on a flower pot, for example, made that flower pot capable of sensing temperature changes that could affect the plant’s growth.

Lee’s lab also demonstrated that the components of electronic integrated circuits work just as well before and after they were made into a thin film peeled from a silicon wafer. The researchers used one film to turn on and off an LED light display.

“We’ve optimized this process so that we can delaminate electronic films from wafers in a defect-free manner,” Lee said.

This technology holds a non-provisional U.S. patent. The work was supported by the Purdue Research Foundation, the Air Force Research Laboratory (AFRL-S-114-054-002), the National Science Foundation (NSF-CMMI-1728149) and the University of Virginia.

Silicon Labs (NASDAQ: SLAB), a provider of silicon, software and solutions for a smarter, more connected world, announces two new executive appointments. Daniel Cooley has been named Senior Vice President and Chief Strategy Officer. In this new role, Mr. Cooley will focus on Silicon Labs’ overall growth strategy, business development, new technologies and emerging markets. Matt Johnson, a semiconductor veteran with more than 15 years of industry experience, joins Silicon Labs as Senior Vice President and General Manager of IoT products. Both executives will report to Tyson Tuttle, CEO.

Mr. Cooley has led Silicon Labs’ IoT business for the past four years. Under his leadership, the company built an industry-leading portfolio of secure connectivity solutions, with IoT revenue now exceeding a $100 million per quarter run rate. Mr. Cooley joined Silicon Labs in 2005 as a chip design engineer developing broadcast audio products and short-range wireless devices. Over the years, he has served in various senior management, engineering and product management roles at the company’s Shenzhen, Singapore, Oslo and Austin sites. The new role leverages Mr. Cooley’s proven talents in strategy and business development.

Mr. Johnson will lead Silicon Labs’ IoT business including the development and market success of the company’s broad portfolio of wireless products, microcontrollers, sensors, development tools and wireless software. Mr. Johnson has a track record of growing revenue and leading large global teams, and he brings a deep understanding of analog, MCU and embedded software businesses to Silicon Labs. Previously, he served as Senior Vice President and General Manager of automotive processing products and software development at NXP Semiconductors/Freescale, as well as SVP and General Manager of mobile solutions at Fairchild Semiconductor.

“With these executive appointments, we are expanding our ability to execute on large and growing market opportunities in the IoT,” said Tyson Tuttle, CEO of Silicon Labs. “Together, these two talented leaders will help Silicon Labs scale the business to the next level and focus on future growth.”

Australian scientists have achieved a new milestone in their approach to creating a quantum computer chip in silicon, demonstrating the ability to tune the control frequency of a qubit by engineering its atomic configuration. The work has been published in Science Advances.

A team of researchers from the Centre of Excellence for Quantum Computation and Communication Technology (CQC2T) at UNSW Sydney have successfully implemented an atomic engineering strategy for individually addressing closely spaced spin qubits in silicon.

The frequency spectrum of an engineered molecule. The three peaks represent three different configurations of spins within the atomic nuclei, and the distance between the peaks depends on the exact distance between atoms forming the molecule. Credit: Dr. Sam Hile

The researchers built two qubits – one an engineered molecule consisting of two phosphorus atoms with a single electron, and the other a single phosphorus atom with a single electron – and placed them just 16 nanometres apart in a silicon chip.

By patterning a microwave antenna above the qubits with precision alignment, the qubits were exposed to frequencies of around 40GHz. The results showed that when changing the frequency of the signal used to control the electron spin, the single atom had a dramatically different control frequency compared to the electron spin in the molecule of two phosphorus atoms.

The UNSW researchers collaborated closely with experts at Purdue University, who used powerful computational tools to model the atomic interactions and understand how the position of the atoms impacted the control frequencies of each electron even by shifting the atoms by as little as one nanometre.

“Individually addressing each qubit when they are so close is challenging,” says UNSW Scientia Professor Michelle Simmons, Director CQC2T and co-author of the paper.

“The research confirms the ability to tune neighbouring qubits into resonance without impacting each other.”

Creating engineered phosphorus molecules with different separations between the atoms within the molecule allows for families of qubits with different control frequencies. Each molecule can be operated individually by selecting the frequency that controls its electron spin.

“We can tune into this or that molecule – a bit like tuning in to different radio stations,” says Sam Hile, lead co-author of the paper and Research Fellow at UNSW.

“It creates a built-in address which will provide significant benefits for building a silicon quantum computer.”

Tuning in and individually controlling qubits within a 2 qubit system is a precursor to demonstrating the entangled states that are necessary for a quantum computer to function and carry out complex calculations.

These results show how the team – led by Professor Simmons – have further built on their unique Australian approach of creating quantum bits from precisely positioned individual atoms in silicon.

By engineering the atomic placement of the atoms within the qubits in the silicon chip, the molecules can be created with different resonance frequencies. This means that controlling the spin of one qubit will not affect the spin of the neighbouring qubit, leading to fewer errors – an essential requirement for the development of a full-scale quantum computer.

“The ability to engineer the number of atoms within the qubits provides a way of selectively addressing one qubit from another, resulting in lower error rates even though they are so closely spaced,” says Professor Simmons.

“These results highlight the ongoing advantages of atomic qubits in silicon.”

This latest advance in spin control follows from the team’s recent research into controllable interactions between two qubits.

Boston Semi Equipment (BSE), a global semiconductor test handler manufacturer and provider of test automation technical services, introduced today its Zeus gravity feed solution for handling pressure MEMS devices that require pressure and vacuum stimulus during testing. The system is an enhanced capability for BSE’s existing pressure MEMS handling solution and enables MEMS test cells to apply pressure and vacuum in a single test cycle.

“Our innovative design for applying a pressure stimulus to devices under test enabled us to easily integrate a vacuum stimulus,” said Kevin Brennan, vice president of marketing for BSE. “This solution is unique in the industry. Our customers can already test MEMS devices faster using the Zeus handler, and now they can test with both vacuum and pressure stimuli in a single pass through the handler. This capability is a significant boost to productivity, making Zeus-based MEMS test cells a highly cost-effective solution for pressure MEMS testing.”

The Zeus is a tri-temperature handler that can be configured with up to eight test sites. Cold temperature testing is achieved using LN2 or a BSE-designed, two-stage chiller, the MR2. The Zeus offers the features and performance needed by today’s test cells at a more affordable price point.

Kirigami (also called “paper-cuts” or “jianzhi”) is one of the most traditional Chinese folk arts. It is widely used in window decorations, gift cards, festivals, and ceremonies, etc. Kirigami involves cutting and folding flat objects into 3D shapes. Recently, the techniques of this ancient art have been used in various scientific and technological fields, including designs for solar arrays, biomedical devices and micro-/nano- electromechanical systems (MEMS/NEMS).

Macroscopic paper-cuts in a paper sheet and nano-kirigami in an 80-nm thick gold film. Credit: Institute of Physics

Dr. LI Jiafang, from the Institute of Physics (IOP), Chinese Academy of Sciences, has recently formed an international team to apply kirigami techniques to advanced 3D nanofabrication.

Inspired by a traditional Chinese kirigami design called “pulling flower,” the team developed a direct nano-kirigami method to work with flat films at the nanoscale. They utilized a focused ion beam (FIB) instead of knives/scissors to cut a precise pattern in a free-standing gold nanofilm, then used the same FIB, instead of hands, to gradually “pull” the nanopattern into a complex 3D shape.

The “pulling” forces were induced by heterogeneous vacancies (introducing tensile stress) and the implanted ions (introducing compressive stress) within the gold nanofilm during FIB irradiation.

By utilizing the topography-guided stress equilibrium within the nanofilm, versatile 3D shape transformations such as upward buckling, downward bending, complex rotation and twisting of nanostructures were precisely achieved.

While previous attempts to create functional kirigami devices have used complicated sequential procedures and have been primarily aimed at realizing mechanical rather than optical functions, this new nano-kirigami method, in contrast, can be implemented in a single fabrication step and could be used to perform a number of optical functions.

For a proof-of-concept demonstration, the team produced a 3D pinwheel-like structure with giant optical chirality. The nanodevice achieved efficient manipulation of “left-handed” and “right-handed” circularly polarized light and exhibited strong uniaxial optical rotation effects in telecommunication wavelengths.

In this way, the team demonstrated a multidisciplinary connection between the two fields of nanomechanics and nanophotonics. This may represent a brand new direction for emerging kirigami research.

The team also developed a theoretical model to elucidate the dynamics during the nano-kirigami fabrication. This is of great significance since it allows researchers to design 3D nanogeometries based on desired optical functionalities. In contrast, previous studies relied heavily on intuitive designs.

In other words, in terms of geometric design, nano-kirigami offers an intelligent 3D nanofabrication method beyond traditional bottom-up, top-down and self-assembly nanofabrication techniques.

Its concept can be extended to broad nanofabrication platforms and could lead to the realization of complex optical nanostructures for sensing, computation, micro-/nano- electromechanical systems or biomedical devices.

This work, entitled “Nano-kirigami with giant optical chirality,” was published in Science Advances on July 6, 2018.

Bruker Corporation today announced that it has acquired JPK Instruments AG (JPK), located in Berlin, Germany. In 2017, JPK Instruments had revenue of approximately 10 million Euro. JPK provides microscopy instrumentation for biomolecular and cellular imaging, as well as force measurements on single molecules, cells and tissues. JPK adds in-depth expertise in live-cell imaging, cellular mechanics, adhesion, and molecular force measurements, optical trapping, and biological stimulus-response characterization to Bruker. Financial details of the transaction were not disclosed.

Over the past five years, Bruker has developed a life science microscopy business that specializes in advanced technologies for neuroscience, live-cell imaging, and molecular imaging, which will be further augmented by JPK’s advanced technologies and applications. Bruker’s existing fluorescence microscopy techniques include performance-leading multiphoton microscopy, swept-field confocal microscopy, super-resolution microscopy, and single-plane illumination microscopy.

“We have been making a substantial investment in advanced technologies for life science imaging, and have built up a portfolio of fluorescence microscopy products that enable biologists in research areas that require deep, fast imaging at high resolution and at low phototoxicity,” commented Dr. Mark R. Munch, President of the Bruker NANO Group. “JPK’s products and applications capabilities nicely augment our current techniques.”

Anthony Finbow, Chairman at JPK, added: “The combination of these two businesses will enable further significant advances in life science imaging and drive the state of the industry. I am delighted that we have been able to achieve this result for JPK and for Bruker.”

“The business we have built aligns well with the new strategic direction of Bruker in life science microscopy, and we are very pleased to join them,” said Dr. Torsten Jaehnke, a JPK founder and CTO. “We plan to realize a number of valuable synergies going forward.”

JPK’s BioAFM and optical tweezer product families span a range of techniques, from imaging of biological samples to characterizing biomolecular and cellular force interactions. Its NanoWizard 4 BioScience AFM combines atomic force imaging with advanced optical fluorescence imaging and super-resolution microscopy for the ultimate combination in image resolution for molecules, membranes, and live cells. In addition, the ForceRobot enables single-molecule force spectroscopy for investigating receptor-ligand interactions or small molecule-protein binding interactions. The CellHesion product brings quantitative force measurement to live cells and tissues, enabling insights in cell-substrate and cell-cell interactions. Lastly, JPK’s NanoTracker optical tweezer provides an all-optical means for molecular and cellular force experiments.

JPK’s offerings and life science applications expertise are synergistic with Bruker’s existing portfolio of advanced fluorescence microscopy products. Bruker’s Ultima family of multiphoton microscopes features proprietary photoactivation and photostimulation capabilities and deeper penetration into biological tissues, enabling advanced brain slice and intra-vital studies. Bruker’s Opterra swept-field scanning confocal fluorescence microscope provides unique live-cell imaging capabilities with unsurpassed dynamic observation of fast cellular events. Additionally, the Vutara super-resolution single-molecule localization (SML) microscope utilizes patented Biplane Imaging technology to provide high-speed, 3D super resolution for multicolor live-cell imaging and visualization of chromosome conformation. With a leading series of single plane illumination products, such as the MuVi SPIM and InVi SPIM, Bruker offers unique performance and easiest-to-use light sheet instruments featuring the combination of low phototoxicity and high-speed imaging. The combined microscopy portfolio of the two companies will enable a unique range of correlative measurements for emerging life science applications.

By Ed Korczynski

To fulfill the promise of the Internet of Things (IoT), the world needs low-cost high-bandwidth radio-frequency (RF) chips for 5th-generation (5G) internet technology. Despite standards not being completely defined yet it is clear that 5G hardware will have to be more complex than 4G kit, because it will have to provide a total solution that is ultra-reliable with at least 10 Gb/second bandwidth. A significant challenge remains in developing new high-speed transistor technologies for RF communications with low power to allow IoT “edge” devices to operate reliably off of batteries.

At the most recent Imec Technology Forum in Antwerp, Belgium, Nadine Collaert, Distinguished MTS of imec, discussed recent research results from the consortium’s High-Speed Analog and RF Program. In addition to working on core transistor fabrication technology R&D, imec has also been working on system-technology co-integration (STCO) and design-technology co-integration (DTCO) for RF applications.

Comparing the system specifications needed for mobile handsets to those for base-stations, transmitter power consumption should be 10x lower, while the receiver power consumption needs to be 2x lower. Today using silicon CMOS transistors, four power amplifiers alone consume 65% of a transmitter chip’s power. Heterogeneous Bipolar Transistors (HBT) and High Electron Mobility Transistors (HEMT) built using compound semiconductors such as gallium-arsenide (GaAs), gallium-nitride (GaN), or indium-phosphide (InP) provide excellent RF device results. However, compared to making CMOS chips on silicon, HBT and HEMT manufacturing on compound semiconductor substrates is inherently expensive and difficult.

Heterogeneous Bipolar Transistors (HBT) and High Electron Mobility Transistors (HEMT) both rely upon the precise epitaxial growth of semiconductor layers, and such growth is easier when the underlying substrate material has similar atomic arrangement. While it is much more difficult to grow epi-layers of compound semiconductors on silicon wafers, imec does R&D using 300-mm diameter silicon substrates with a goal of maintaining device quality while lowering production costs. The Figure shows cross-sections of the two “tracks” of III-V and GaN transistor materials being explored by imec for future RF chips.

III-V on Silicon and GaN-on-Silicon RF device cross-sections, showing work on both Heterogeneous Bipolar Transistors (HBT) and High Electron Mobility Transistors (HEMT) for 5G applications. (Source: imec)

Imec’s High-Speed Analog/RF Program objectives include the following:

  • High-speed III-V RF devices using low-cost, high-volume silicon-compatible processes and modules,
  • Co-optimization with advance silicon CMOS to reduce form factor and enable power-efficient systems with higher performance, and
  • Technology-circuit design co-optimization to enable complex RF-FEM modules with heterogeneous integration.

5G technology deployment will start with speeds below 6GHz,  because technologies in that range have already been proven and the costs are known. However, after five years the frequency will change to the “mm-wave” range with the first wavelength band at ~28GHz. GaN material with a wide bandgap and high charge-density has been a base-station technology, and it could be an ideal material for low-power mm-wave RF devices for future handsets.

This R&D leverages the III-V on silicon capability that has been developed by imec for CMOS:Photonic integration. RF transistors could be stacked over CMOS transistors using either wafer- or die-stacking, or both could be monolithically co-integrated on one silicon chip. Work on monolithic integration of GaN-on-Silicon is happening now, and could also be used for photonics where faster transistors can improve the performance of optical links.